CN103439824A - 阵列基板、像素驱动方法及显示装置 - Google Patents

阵列基板、像素驱动方法及显示装置 Download PDF

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CN103439824A
CN103439824A CN2013103898110A CN201310389811A CN103439824A CN 103439824 A CN103439824 A CN 103439824A CN 2013103898110 A CN2013103898110 A CN 2013103898110A CN 201310389811 A CN201310389811 A CN 201310389811A CN 103439824 A CN103439824 A CN 103439824A
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郑喆奎
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BOE Technology Group Co Ltd
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Priority to US14/353,934 priority patent/US9824643B2/en
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Abstract

本发明提供了一种阵列基板、像素驱动方法及显示装置，且在该阵列基板中设置有用于显示第一画面图像的第一像素单元集合，所述第一像素单元集合中的像素单元，与多条栅线中的第一栅线集合连接；用于显示第二画面图像的第二像素单元集合，所述第二像素单元集合中的像素单元，与多条栅线中的第二栅线集合连接；所述第一像素单元集合包括的像素单元与所述第二像素单元集合中的像素单元间隔设置。本发明实施例提供的技术方案利用阵列基板中有限的像素单元显示对应的画面图像，通过降低驱动频率而降低显示装置所消耗的功率，从而可有效改善电磁干扰问题。

Description

阵列基板、像素驱动方法及显示装置
技术领域
本发明涉及显示领域，尤其涉及一种阵列基板、像素驱动方法及显示装置。
背景技术
液晶显示装置（LCD）具体可由配备有多条栅线、多条数据线、在栅线和数据线的交叉区域形成的像素单元、时序控制器、用于向栅线输出栅极信号的栅极驱动单元即X轴IC和用于向数据线输出数据信号的源极驱动单元即Y轴IC的液晶显示面板等器件构成。
现有技术中，当液晶显示装置显示图像时，如附图1所示，液晶显示面板中存在的多个像素单元，在对应的栅线输入的驱动信号驱动下，按箭头所示方法，依次被驱动发光显示对应的画面图像，从而使液晶显示装置显示图像。
目前，为了使LCD和有机发光二极管(OLED)显示装置实现3D影像显示，需要较高的驱动频率，例如120Hz、240Hz等。由于驱动频率增高，导致现有显示装置的功率消耗也随着增加，并且也导致显示装置出现电磁干扰（EMI）的问题。
发明内容
本发明提供一种阵列基板、像素驱动方法及显示装置，从而可有效降低显示装置的驱动频率，降低显示装置的功率消耗。
本发明提供方案如下：
本发明实施例通过了一种阵列基板，包括多个像素单元以及用于为所述像素单元提供驱动信号的多条栅线；
所述多个像素单元包括：
用于显示第一画面图像的第一像素单元集合，所述第一像素单元集合中的像素单元，与所述多条栅线中的第一栅线集合连接；
用于显示第二画面图像的第二像素单元集合，所述第二像素单元集合中的像素单元，与所述多条栅线中的第二栅线集合连接；
所述第一像素单元集合包括的像素单元与所述第二像素单元集合中的像素单元间隔设置。
优选的，所述第一像素单元集合和第二像素单元集合中的一像素单元集合中的像素单元显示画面图像时，另一像素单元集合中的像素单元不显示画面图像或显示暗色调的基础原色。
优选的，所述第一像素单元集合包括的像素单元与所述第二像素单元集合中的像素单元，在横向和/或纵向方向上间隔设置。
优选的，所述第一栅线集合中的栅线与所述第二栅线集合中的栅线形成于同一图层中且间隔设置。
优选的，所述第一栅线集合中的栅线与所述第二栅线集合中的栅线形成于不同图层中。
本发明实施例还提供了一种像素驱动方法，包括：
在第一时间单元，驱动第一像素单元集合中的像素单元显示对应的画面图像，控制第二像素单元集合中的像素单元不显示画面图像或驱动第二像素单元集合中的像素单元显示暗色调的基础原色；
在第二时间单元，驱动第二像素单元集合中的像素单元显示对应的画面图像，控制第一像素单元集合中的像素单元不显示画面图像或驱动第一像素单元集合中的像素单元显示暗色。
优选的，所述时间单元为数据帧。
优选的，所述第一画面图像为3D画面中左眼图形；
所述第二画面图像为3D画面中的右眼图像。
本发明实施例还提供了一种显示装置，该显示装置具体可以包括上述本发明实施例提供的阵列基板。
优选的，所述显示装置包括至少一个栅线驱动芯片，用于控制栅线驱动第一像素单元集合包括的像素单元与所述第二像素单元集合中的像素单元间隔显示画面图像。
从以上所述可以看出，本发明提供的阵列基板、像素驱动方法显示装置，且在该阵列基板中设置有用于显示第一画面图像的第一像素单元集合，所述第一像素单元集合中的像素单元，与多条栅线中的第一栅线集合连接；用于显示第二画面图像的第二像素单元集合，所述第二像素单元集合中的像素单元，与多条栅线中的第二栅线集合连接；所述第一像素单元集合包括的像素单元与所述第二像素单元集合中的像素单元间隔设置。本发明实施例提供的技术方案利用阵列基板中有限的像素单元显示对应的画面图像，通过降低驱动频率而降低显示装置所消耗的功率，从而可有效改善电磁干扰问题。
附图说明
图1为现有技术示意图；
图2为本发明实施例提供的阵列基板示意图一；
图3为本发明实施例提供的阵列基板示意图二；
图4为本发明实施例提供的阵列基板示意图三；
图5为本发明实施例提供的阵列基板示意图四；
图6为本发明实施例提供的像素驱动方法流程示意图；
图7为本发明实施例提供的阵列基板示意图五。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例的附图，对本发明实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本发明的一部分实施例，而不是全部的实施例。基于所描述的本发明的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本发明保护的范围。
除非另作定义，此处使用的技术术语或者科学术语应当为本发明所属领域内具有一般技能的人士所理解的通常意义。本发明专利申请说明书以及权利要求书中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”或者“一”等类似词语也不表示数量限制，而是表示存在至少一个。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也相应地改变。
本发明实施例提供了一种阵列基板，其具体可以包括多个像素单元以及用于为像素单元提供驱动信号的多条栅线；
所述多个像素单元包括：
用于显示第一画面图像的第一像素单元集合，所述第一像素单元集合中的像素单元，与所述多条栅线中的第一栅线集合连接；
用于显示第二画面图像的第二像素单元集合，所述第二像素单元集合中的像素单元，与所述多条栅线中的第二栅线集合连接；
所述第一像素单元集合包括的像素单元与所述第二像素单元集合中的像素单元间隔设置。
本发明实施例提供的阵列基板，利用指定数量的像素单元显示需要显示的画面图像，从而通过降低驱动频率而降低显示装置所消耗的功率。
即在本发明一具体实施例中，当第一像素单元集合和第二像素单元集合中的一像素单元集合中的像素单元显示画面图像时，另一像素单元集合中的像素单元可不显示画面图像。
在一具体实施例中，本发明实施例中所涉及的第一画面图像具体可为3D画面中左眼图形，而本发明实施例中所涉及的第二画面图像具体可为3D画面中的右眼图像；或者，第一画面图像具体可为3D画面中右眼图形，第二画面图像具体可为3D画面中的左眼图像。
这种，对应于3D画面，本发明实施例提供的阵列基板中的第一像素单元集合和第二像素单元集合，按照一预设的时间单位例如数据帧，交替显示3D画面中的左眼图像和右眼图像，从而在降低驱动频率的基础上，确保显示装置完整的显示3D画面图像数据。
而在另一具体实施例中，为了改善3D残影现象，本发明实施例所提供的技术方案，可在当第一像素单元集合和第二像素单元集合中的一像素单元集合中的像素单元显示一对应画面图像时，另一像素单元集合中的像素单元显示暗色调的基础原色，例如黑色等，从而可有效的改善3D残影现象。
在一具体实施例中，上述间隔设置的第一像素单元集合包括的像素单元与所述第二像素单元集合中的像素单元，具体可体现为在横向或者纵向方向上间隔设置，也可以是如附图2所示的，横向和纵向方向均间隔设置。附图2中，标识为1的像素单元，具体可为第一像素单元集合中的像素单元；而标识为2的像素单元，具体可为第二像素单元集合中的像素单元。
本发明实施例所涉及的像素单元，同样可用于显示对应的基础原色，例如R、G、B等。
在一具体实施例中，本发明实施例提供的阵列基板的薄膜晶体管的类型，具体可为顶栅型或顶栅型阵列基板，而本发明实施例提供的阵列基板中，具体可以包括玻璃基板、栅极层、栅绝缘层、半导体层、源/漏金属层、钝化层、透明电极层等阵列基板在实现其功能时所需的图层。
本发明实施例中，为了确保第一像素单元集合中的像素单元和第二像素单元集合中的像素单元，以时间单位为顺序，间隔驱动以显示对应的画面图像，在一具体实施例中，本发明实施例所涉及的第一栅线集合中的栅线，与第二栅线集合中的栅线之间的设置结构，可如附图3所示。
即第一栅线集合中的栅线，可与所述第二栅线集合中的栅线形成于同一图层中且间隔设置。附图3中，标识为1开头的栅线，具体可为第一栅线单元集合中的栅线，例如，11、12等；而标识位2开头的栅线，具体可为第二栅线集合中的栅线，例如21、22、23等。
而在另一具体实施例中，如附图4、5所示，本发明实施例所涉及的第一栅线集合中的栅线，与所述第二栅线集合中的栅线也可形成于不同图层中。附图4具体可为本发明实施例提供的阵列基板的俯视图，附图5具体可为本发明实施例提供的阵列基板的剖面图，其中标识3所示为玻璃基板，4标识所示具体可为栅绝缘层，第一栅线单元集合与第二栅线单元集合中间设置有绝缘层，具体可以为栅绝缘层。同样，附图4、5中，标识为1开头的栅线，具体可为第一栅线单元集合中的栅线，例如，11、12等；而标识位2开头的栅线，具体可为第二栅线集合中的栅线，例如21、22等。
这里需要说明的是，本发明实施例中附图所示技术方案，仅用于便于对本发明实施例提供的技术方案的理解，但并不是对本发明实施例提供的技术方案内容的限定。
本发明实施例还提供了一种像素驱动方法，如附图6所示，该方法具体可以包括：
步骤61，在第一时间单元内，驱动第一像素单元集合中的像素单元显示对应的画面图像，控制第二像素单元集合中的像素单元不显示画面图像或驱动第二像素单元集合中的像素单元显示暗色调的基础原色；
步骤62，在第二时间单元内，驱动第二像素单元集合中的像素单元显示对应的画面图像，控制第一像素单元集合中的像素单元不显示画面图像或驱动第一像素单元集合中的像素单元显示暗色调的基础原色。
本发明实施例提供的像素驱动方法，利用有限数量的像素单元显示需要显示的画面图像，从而通过降低驱动频率而降低显示装置所消耗的功率。
本发明实施例所涉及的时间单元，具体可为数据帧等时间单位。
下面，以本发明实施例提供的像素驱动方法应用于本发明实施例提供的如附图4、5所示阵列基板为例，对本发明实施例提供的像素驱动方法的一个具体实施例具体实现过程进行描述。
此实施例中，时间单位具体可为数据帧，且一帧的时间可为1/120秒。
如附图7所示，该过程具体可以包括：
在第一数据帧内，第一像素单元集合中包括的像素单元，在驱动信号的控制下，显示对应的画面图像，例如3D画面中的左眼图形。
具体的，第一像素单元集合中包括的像素单元，具体可按附图7所示箭头方向被依次驱动，该箭头方向显示出栅线连接像素单元的路径。
此时，第二像素单元集合中包括的像素单元被控制为不显示画面图像或者在驱动信号的驱动下显示暗色调的基础原色，例如黑色的。
在第二数据帧内，第二像素单元集合中包括的像素单元，在驱动信号的控制下，显示对应的画面图像，例如3D画面中的右眼图形。
同样，第二像素单元集合中包括的像素单元，具体可按附图7所示箭头方向被依次驱动。
此时，第一像素单元集合中包括的像素单元被控制为不显示画面图像或者在驱动信号的驱动下显示暗色调的基础原色。
在后续第三数据帧内，再次驱动第一像素单元中包括的像素单元显示对应的画面图像，在第四数据帧内，再次驱动第二像素单元中包括的像素单元显示对应的画面图像，即后续可以数据帧等为时间单元，间隔驱动第一像素单元集合和第二像素单元集合中的像素单元显示对应的画面图像。从而实现对例如3D等画面图像的完全显示。
这里需要说明的是，本发明实施例附图7中存在阴影的像素单元，用于表示该像素单元被控制为不显示图像或者被驱动显示暗色调基础原色。
那么可见，本发明实施例所提供的像素驱动方法，通过利用指定数量的像素单元显示需要显示的画面图像，即通过锯齿形的描述驱动方式，从而通过降低驱动频率而降低显示装置所消耗的功率。
基于本发明实施例提供的阵列基板，本发明实施例还提供了一种显示装置，该有显示装置具体可以包括上述本发明实施例提供的阵列基板。
该显示装置具体可以为液晶面板、液晶电视、液晶显示器、OLED面板、OLED显示器、等离子显示器或电子纸等显示装置。
优选的，该显示装置内包括至少一个栅线驱动芯片，用于控制对应栅线驱动第一像素单元集合包括的像素单元与所述第二像素单元集合中的像素单元间隔显示画面图像。
从以上所述可以看出，本发明提供的阵列基板、像素驱动方法显示装置，且在该阵列基板中设置有用于显示第一画面图像的第一像素单元集合，所述第一像素单元集合中的像素单元，与所述多条栅线中的第一栅线集合连接；用于显示第二画面图像的第二像素单元集合，所述第二像素单元集合中的像素单元，与所述多条栅线中的第二栅线集合连接；所述第一像素单元集合包括的像素单元与所述第二像素单元集合中的像素单元间隔设置。本发明实施例提供的技术方案利用阵列基板中有限的像素单元显示对应的画面图像，通过降低驱动频率而降低显示装置所消耗的功率，从而可有效改善电磁干扰问题。
以上所述仅是本发明的实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。

Claims (10)

1.一种阵列基板，包括多个像素单元以及用于为所述像素单元提供驱动信号的多条栅线；其特征在于，所述多个像素单元包括：
用于显示第一画面图像的第一像素单元集合，所述第一像素单元集合中的像素单元，与所述多条栅线中的第一栅线集合连接；
用于显示第二画面图像的第二像素单元集合，所述第二像素单元集合中的像素单元，与所述多条栅线中的第二栅线集合连接；
所述第一像素单元集合包括的像素单元与所述第二像素单元集合中的像素单元间隔设置。
2.如权利要求1所述的阵列基板，其特征在于，所述第一像素单元集合和第二像素单元集合中的一像素单元集合中的像素单元显示画面图像时，另一像素单元集合中的像素单元不显示画面图像或显示暗色调的基础原色。
3.如权利要求1所述的阵列基板，其特征在于，所述第一像素单元集合包括的像素单元与所述第二像素单元集合中的像素单元，在横向和/或纵向方向上间隔设置。
4.如权利要求1所述的阵列基板，其特征在于，所述第一栅线集合中的栅线与所述第二栅线集合中的栅线形成于同一图层中且间隔设置。
5.如权利要求1所述的阵列基板，其特征在于，所述第一栅线集合中的栅线与所述第二栅线集合中的栅线形成于不同图层中。
6.一种像素驱动方法，其特征在于，包括：
在第一时间单元，驱动第一像素单元集合中的像素单元显示对应的画面图像，控制第二像素单元集合中的像素单元不显示画面图像或驱动第二像素单元集合中的像素单元显示暗色调的基础原色；
在第二时间单元，驱动第二像素单元集合中的像素单元显示对应的画面图像，控制第一像素单元集合中的像素单元不显示画面图像或驱动第一像素单元集合中的像素单元显示暗色。
7.如权利要求6所述的像素驱动方法，其特征在于，所述时间单元为数据帧。
8.如权利要求6所述的像素驱动方法，其特征在于，所述第一画面图像为3D画面中左眼图形；
所述第二画面图像为3D画面中的右眼图像。
9.一种显示装置，其特征在于，包括如权利要求1-5任一项所述的阵列基板。
10.如权利要求9所述的显示装置，其特征在于，包括至少一个栅线驱动芯片，用于控制栅线驱动第一像素单元集合包括的像素单元与所述第二像素单元集合中的像素单元间隔显示画面图像。
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