CN103414487B - Based on the Shortwave channel machine control device of cpci bus - Google Patents
Based on the Shortwave channel machine control device of cpci bus Download PDFInfo
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- CN103414487B CN103414487B CN201310280954.8A CN201310280954A CN103414487B CN 103414487 B CN103414487 B CN 103414487B CN 201310280954 A CN201310280954 A CN 201310280954A CN 103414487 B CN103414487 B CN 103414487B
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Abstract
The invention discloses a kind of Shortwave channel machine control device based on cpci bus, comprise master control borad, cpci bus, channel DSP, business DSP and CPCI expansion slot, described channel DSP, business DSP are communicated with master control borad by cpci bus with CPCI expansion slot.Shortwave channel machine control device based on cpci bus provided by the invention, transfer of data and information exchange is carried out by cpci bus, and there is standard C pci bus slot, so not only data transmission bauds is fast but also slot standard, the not easily disturbed thus requirement reduced total beta radiation of digital signal.
Description
Technical field
The present invention relates to a kind of Shortwave channel machine control device based on cpci bus, belong to design of electronic circuits technology.
Background technology
Existing short wave communication equipment mainly uses internal bus to control inner modules, and the internal data transfer speed of this mode is slow, extended capability is poor.
Summary of the invention
Goal of the invention: in order to overcome the deficiencies in the prior art, the invention provides a kind of Shortwave channel machine control device based on cpci bus, the transmission of internal data is realized by cpci bus, solve the problems such as data transmission bauds is slow, extended capability is poor, to meet the requirement of shortwave multi-channel integrated channel device.
Technical scheme: for solving the problems of the technologies described above, the technical solution used in the present invention is:
Based on the Shortwave channel machine control device of cpci bus, comprise master control borad, cpci bus, channel DSP, business DSP and CPCI expansion slot, described channel DSP, business DSP are communicated with master control borad by cpci bus with CPCI expansion slot.
Cpci bus has better mechanical property, not easily covered with dust and have extreme high reliability, impact resistance and vibration resistance, and this makes CPCI go for the industrial environment of inclement condition; Further, each cpci bus base plate can support at most 8 slots, by the use of bus extension bridge, further can expand system scale, and the open architecture of cpci bus, various function expanding module can be inserted easily, there is upgrading ability flexibly; The use of cpci bus adds the support of whole sole duty to hot plug specification in addition.
Said apparatus, is connected with the function expanding module in embedded computer, each CPCI expansion slot by cpci bus, can extended network interface and other function, and the software and hardware being convenient to system is integrated, upgrading.Master control borad primary responsibility display and control.The radio frequency that channel DSP mainly realizes zero intermediate frequency exciter exports, the if sampling of high intermediate frequency receiver, reduction of speed and demodulation process, realizes the collection of letters (high intermediate frequency) of multichannel full duplex, transmits (zero intermediate frequency) signal transacting.Business DSP mainly completes the functions such as Adaptive link establishment; Complete state modulator and the status monitoring to receiving and encourage channel strip; Multi channel diversity feature can be realized, improve the reliability of communication by a relatively large margin; Have with time the interface of uniting, synchronous communication function can be realized; Also can realize acoustic code talk about and the modulation, demodulation etc. of data service by coordinating with the software embedded or hardware module.
This device start time, by the DSP program of cpci bus from master control borad load channel DSP, business DSP.This device is when normally working, and master control borad sends order by cpci bus to channel DSP and business DSP, channel DSP and business DSP by cpci bus to master control borad loopback state information.Like this by sending given operational order to channel DSP and business DSP, the control and management of short wave channel machine just can be realized.If upgrade to systems soft ware and function simultaneously, just can realize by the automatic load channel DSP of cpci bus and business DSP program.
Preferably, the circuit of described channel DSP and business DSP all for being made up of large-scale F PGA and high-speed dsp; Described large-scale F PGA is used for the logic control of realizing circuit inside and the upper and lower frequency conversion of multiple signals and filtering process; Described high-speed dsp is for realizing the generation of waveform signal, protocol processes, encoding and decoding.Described large-scale F PGA can adopt StratixIIFPGA and CycloneIIFPGA of altera corp; Described high-speed dsp can adopt the TMS320C64XX series of TI company, and its speed block, memory source enrich and have encoding and decoding coprocessor, and this high-speed dsp is with the master/slave mode interface of 32bit/33MHzPCI, support CPCI agreement simultaneously.
In order to realize cpci bus and channel DSP and business DSP quality inspection list volume transfer of data, preferably, described master control borad comprises dual port RAM, two memory blocks are opened up in described dual port RAM, one of them memory block sends to the data of high-speed dsp for depositing cpci bus, another memory block returns to the data of cpci bus for depositing high-speed dsp.When sending data by cpci bus to dsp chip, data first write dual port RAM, then send interruption to dsp chip, notify that it reads data.When dsp chip return data, data are also first write dual port RAM, then trigger the interruption of cpci bus.Driver responds in this has no progeny and can read data.
Preferably, the built-in operating system of described master control borad needs to configure CPCI equipment by the system call of cpci bus, and in general master control borad inside needs to be configured with device initialize module, equipment module for reading and writing and break in service module.In initialization module, driver can obtain the base address of configuration space and home address space by device number and manufacturer number scanning cpci bus, obtains break in service number, is associated with corresponding break in service module and opens interruption; Equipment writing module in cpci bus, write data and to master control borad CPU send interrupt; Equipment read through model reads data from cpci bus, and break in service module Load notification equipment read through model data are ready to.
Preferably, the CPU of described master control borad be 1.0GHz X86 in save as 512M, with two 10/100M self adaptation Ethernet, six serial ports, four road USB2.0.Described master control borad can load WindowsXP or vxworks operating system, is responsible for display and control; If described master control borad is developed under WindowsXP operating system, visual c++ can be used to write, if described master control borad is developed under vxworks operating system, Tilcon can be used to write; Different operating system needs to install different CPCI drivers.
Preferably, described cpci bus meets CPCI2.0R2.1 standard.
Beneficial effect: the Shortwave channel machine control device based on cpci bus provided by the invention, transfer of data and information exchange is carried out by cpci bus, and there is standard C pci bus slot, so not only data transmission bauds is fast but also slot standard, the not easily disturbed thus requirement reduced total beta radiation of digital signal.
Accompanying drawing explanation
Fig. 1 is structural representation of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the present invention is further described.
Be illustrated in figure 1 a kind of Shortwave channel machine control device based on cpci bus, it is characterized in that: comprise master control borad, cpci bus, channel DSP, business DSP and CPCI expansion slot, described channel DSP, business DSP are communicated with master control borad by cpci bus with CPCI expansion slot.
The CPU of described master control borad be 1.0GHz X86 in save as 512M, with two 10/100M self adaptation Ethernet, six serial ports, four road USB2.0.Described master control borad can load WindowsXP or vxworks operating system, is responsible for display and control; If described master control borad is developed under WindowsXP operating system, visual c++ can be used to write, if described master control borad is developed under vxworks operating system, Tilcon can be used to write; Different operating system needs to install different CPCI drivers.
Described cpci bus meets CPCI2.0R2.1 standard.
The radio frequency that channel DSP mainly realizes zero intermediate frequency exciter exports, the if sampling of high intermediate frequency receiver, reduction of speed and demodulation process, realizes the collection of letters (high intermediate frequency) of multichannel full duplex, transmits (zero intermediate frequency) signal transacting.
Business DSP mainly completes the functions such as Adaptive link establishment; Complete state modulator and the status monitoring to receiving and encourage channel strip; Multi channel diversity feature can be realized, improve the reliability of communication by a relatively large margin; Have with time the interface of uniting, synchronous communication function can be realized; Also can realize acoustic code talk about and the modulation, demodulation etc. of data service by coordinating with the software embedded or hardware module.
The circuit of described channel DSP and business DSP all for being made up of large-scale F PGA and high-speed dsp; Described large-scale F PGA is used for the logic control of realizing circuit inside and the upper and lower frequency conversion of multiple signals and filtering process; Described high-speed dsp is for realizing the generation of waveform signal, protocol processes, encoding and decoding.Described large-scale F PGA adopts StratixIIFPGA and CycloneIIFPGA of altera corp; Described high-speed dsp adopts the TMS320C64XX series of TI company, and its speed block, memory source enrich and have encoding and decoding coprocessor, and this high-speed dsp is with the master/slave mode interface of 32bit/33MHzPCI, support CPCI agreement simultaneously.
In order to realize cpci bus and channel DSP and business DSP quality inspection list volume transfer of data, preferably, described master control borad comprises dual port RAM, two memory blocks are opened up in described dual port RAM, one of them memory block sends to the data of high-speed dsp for depositing cpci bus, another memory block returns to the data of cpci bus for depositing high-speed dsp.When sending data by cpci bus to dsp chip, data first write dual port RAM, then send interruption to dsp chip, notify that it reads data.When dsp chip return data, data are also first write dual port RAM, then trigger the interruption of cpci bus.Driver responds in this has no progeny and can read data.
The built-in operating system of described master control borad needs to configure CPCI equipment by the system call of cpci bus, and in general master control borad inside needs to be configured with device initialize module, equipment module for reading and writing and break in service module.In initialization module, driver can obtain the base address of configuration space and home address space by device number and manufacturer number scanning cpci bus, obtains break in service number, is associated with corresponding break in service module and opens interruption; Equipment writing module is write data and is sent to X86 and interrupts in cpci bus; Equipment read through model reads data from cpci bus, and break in service module Load notification equipment read through model data are ready to.
This device start time, by the DSP program of cpci bus from master control borad load channel DSP, business DSP.This device is when normally working, and master control borad sends order by cpci bus to channel DSP and business DSP, channel DSP and business DSP by cpci bus to master control borad loopback state information.Like this by sending given operational order to channel DSP and business DSP, the control and management of short wave channel machine just can be realized.If upgrade to systems soft ware and function simultaneously, just can realize by the automatic load channel DSP of cpci bus and business DSP program.
The above is only the preferred embodiment of the present invention; be noted that for those skilled in the art; under the premise without departing from the principles of the invention, can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (1)
1. based on the Shortwave channel machine control device of cpci bus, it is characterized in that: comprise master control borad, cpci bus, channel DSP, business DSP and CPCI expansion slot, described channel DSP, business DSP are communicated with master control borad by cpci bus with CPCI expansion slot; The circuit of described channel DSP and business DSP all for being made up of large-scale F PGA and high-speed dsp; Described large-scale F PGA is used for the logic control of realizing circuit inside and the upper and lower frequency conversion of multiple signals and filtering process; Described high-speed dsp is for realizing the generation of waveform signal, protocol processes, encoding and decoding; Described master control borad comprises dual port RAM, opens up two memory blocks in described dual port RAM, and one of them memory block sends to the data of high-speed dsp for depositing cpci bus, and another memory block returns to the data of cpci bus for depositing high-speed dsp; Described master control borad inside is provided with device initialize module, equipment module for reading and writing and break in service module; The CPU of described master control borad be 1.0GHz X86 in save as 512M, with two 10/100M self adaptation Ethernet, six serial ports, four road USB2.0; Described cpci bus meets CPCI2.0R2.1 standard.
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CN103973404A (en) * | 2014-04-04 | 2014-08-06 | 熊猫电子集团有限公司 | CPCI (compact peripheral component interconnect) bus based network code controller |
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基于CPCI的多通道短波通信控制平台开发;谢聪,邓治彬;《舰船电子工程》;20091231;第29卷(第6期);第113-114页,图1 * |
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