CN103414487A - Shortwave channel machine control device based on CPCI bus - Google Patents
Shortwave channel machine control device based on CPCI bus Download PDFInfo
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- CN103414487A CN103414487A CN2013102809548A CN201310280954A CN103414487A CN 103414487 A CN103414487 A CN 103414487A CN 2013102809548 A CN2013102809548 A CN 2013102809548A CN 201310280954 A CN201310280954 A CN 201310280954A CN 103414487 A CN103414487 A CN 103414487A
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Abstract
The invention discloses a shortwave channel machine control device based on a CPCI bus. The device includes a main control board, the CPCI bus, a channel DSP, a business DSP, and a CPCI expansion slot. The channel DSP, the business DSP and the CPCI expansion slot communicate with the main control board through the CPCI bus. The shortwave channel machine control device based on the CPCI bus provided by the invention, carries out the data transfer and information exchange through the CPCI bus, and is provided with the standard CPCI bus slot, so that the data transmission speed is fast; the slot is standard; the digital signal is not easy to be disturbed; and accordingly the bus radiation requirement is reduced.
Description
Technical field
The present invention relates to a kind of machine of short wave channel based on cpci bus control device, belong to the design of electronic circuits technology.
Background technology
Existing short wave communication equipment is mainly used internal bus to control inner modules, and the internal data transfer speed of this mode is slow, extended capability is poor.
Summary of the invention
Goal of the invention: in order to overcome the deficiencies in the prior art, the invention provides a kind of machine of short wave channel based on cpci bus control device, by cpci bus, realize the transmission of internal data, solve the problems such as data transmission bauds is slow, extended capability is poor, to meet the requirement of shortwave multi-channel integrated channel device.
Technical scheme: for solving the problems of the technologies described above, the technical solution used in the present invention is:
Short wave channel machine control device based on cpci bus, comprise master control borad, cpci bus, channel DSP, business DSP and CPCI expansion slot, and described channel DSP, business DSP communicate by letter with master control borad by cpci bus with the CPCI expansion slot.
Cpci bus has better mechanical property, is difficult for being infected with dust and extreme high reliability, impact resistance and vibration resistance are arranged, and this makes CPCI go for the industrial environment of inclement condition; And each cpci bus base plate can be supported at most 8 slots, by bus, expands the use of bridge, can further expand system scale, and the open architecture of cpci bus, can insert various function expanding modules easily, has upgrading ability flexibly; The use of cpci bus has increased the support of whole sole duty to the hot plug standard in addition.
Said apparatus, be connected with the function expanding module in embedded computer, each CPCI expansion slot by cpci bus, can extended network interface and other function, and the software and hardware of being convenient to system is integrated, upgrading.Master control borad mainly is responsible for showing and is controlled.Channel DSP mainly realizes the radio frequency output of zero intermediate frequency exciter, if sampling, reduction of speed and the demodulation process of high intermediate-frequency receiver, realizes the collection of letters (high intermediate frequency) of multichannel full duplex, (zero intermediate frequency) signal of posting a letter processing.Business DSP mainly completes the functions such as Adaptive link establishment; Complete receiving and encouraging the parameter of channel strip to control and status monitoring; Can realize multi channel diversity feature, improve by a relatively large margin the reliability of communication; Have the interface with time system, can realize the synchronous communication function; By the software with embedding or hardware module, coordinate and also can realize that acoustic code is talked about and the modulation of data service, demodulation etc.
This device is when starting, by the DSP program of cpci bus from master control borad load channel DSP, business DSP.This device is in when normal operation, and master control borad sends order by cpci bus to channel DSP and business DSP, channel DSP and business DSP by cpci bus to master control borad loopback state information.By to channel DSP and business DSP, sending given operational order, just can realize the control and management of short wave channel machine like this.If simultaneously systems soft ware and function are upgraded, can just can realize by the automatic load channel DSP of cpci bus and business DSP program.
Preferably, the equal circuit for being formed by large-scale F PGA and high-speed dsp of described channel DSP and business DSP; Described large-scale F PGA is used for realizing the logic control of inside circuit and upper and lower frequency conversion and the filtering processing of multiple signals; Described high-speed dsp is for realizing generation, protocol processes, the encoding and decoding of waveform signal.Described large-scale F PGA can adopt Stratix II FPGA and the Cyclone II FPGA of altera corp; Described high-speed dsp can adopt the TMS320C64XX series of TI company, and its speed piece, memory source enrich and have the encoding and decoding coprocessor, and this high-speed dsp is with the master/slave pattern interface of 32bit/33MHz PCI, support CPCI agreement simultaneously.
In order to realize the single volume transfer of data of cpci bus and channel DSP and business DSP quality inspection, preferably, described master control borad comprises dual port RAM, in described dual port RAM, open up two memory blocks, one of them memory block is for depositing the data that cpci bus sends to high-speed dsp, and another memory block is for depositing the data that high-speed dsp returns to cpci bus.When by cpci bus, sending data to dsp chip, data first write dual port RAM, then send and interrupt to dsp chip, notify its reading out data.When the dsp chip return data, data are also first to write dual port RAM, then trigger the interruption of cpci bus.The driver response is had no progeny and is got final product reading out data in being somebody's turn to do.
Preferably, the built-in operating system of described master control borad need to configure by the system call of cpci bus CPCI equipment, and in general master control borad inside need to dispose device initialize module, equipment module for reading and writing and break in service module.In initialization module, driver can and obtain configuration space and the base address in local address space by device number and trading company of factory scanning cpci bus, obtains break in service number, interrelates and open interruption with corresponding break in service module; The equipment writing module is write data and interrupts to the CPU transmission of master control borad in cpci bus; The equipment read through model is from reading out data cpci bus, and break in service module load announcement apparatus read through model data are ready to.
Preferably, the CPU of described master control borad be in the X86 of 1.0GHz, save as 512M, with two 10/100M self adaptation Ethernets, six serial ports, four road USB2.0.Described master control borad can load Windows XP or vxworks operating system, is responsible for showing and controls; If described master control borad is developed under Windows XP operating system, can use visual c++ to write, if described master control borad is developed under vxworks operating system, can use Tilcon to write; Different operating system need to be installed different CPCI drivers.
Preferably, described cpci bus meets the CPCI2.0R2.1 standard.
Beneficial effect: the machine of the short wave channel based on cpci bus control device provided by the invention, by cpci bus, carry out transfer of data and information exchange, and has a standard C pci bus slot, so not only data transmission bauds is fast but also the slot standard, thereby digital signal is difficult for the disturbed requirement reduced total beta radiation.
The accompanying drawing explanation
Fig. 1 is structural representation of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the present invention is further described.
Be illustrated in figure 1 a kind of machine of short wave channel based on cpci bus control device, it is characterized in that: comprise master control borad, cpci bus, channel DSP, business DSP and CPCI expansion slot, described channel DSP, business DSP communicate by letter with master control borad by cpci bus with the CPCI expansion slot.
The CPU of described master control borad be in the X86 of 1.0GHz, save as 512M, with two 10/100M self adaptation Ethernets, six serial ports, four road USB2.0.Described master control borad can load Windows XP or vxworks operating system, is responsible for showing and controls; If described master control borad is developed under Windows XP operating system, can use Visual C++ to write, if described master control borad is developed under vxworks operating system, can use Tilcon to write; Different operating system need to be installed different CPCI drivers.
Described cpci bus meets the CPCI2.0R2.1 standard.
Channel DSP mainly realizes the radio frequency output of zero intermediate frequency exciter, if sampling, reduction of speed and the demodulation process of high intermediate-frequency receiver, realizes the collection of letters (high intermediate frequency) of multichannel full duplex, (zero intermediate frequency) signal of posting a letter processing.
Business DSP mainly completes the functions such as Adaptive link establishment; Complete receiving and encouraging the parameter of channel strip to control and status monitoring; Can realize multi channel diversity feature, improve by a relatively large margin the reliability of communication; Have the interface with time system, can realize the synchronous communication function; By the software with embedding or hardware module, coordinate and also can realize that acoustic code is talked about and the modulation of data service, demodulation etc.
Described channel DSP and business DSP be the circuit for consisting of large-scale F PGA and high-speed dsp all; Described large-scale F PGA is used for realizing the logic control of inside circuit and upper and lower frequency conversion and the filtering processing of multiple signals; Described high-speed dsp is for realizing generation, protocol processes, the encoding and decoding of waveform signal.Described large-scale F PGA adopts Stratix II FPGA and the Cyclone II FPGA of altera corp; Described high-speed dsp adopts the TMS320C64XX series of TI company, and its speed piece, memory source enrich and have the encoding and decoding coprocessor, and this high-speed dsp is with the master/slave pattern interface of 32bit/33MHz PCI, support CPCI agreement simultaneously.
In order to realize the single volume transfer of data of cpci bus and channel DSP and business DSP quality inspection, preferably, described master control borad comprises dual port RAM, in described dual port RAM, open up two memory blocks, one of them memory block is for depositing the data that cpci bus sends to high-speed dsp, and another memory block is for depositing the data that high-speed dsp returns to cpci bus.When by cpci bus, sending data to dsp chip, data first write dual port RAM, then send and interrupt to dsp chip, notify its reading out data.When the dsp chip return data, data are also first to write dual port RAM, then trigger the interruption of cpci bus.The driver response is had no progeny and is got final product reading out data in being somebody's turn to do.
The built-in operating system of described master control borad need to configure by the system call of cpci bus CPCI equipment, and in general master control borad inside need to dispose device initialize module, equipment module for reading and writing and break in service module.In initialization module, driver can and obtain configuration space and the base address in local address space by device number and trading company of factory scanning cpci bus, obtains break in service number, interrelates and open interruption with corresponding break in service module; The equipment writing module is write data and sends and interrupt to X86 in cpci bus; The equipment read through model is from reading out data cpci bus, and break in service module load announcement apparatus read through model data are ready to.
This device is when starting, by the DSP program of cpci bus from master control borad load channel DSP, business DSP.This device is in when normal operation, and master control borad sends order by cpci bus to channel DSP and business DSP, channel DSP and business DSP by cpci bus to master control borad loopback state information.By to channel DSP and business DSP, sending given operational order, just can realize the control and management of short wave channel machine like this.If simultaneously systems soft ware and function are upgraded, can just can realize by the automatic load channel DSP of cpci bus and business DSP program.
The above is only the preferred embodiment of the present invention; be noted that for those skilled in the art; under the premise without departing from the principles of the invention, can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (6)
1. based on the short wave channel machine control device of cpci bus, it is characterized in that: comprise master control borad, cpci bus, channel DSP, business DSP and CPCI expansion slot, described channel DSP, business DSP communicate by letter with master control borad by cpci bus with the CPCI expansion slot.
2. the machine of the short wave channel based on cpci bus control device according to claim 1, it is characterized in that: described channel DSP and business DSP be the circuit for consisting of large-scale F PGA and high-speed dsp all; Described large-scale F PGA is used for realizing the logic control of inside circuit and upper and lower frequency conversion and the filtering processing of multiple signals; Described high-speed dsp is for realizing generation, protocol processes, the encoding and decoding of waveform signal.
3. the machine of the short wave channel based on cpci bus control device according to claim 2, it is characterized in that: described master control borad comprises dual port RAM, in described dual port RAM, open up two memory blocks, one of them memory block is for depositing the data that cpci bus sends to high-speed dsp, and another memory block is for depositing the data that high-speed dsp returns to cpci bus.
4. the machine of the short wave channel based on cpci bus control device according to claim 1, it is characterized in that: described master control borad inside is provided with device initialize module, equipment module for reading and writing and break in service module.
5. the machine of the short wave channel based on cpci bus control device according to claim 1 is characterized in that: the CPU of described master control borad be in the X86 of 1.0GHz, save as 512M, with two 10/100M self adaptation Ethernets, six serial ports, four road USB2.0.
6. the machine of the short wave channel based on cpci bus control device according to claim 1, it is characterized in that: described cpci bus meets the CPCI2.0R2.1 standard.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201310280954.8A CN103414487B (en) | 2013-07-04 | 2013-07-04 | Based on the Shortwave channel machine control device of cpci bus |
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| CN201310280954.8A CN103414487B (en) | 2013-07-04 | 2013-07-04 | Based on the Shortwave channel machine control device of cpci bus |
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| CN103414487B CN103414487B (en) | 2015-12-09 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103763000A (en) * | 2014-01-07 | 2014-04-30 | 熊猫电子集团有限公司 | Short wave transmitting and receiving all-in-one module based on CPCI bus |
| CN103973404A (en) * | 2014-04-04 | 2014-08-06 | 熊猫电子集团有限公司 | CPCI (compact peripheral component interconnect) bus based network code controller |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040246982A1 (en) * | 2003-06-06 | 2004-12-09 | Sun Microsystems, Inc. | Methods and apparatus for configuring a packet switching (PS) backplane to support various configurations |
| CN101969330A (en) * | 2010-10-18 | 2011-02-09 | 南京大学 | Software radio-based wide frequency range direction of arrival identifying equipment |
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2013
- 2013-07-04 CN CN201310280954.8A patent/CN103414487B/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040246982A1 (en) * | 2003-06-06 | 2004-12-09 | Sun Microsystems, Inc. | Methods and apparatus for configuring a packet switching (PS) backplane to support various configurations |
| CN101969330A (en) * | 2010-10-18 | 2011-02-09 | 南京大学 | Software radio-based wide frequency range direction of arrival identifying equipment |
Non-Patent Citations (1)
| Title |
|---|
| 谢聪，邓治彬: "基于CPCI的多通道短波通信控制平台开发", 《舰船电子工程》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103763000A (en) * | 2014-01-07 | 2014-04-30 | 熊猫电子集团有限公司 | Short wave transmitting and receiving all-in-one module based on CPCI bus |
| CN103973404A (en) * | 2014-04-04 | 2014-08-06 | 熊猫电子集团有限公司 | CPCI (compact peripheral component interconnect) bus based network code controller |
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