CN103401734B - The method and apparatus of the signal quality debugging of high speed data bus - Google Patents
The method and apparatus of the signal quality debugging of high speed data bus Download PDFInfo
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- CN103401734B CN103401734B CN201310355917.9A CN201310355917A CN103401734B CN 103401734 B CN103401734 B CN 103401734B CN 201310355917 A CN201310355917 A CN 201310355917A CN 103401734 B CN103401734 B CN 103401734B
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Abstract
The method and apparatus that the invention discloses the signal quality debugging of a kind of high speed data bus, relate to communication technical field, after using this programme, the process debugging high speed data bus is simple, and the state in conjunction with high speed data bus actual transmission signal is tested so that debugging result is the most accurate.The method of the present invention specifically includes: control generate reference signal and be input to transmitting terminal；By high speed data bus and use each power weighting values in the first power weighting values set reference signal sent to receiving terminal from transmitting terminal and obtain statistical information successively, the quantity of high speed data bus is at least two；From the first power weighting values set, obtain error rate according to statistical information and not higher than preset the second power weighting values set of error rate；The through-put power of high speed data bus transmission signal high fdrequency component is adjusted according to the second power weighting values set.Can be applicable in the signal quality debugging of high speed data bus.
Description
Technical field
The present invention relates to communication technical field, the method particularly relating to the signal quality debugging of high speed data bus
And device.
Background technology
Along with the development of communication technology, traffic rate presents the fastest trend, 10,000,000,000 speed even ten
The interface of 10000000000 speed the most more and more occurs in the middle of communication equipment, and in order to make equipment reach at a high speed
Rate, the speed of device interior bus must be not less than the speed of panel interface, the i.e. speed of device interior bus
It is likely larger than 10,000,000,000 speed.And the speed of digital signal is the highest, the clock cycle of this digital signal is the shortest, connects
Receiving end judge whether to sampling to set up the retention time the shortest, at receiving terminal, erroneous judgement easily occur and then lead
Cause error of transmission.Concrete, receiving terminal needs to sample after the signal stabilization received, due to, connect
The clock cycle of the signal received shortens, and receiving terminal just may be sampled when the signal received is not stablized,
Therefore, receiving terminal is caused may to collect the data of mistake.
Digital signal externally shows as square wave, and essence is the sinusoidal wave superposition of different frequency, as it is shown in figure 1,
Frequency is the highest, and sinusoidal wave amplitude is the least, and corresponding power is the least, i.e. the power of signal high fdrequency component
Relatively low.Due to, the power of signal high fdrequency component is less than the power of low frequency component, therefore, in noise power phase
In the case of Tong, the signal to noise ratio of signal high fdrequency component, less than the signal to noise ratio of low frequency component, causes signal height frequency division
Amount produces huge decay in the transmission.
Data signal rate is the highest, and the highest frequency of the high fdrequency component that this digital signal comprises is the highest, and
Power is the lowest, and the attenuation ratio low frequency component produced in transmission is much bigger, in order to solve this problem, a lot
Equipment (can substantially may be used by the power weighting values of the signal high fdrequency component that debugging improves transmitting terminal transmission
Being to improve amplitude), enough set up the retention time ensureing that receiving terminal has so that receiving terminal can sample
Correct signal.
Currently the method for the debugging of high speed data bus be may include that
The depositor that manually configuration signal high fdrequency component weighted value is corresponding；High-speed oscilloscope test is used to connect
The waveform of receiving end；Constantly adjust the power of signal high fdrequency component, finally make receiving terminal obtain enough foundation and protect
Hold the time, receiving terminal can be made to sample correct signal, it is ensured that the optimization of transmission.
In order to reach higher speed, high speed data bus can comprise many group receiving and transmitting signal lines, and equipment is past
Contact comprises organizes high speed data bus more, often group high speed data bus due to cabling different, its signal high frequency
The attenuation degree of component is the most different, causes needing testing respectively often organizing high speed data bus respectively,
Cause expending more time and manpower, it addition, the high-speed oscilloscope that test uses belongs to valuable scarce resource,
Add debugging cost.
Summary of the invention
Embodiments of the invention provide the method and apparatus of the signal quality debugging of a kind of high speed data bus, adopt
After this programme, the process debugging high speed data bus is simple, and it is real to combine high speed data bus
The state of border transmission signal is tested so that debugging result is the most accurate.
For reaching above-mentioned purpose, embodiments of the invention adopt the following technical scheme that
First aspect, it is provided that the method for the signal quality debugging of a kind of high speed data bus, including:
Control generate reference signal and be input to transmitting terminal；
By high speed data bus and use each power weighting values in the first power weighting values set by institute successively
Stating reference signal send to receiving terminal from transmitting terminal and obtain statistical information, described power weighting values is used for characterizing
Described high speed data bus transmits the weight of the power of described reference signal high fdrequency component, described first power power
Weight values set includes that at least one power weighting values, the quantity of described high speed data bus are at least two；
From described first power weighting values set, obtain error rate according to described statistical information and not higher than preset mistake
Second power weighting values set of rate by mistake, described statistical information is for characterizing by described high speed data bus also
Described each power weighting values is used to transmit the error rate of described reference signal successively；
Described high speed data bus transmission signal high fdrequency component is adjusted according to described second power weighting values set
Through-put power.
Second aspect, it is provided that the device of the signal quality debugging of a kind of high speed data bus, including:
Control module, is used for controlling to generate reference signal, and is input to send by the described reference signal generated
End module；
Initiator block, for receiving the described reference signal that described control module generates, passes through high-speed data
Bus also uses each power weighting values in the first power weighting values set by described reference signal from transmission successively
End sends to receiving terminal module, and described power weighting values is used for characterizing described high speed data bus and transmits described ginseng
Examining the weight of the power of signal high fdrequency component, described first power weighting values set includes that at least one power is weighed
Weight values, the quantity of described high speed data bus is at least two；
Receiving terminal module, for receive described initiator block by described high speed data bus send described
Reference signal；
Described control module, is additionally operable to obtain the statistics letter of the described reference signal that described receiving terminal module receives
Breath, obtains error rate from described first power weighting values set according to described statistical information and not higher than presets mistake
Second power weighting values set of rate by mistake, described statistical information is for characterizing by described high speed data bus also
Described each power weighting values is used to transmit the error rate of described reference signal successively；And for according to described second
Power weighting values set adjusts the through-put power of described high speed data bus transmission signal high fdrequency component.
The method and apparatus of the signal quality debugging of the high speed data bus that the embodiment of the present invention provides, simulation height
High speed data bus is tested by the state transmitting signal during speed data bus real work, i.e. may include that
Different power weighting values is set for high speed data bus transmission signal high fdrequency component, and obtains each power weight
The statistical information that value is corresponding；Transmission signal when then determining high speed data bus real work according to statistical information
The power weighting values of high fdrequency component, the power weighting values determined can make the mistake of the signal that receiving terminal receives
Rate is less than presetting error rate.Bus receiving terminal waveform and signal is tested by high-speed oscilloscope with prior art
The mode of quality adjusts the power weighting values of signal high fdrequency component and compares, and uses this programme total to high-speed data
The process that line carries out debugging is simple, and the state combining high speed data bus actual transmission signal is tested,
Make to debug result the most accurate, it addition, it can test a plurality of high speed data bus, saving test simultaneously
Time, improve testing efficiency.
Accompanying drawing explanation
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to enforcement
In example or description of the prior art, the required accompanying drawing used is briefly described, it should be apparent that, describe below
In accompanying drawing be only some embodiments of the present invention, for those of ordinary skill in the art, do not paying
On the premise of going out creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is square wave and sinusoidal wave relation schematic diagram；
Fig. 2 provides the flow chart of the method for the signal quality debugging of a kind of high speed data bus for the present embodiment；
Fig. 3 provides the flow chart of the method for the signal quality debugging of another kind of high speed data bus for the present embodiment；
Fig. 4 provides the structural representation of the device of the signal quality debugging of a kind of high speed data bus for the present embodiment
Figure；
Fig. 5 provides the structure of the device of the signal quality debugging of another kind of high speed data bus to show for the present embodiment
It is intended to.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clearly
Chu, be fully described by, it is clear that described embodiment be only a part of embodiment of the present invention rather than
Whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art are not making creation
The every other embodiment obtained under property work premise, broadly falls into the scope of protection of the invention.
In prior art, in order to reach higher speed, high speed data bus can comprise organizes receiving and transmitting signal more
Line, and equipment comprises toward contact and organizes high speed data bus more, often group high speed data bus due to cabling different,
The attenuation degree of its high fdrequency component is the most different, causes needs to be tested respectively often organizing high speed data bus,
Cause expending more time and manpower, it addition, the high-speed oscilloscope that test uses belongs to valuable scarce resource,
Add debugging cost.
In order to solve the problems referred to above, the present embodiment provides the side of the signal quality debugging of a kind of high speed data bus
Method, for can be apparent be described following example, the system first applied embodiment is tied
Structure is described, and this method can apply to electronic equipment (e.g., computer etc.), and electronic equipment may include that
Signal generating apparatus, communication equipment, can generate reference signal with control signal generation equipment.
The executive agent of the method for the signal quality debugging of the present embodiment a kind of high speed data bus of offer can be
It is arranged in electronic equipment, as in figure 2 it is shown, may include that
201, control generate reference signal and be input to transmitting terminal.
The control module of the present embodiment debugged apparatus is by controlling generation reference signal, and reference signal is led to
Cross the state of transmission signal when high speed data bus is transmitted simulating high speed data bus real work, with
Realize the test to high-speed transfer bus (in order to simplicity describes, can be described as in subsequent content under test mode).
Test mode is mainly described, i.e. under test mode, by high speed data bus by the present embodiment
Test, determine the power weighting values of high speed data bus actual transmission signal high fdrequency component, then,
Under actual transmissions state, high speed data bus uses the power weighting values of the high fdrequency component determined to carry out signal
Transmission, wherein it is determined that power weighting values make the error rate of signal that receiving terminal receives less than default mistake
Rate.
In order to make place mat for subsequent step, reference signal can be firstly generated.
Further, the control module of debugged apparatus controls generate reference signal and be input to the side of transmitting terminal
Method can be, but not limited to for:
Utilize tester to generate data and be input to transmitting terminal as reference signal；Or, control debugged apparatus and enter
The data produced after row broadcast storm are input to transmitting terminal as reference signal.
The generation method of reference signal is not construed as limiting by the present embodiment, the technology being well known to those skilled in the art,
And can be set according to actual needs, do not repeat them here.
202, by high speed data bus and use each power weighting values in the first power weighting values set successively
Reference signal is sent to receiving terminal from transmitting terminal and obtains statistical information.
Wherein, power weighting values may be used for characterizing the merit of high speed data bus transmission of reference signals high fdrequency component
The weight of rate, the first power weighting values set can include at least one power weighting values, high speed data bus
Quantity be at least two, i.e. can at least two high speed data bus be tested simultaneously.
As an embodiment of the present embodiment, the first power weighting values set can pre-set,
Each power weighting values that first power weighting values set includes can also be arranged according to preset order, with
Just the control module of debugged apparatus can use in the first power weighting values set successively according to preset order
Each power weighting values, arrange once, control by high speed data bus by reference signal from transmitting terminal send to
Receiving terminal is once.
203, from the first power weighting values set, obtain error rate according to the statistical information obtained not higher than to preset
Second power weighting values set of error rate.
Under test mode, if the power weighting values arranged is improper, the foundation of receiving terminal may be caused to keep
Time is shorter, and then causes receiving terminal to receive the signal of mistake, therefore, it can be received by receiving terminal
The error rate of signal judge that the power weighting values of current setting is the most suitable.
Concrete, can successively the power weighting values of high speed data bus transmission of reference signals high fdrequency component be set
It is set to each power weighting values in the first power weighting values set, then, obtains each power weighting values corresponding
Statistical information, statistical information may be used for characterizing by high speed data bus and using each power weighting values successively
The error rate of transmission of reference signals.
204, the transmission of high speed data bus transmission signal high fdrequency component is adjusted according to the second power weighting values set
Power.
Each power weighting values that second power weighting values set includes all can make the signal that receiving terminal receives
Error rate not higher than presets error rate, therefore, it can adjust high-speed data according to the second power weighting values set
The through-put power of bus transfer signal high fdrequency component, i.e. can be by the power of the through-put power of the high fdrequency component of signal
Weight values is set to any power weighting values in the second power weighting values set, so so that in actual transmissions
During the error rate of signal that receives of receiving terminal less than presetting error rate.
In the present embodiment, transmission signal during by generating reference signal simulation high speed data bus real work
High speed data bus is tested by state, i.e. may include that and transmits signal height frequency division into high speed data bus
Amount arranges different power weighting values, and obtains the statistical information that each power weighting values is corresponding；Then according to system
When meter information determines high speed data bus real work, the power weighting values of transmission signal high fdrequency component, determines
Power weighting values can make the error rate of the signal that receiving terminal receives less than presetting error rate.With prior art
In by high-speed oscilloscope test bus receiving terminal waveform and signal quality by the way of adjust signal high fdrequency component
Power weighting values compare, use this programme process that high speed data bus is debugged simple, and tie
The state closing high speed data bus actual transmission signal is tested so that debugging result is the most accurate, it addition,
It can test a plurality of high speed data bus simultaneously, saves the testing time, improves testing efficiency.This method can
To be applied to the network communication equipment possessing high speed data bus, network communication equipment can as debugged apparatus
To include: control module, respectively as transmitting terminal and the high-speed port of receiving terminal, such as ether port.Its
In, control module can control to generate reference signal, and it is high to control to arrange high speed data bus transmission signal
The power weighting values of frequency component is also sent to receiving terminal from transmitting terminal, can control collection equipment and obtain system
Meter information.
The present embodiment provides the further optimization to the method shown in Fig. 2, i.e. performs the debugging shown in Fig. 2
After method, the Partial Power weighted value in the first power weighting values set can be deleted, then perform shown in Fig. 2
Method, in detail as it is shown on figure 3, the side of the signal quality debugging of high speed data bus that provides of the present embodiment
Method specifically may include that
301, from the first power weighting values set, the power weighting values that part is preset, Partial Power weight are deleted
The error rate of the reference signal that value receives for making receiving terminal is higher than the power weighting values presetting error rate.
Before high speed data bus is tested, it is first determined the first power weighting values set, then by height
It is each in the first weighted value set that the power weighting values of speed data bus transmission signal high fdrequency component sets gradually
Power weighting values.
In order to can faster high speed data bus be tested, performed one take turns test after, debugged set
Standby control module can delete Partial Power weighted value from the first power weighting values set, obtains the first merit
Rate weighted value set, so can reduce the quantity of power weighting values to be tested.
Wherein, Partial Power weighted value is that the error rate of the reference signal making receiving terminal receive is higher than presetting mistake
The power weighting values of rate.
Such as, all power weighting values preset include any number in 0 to 15, it has been determined that by high-speed data
When the power weighting values of the high fdrequency component of bus is set to any number in 12 to 15, receiving terminal receives
The error rate of signal is higher than presetting error rate, i.e. Partial Power weighted value includes 12 to 15, then by 12 to 15
Deleting, the first power weighting values set determined can include any number in 0 to 11.
302, control to generate reference signal.
The present embodiment is that the control module of debugged apparatus firstly generates reference signal, and reference signal is passed through
The state of transmission signal when high speed data bus is transmitted simulating high speed data bus real work, with reality
The now test (in order to simplicity describes, can be described as in subsequent content under test mode) to high-speed transfer bus.
Test mode is mainly described, i.e. under test mode, by high speed data bus by the present embodiment
Test, determine the power weighting values of high speed data bus actual transmission signal high fdrequency component, then,
Under actual transmissions state, high speed data bus uses the power weighting values that determines to carry out the transmission of signal, wherein,
The power weighting values determined makes the error rate of the signal that receiving terminal receives less than presetting error rate.
303, being set gradually by the power weighting values of high speed data bus transmission of reference signals high fdrequency component is first
Each power weighting values in power weighting values set.
As an embodiment of the present embodiment, the first power weighting values set can pre-set,
Each power weighting values that first power weighting values set includes can also be arranged according to preset order, with
Just can use each power weighting values in the first power weighting values set will be with reference to letter successively according to preset order
Number from transmitting terminal send to receiving terminal.
Such as, the first power weighting values set can include any number in 0 to 11 the most successively, by height
It is any number in 0 to 11 that the power weighting values of speed data bus transmission signal high fdrequency component sets gradually, i.e.
First high speed data bus transmits the power weighting values of signal high fdrequency component be set to 0 and carry out reference signal biography
Defeated, then it is set to 1 and carries out reference signal transmission, be then set to 2 and carry out reference signal transmission, according to
This order arranges 11 always.
Wherein, power weighting values may be used for characterizing the merit of high speed data bus transmission of reference signals high fdrequency component
The weight of rate, the first power weighting values set can include at least one power weighting values.
The order of the present embodiment numerical value to comprising in the first power weight set is not construed as limiting, can be according to reality
Border needs to be set, and can think random order, such as, the first power weight set may include that 0,
5,7,2,3 etc..
304, at the appointed time in section, by high speed data bus and use the first power weighting values set successively
In each power weighting values by reference signal from transmitting terminal send to receiving terminal.
As an embodiment of the present embodiment, in order to save the transfer resource consumed under test mode, then
Only can pass through high speed data bus transmission of reference signals in preset time period.Concrete, can preset
Initial time instruction high speed data bus transmission reference information, may indicate that high-speed data in default finish time
Bus stops transmission of reference signals.
The present embodiment, to specifying the time period to be not construed as limiting, can be set, at this no longer according to actual needs
Repeat.
305, statistical information is obtained at receiving terminal.
Wherein, statistical information may be used for characterizing by high speed data bus and using each power weighting values successively
The error rate of transmission of reference signals.
For example, it is possible to obtained the statistical information of power weighting values 0 to 11 correspondence by collection equipment, i.e.
The power weighting values of high speed data bus is being set to 0, then by high speed data bus, reference signal is being passed
Obtain statistical information after transporting to receiving terminal, the power weight of high speed data bus can be obtained according to the method again
Value is followed successively by the statistical information that any number in 1 to 11 is corresponding.
306, from the first power weighting values set, obtain error rate according to statistical information and not higher than preset error rate
The second power weighting values set.
Under test mode, if the power weighting values arranged is improper, the foundation of receiving terminal may be caused to keep
Time is shorter, and then causes receiving terminal to receive the data of mistake, therefore, it can be received by receiving terminal
The error rate of data judge that the power weighting values of high fdrequency component of current setting is the most suitable.
Concrete, can successively the power weighting values of high speed data bus transmission of reference signals high fdrequency component be set
It is set to each power weighting values in the first power weighting values set, then, obtains each power weighting values corresponding
Statistical information.
Further, default error rate can be 0.
Such as, after the power weighting values of high speed data bus is set to 10,11, the ginseng that receiving terminal receives
The error rate examining signal is higher than default error rate, then the second power weighting values set can include appointing in 0 to 9
Meaning numerical value.
307, the transmission of high speed data bus transmission signal high fdrequency component is adjusted according to the second power weighting values set
Power.
The power weighting values that second power weighting values set includes can make the mistake of the signal that receiving terminal receives
Rate not higher than presets error rate, therefore, it can adjust high speed data bus according to the second power weighting values set
The through-put power of transmission signal high fdrequency component, i.e. can be set to the second power weighting values set by through-put power
In any power weighting values, so so that the mistake of the signal that receiving terminal receives during actual transmissions
Rate is less than presetting error rate by mistake.
Due to, under the application scenarios such as different STRESS VARIATION, different reference signals, the second power weighting values collection
The numerical range closed may be reduced or increased, therefore, in order to make the power weighting values determined can apply to not
With under scene, can be positioned at be set to numerical value in the second power weighting values set in middle power weighting values.
Further, the biography of high speed data bus transmission high fdrequency component is adjusted according to the second power weighting values set
Defeated power specifically may include that
From the second power weighting values set, obtain numerical value be positioned at the power weighting values of centre；Through-put power is set
It is set to numerical value and is positioned at the power that middle power weighting values is corresponding.
Such as, the second power weighting values set can include any number in 0 to 9, then can be by 4 or 5
It is set to the power weighting values of transmission signal high fdrequency component during high speed data bus real work.
Further, the quantity of high speed data bus is at least two.
In other words, at least two high speed data bus can be tested by the present embodiment simultaneously, the most raw
Become reference signal；Then, by least two high speed data bus and use successively corresponding first power weigh
Reference signal is sent to corresponding receiving terminal by each power weighting values in weight values set from transmitting terminal.Concrete,
The testing procedure of each high speed data bus is referred to step 301 to the content described in step 307,
This repeats no more.
In the present embodiment, the state of transmission signal when utilizing reference signal simulation high speed data bus real work
High speed data bus is tested, i.e. may include that and set for high speed data bus transmission signal high fdrequency component
Put different power weighting values, and obtain the statistical information that each power weighting values is corresponding；Then according to statistics letter
The power weighting values of transmission signal high fdrequency component, the power determined when breath determines high speed data bus real work
Weighted value can make the error rate of the signal that receiving terminal receives less than presetting error rate.Logical with prior art
The mode of high-speed oscilloscope test bus receiving terminal waveform and signal quality of crossing is to adjust the merit of signal high fdrequency component
Rate weighted value is compared, and the process using this programme to debug high speed data bus is simple, and combines height
The state of speed data bus actual transmission signal is tested so that debugging result is the most accurate；It addition, this
Embodiment can also use said method multiple high speed data bus to be carried out test i.e. concurrent testing, phase simultaneously
Ratio uses high-speed oscilloscope to test multiple high speed data bus in prior art, reduce testing cost.
Providing below some device embodiments, this device embodiment method corresponding with above-mentioned offer respectively is real
Execute example corresponding.
The present embodiment provides the device of the signal quality debugging of a kind of high speed data bus, as shown in Figure 4, bag
Include:
Control module 41, is used for controlling to generate reference signal, and the reference signal of generation is input to transmitting terminal
Module；
Initiator block 42, for receiving the reference signal that control module generates, by high speed data bus also
The each power weighting values in the first power weighting values set is used to send reference signal to receiving terminal mould successively
Block, power weighting values is used for characterizing the weight of the power of high speed data bus transmission of reference signals high fdrequency component,
First power weighting values set includes at least one power weighting values, and the quantity of high speed data bus is at least two
Individual；
Receiving terminal module 43, the reference signal sent by high speed data bus for receiving end/sending end module；
Control module 41, is additionally operable to obtain the statistical information of the reference signal that receiving terminal module receives, according to system
Meter information obtains error rate from the first power weighting values set and not higher than presets the second power weight of error rate
Value set, statistical information is for characterizing by high speed data bus and using each power weighting values transmission ginseng successively
Examine the error rate of signal；And for adjusting high speed data bus transmission signal according to the second power weighting values set
The through-put power of high fdrequency component.
In the present embodiment, utilize the reference signal simulation actual work of high speed data bus that control module controls to generate
High speed data bus is tested by the state transmitting signal when making, and i.e. may include that as high speed data bus
Transmission signal arranges the power weighting values of different high fdrequency components, and obtains the statistics that each power weighting values is corresponding
Information；The merit of transmission signal high fdrequency component when then determining high speed data bus real work according to statistical information
Rate weighted value, the power weighting values determined can make the error rate of the signal that receiving terminal receives less than presetting mistake
Rate by mistake.Come by the way of high-speed oscilloscope test bus receiving terminal waveform and signal quality with prior art
The power weighting values adjusting signal high fdrequency component is compared, and uses this programme to debug high speed data bus
Process is simple, and the state combining high speed data bus actual transmission signal is tested so that debugging knot
Fruit is the most accurate, it addition, it can test a plurality of high speed data bus simultaneously, saves the testing time, improves
Testing efficiency.
The present embodiment provides the device of the signal quality debugging of another kind of high speed data bus, and this device is to Fig. 4
Further expanding of shown device, as it is shown in figure 5, may include that
Control module 51, is used for controlling to generate reference signal, and the reference signal of generation is input to transmitting terminal
Module.Control module 51, is input to transmitting terminal specifically for utilizing tester to generate data as reference signal；
Or, the data produced after controlling to carry out broadcast storm are input to transmitting terminal as reference signal.
Initiator block 52, for receiving the reference signal that control module generates, by high speed data bus also
The each power weighting values in the first power weighting values set is used to send reference signal to receiving terminal mould successively
Block, power weighting values is used for characterizing the weight of the power of high speed data bus transmission of reference signals high fdrequency component,
First power weighting values set includes at least one power weighting values, and the quantity of high speed data bus is at least two
Individual；
Receiving terminal module 53, the reference signal sent by high speed data bus for receiving end/sending end module；
Control module 51, is additionally operable to obtain the statistical information of the reference signal that receiving terminal module receives, according to system
Meter information obtains error rate from the first power weighting values set and not higher than presets the second power weight of error rate
Value set, statistical information is for characterizing by high speed data bus and using each power weighting values transmission ginseng successively
Examine the error rate of signal；And for adjusting high speed data bus transmission signal according to the second power weighting values set
The through-put power of high fdrequency component.
Further, control module 51, including:
First arranges unit 511, high for reference signal initiator block sent by high speed data bus
It is each power weighting values in the first power weighting values set that the power weighting values of frequency component sets gradually.
Control unit 512, specifically at the appointed time section, by high speed data bus and use successively
Reference signal is sent to receiving terminal mould by each power weighting values in one power weighting values set from initiator block
Block, it is intended that the time period is the power power of the required precision according to high speed data bus transmission signal and high fdrequency component
The regulated efficiency of weight values determines.
Acquiring unit 513, is positioned at the power weight of centre for obtaining numerical value from the second power weighting values set
Value；
Second arranges unit 514, is positioned at the power weighting values correspondence of centre for through-put power is set to numerical value
Power.
In the present embodiment, transmission signal when utilizing signal generating apparatus simulation high speed data bus real work
High speed data bus is tested by state, i.e. may include that and arranges not into high speed data bus transmission signal
The power weighting values of same high fdrequency component, and obtain the statistical information that each power weighting values is corresponding；Then basis
When statistical information determines high speed data bus real work, the power weighting values of transmission signal high fdrequency component, determines
Power weighting values the error rate of signal that receiving terminal receives can be made less than presetting error rate.With existing skill
Art adjusts signal height frequency division by the way of high-speed oscilloscope test bus receiving terminal waveform and signal quality
The power weighting values of amount is compared, and the process using this programme to debug high speed data bus is simple, and
State in conjunction with high speed data bus actual transmission signal is tested so that debugging result is the most accurate；Separately
Outward, the present embodiment can also use said method that multiple high speed data bus carry out the most parallel survey of test simultaneously
Examination, multiple high speed data bus are tested by middle employing high-speed oscilloscope compared to existing technology, reduce and test into
This.
Through the above description of the embodiments, those skilled in the art is it can be understood that arrive this
Bright can add the mode of required common hardware by software and realize, naturally it is also possible to by hardware, but a lot
In the case of the former is more preferably embodiment.Based on such understanding, technical scheme substantially or
Person says that the part contributing prior art can embody with the form of software product, and this computer is soft
Part product is stored in the storage medium that can read, such as the floppy disk of computer, and hard disk or CD etc., if including
Dry instruction is with so that a computer equipment (can be personal computer, server, or the network equipment
Deng) perform the method described in each embodiment of the present invention.
The above, the only detailed description of the invention of the present invention, but protection scope of the present invention is not limited to
This, any those familiar with the art, in the technical scope that the invention discloses, can readily occur in
Change or replacement, all should contain within protection scope of the present invention.Therefore, protection scope of the present invention should
It is as the criterion with described scope of the claims.
Claims (10)
1. the method for the signal quality debugging of a high speed data bus, it is characterised in that including:
Control generate reference signal and be input to transmitting terminal；
By high speed data bus and use each power weighting values in the first power weighting values set by institute successively
Stating reference signal send to receiving terminal from transmitting terminal and obtain statistical information, described power weighting values is used for characterizing
Described high speed data bus transmits the weight of the power of described reference signal high fdrequency component, described first power power
Weight values set includes that at least one power weighting values, the quantity of described high speed data bus are at least two；
From described first power weighting values set, obtain error rate according to described statistical information and not higher than preset mistake
Second power weighting values set of rate by mistake, described statistical information is for characterizing by described high speed data bus also
Described each power weighting values is used to transmit the error rate of described reference signal successively；
Described high speed data bus transmission signal high fdrequency component is adjusted according to described second power weighting values set
Through-put power.
The method of the signal quality debugging of high speed data bus the most according to claim 1, its feature exists
In, described by high speed data bus and use in the first power weighting values set each power weighting values will successively
Described reference signal includes from the method for transmitting terminal transmission to receiving terminal:
By the power of the described reference signal high fdrequency component that described transmitting terminal is sent by described high speed data bus
Weighted value sets gradually as each power weighting values in described first power weighting values set, by described with reference to letter
The power weight of number high fdrequency component sends to described receiving terminal after being provided with.
The method of the signal quality debugging of high speed data bus the most according to claim 1, its feature exists
In, described method also includes:
Partial Power weighted value, described Partial Power weighted value is deleted from described first power weighting values set
For making the error rate power weight higher than described default error rate of described reference signal that described receiving terminal receives
Value.
The method of the signal quality debugging of high speed data bus the most according to claim 1 and 2, it is special
Levy and be, described by high speed data bus and use each power in the first power weighting values set to weigh successively
Described reference signal from the method for transmitting terminal transmission to receiving terminal is by weight values:
At the appointed time in section, by described high speed data bus and use the first power weighting values set successively
In each power weighting values by described reference signal from transmitting terminal send to described receiving terminal, described appointment time
Section is the required precision according to described high speed data bus transmission signal and the power weighting values of described high fdrequency component
Regulated efficiency determine.
The method of the signal quality debugging of high speed data bus the most according to claim 1 and 2, it is special
Levy and be, described high according to described second power weighting values set adjustment described high speed data bus transmission signal
The through-put power of frequency component includes:
From described second power weighting values set, obtain numerical value be positioned at the power weighting values of centre；
Described through-put power is set to described numerical value and is positioned at the power that middle power weighting values is corresponding.
The method of the signal quality debugging of high speed data bus the most according to claim 5, its feature exists
In, described control to generate reference signal and be input to the method for transmitting terminal be:
Utilize tester to generate data and be input to transmitting terminal as reference signal；Or,
The data produced after controlling to carry out broadcast storm are input to transmitting terminal as reference signal.
7. the device of the signal quality debugging of a high speed data bus, it is characterised in that including:
Control module, is used for controlling to generate reference signal, and is input to send by the described reference signal generated
End module；
Initiator block, for receiving the described reference signal that described control module generates, passes through high-speed data
Bus also uses each power weighting values in the first power weighting values set by described reference signal from described successively
Initiator block sends to receiving terminal module, and described power weighting values is used for characterizing described high speed data bus and passes
The weight of the power of defeated described reference signal high fdrequency component, described first power weighting values set includes at least one
Individual power weighting values, the quantity of described high speed data bus is at least two；
Receiving terminal module, for receive described initiator block by described high speed data bus send described
Reference signal；
Described control module, is additionally operable to obtain the statistics letter of the described reference signal that described receiving terminal module receives
Breath, obtains error rate from described first power weighting values set according to described statistical information and not higher than presets mistake
Second power weighting values set of rate by mistake, described statistical information is for characterizing by described high speed data bus also
Described each power weighting values is used to transmit the error rate of described reference signal successively；And for according to described second
Power weighting values set adjusts the through-put power of described high speed data bus transmission signal high fdrequency component.
The device of the signal quality debugging of high speed data bus the most according to claim 7, its feature exists
In, described control module includes:
First arranges unit, described in described initiator block being sent by described high speed data bus
The power weighting values of reference signal high fdrequency component sets gradually as each merit in described first power weighting values set
Rate weighted value, sends to described receiving terminal after the power weight of described reference signal high fdrequency component being provided with
Module.
9. the device debugged according to the signal quality of the high speed data bus described in claim 7 or 8, it is special
Levying and be, described control module also includes:
Control unit, specifically at the appointed time section, by described high speed data bus and uses successively
Described reference signal is sent by each power weighting values in the first power weighting values set from described initiator block
To described receiving terminal module, the described appointment time period is the precision according to described high speed data bus transmission signal
The regulated efficiency requiring the power weighting values with described high fdrequency component determines.
10. the device debugged according to the signal quality of the high speed data bus described in claim 7 or 8, its
Being characterised by, described control module includes:
Acquiring unit, is positioned at the power power of centre for obtaining numerical value from described second power weighting values set
Weight values；
Second arranges unit, is positioned at the power weight of centre for described through-put power is set to described numerical value
The power that value is corresponding.
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