Summary of the invention
In view of the defect that above-mentioned prior art exists, the present invention proposes a kind of topological structure and control method thereof of power converter, to solving the conduction loss that suppresses above-mentioned common mode leakage current, minimizing device for power switching and the problem that effectively suppresses EMI.
Above-mentioned first purpose of the present invention, a kind of topological structure of power converter, its technical scheme that is achieved is: its basic composition comprises direct voltage source E
d, capacitor C
0, by device for power switching V
2And diode D
2, device for power switching V
4And diode D
4, device for power switching V
5And diode D
5, device for power switching V
7And diode D
7The inversion unit that forms, by inductance L
f1, L
f2, capacitor C
fThe filter unit and the load that form, wherein said direct voltage source E
dPositive pole and C
0Positive pole, V
2Collector electrode, D
2Negative electrode, V
5Collector electrode, D
5Negative electrode be connected to mutually node P, direct voltage source E
dNegative pole and C
0Negative pole, V
4Emitter, D
4Anode, V
7Emitter, D
7Anode be connected to mutually node N
1, V
2Emitter and D
2Anode, V
4Collector electrode, D
4Negative electrode and L
f1An end be connected to mutually node A, V
5Emitter and D
5Anode, V
7Collector electrode, D
7Negative electrode and L
f2An end be connected to mutually Node B, L
f1And L
f2The other end be connected to respectively C
fTwo ends and the two ends of load in node L and node N, it is characterized in that: described topological structure is provided with by device for power switching V based on basic composition
1And diode D
1, inductance L
1, capacitor C
1, diode D
11, D
12The first module that forms, by device for power switching V
3And diode D
3, inductance L
2, capacitor C
2, diode D
10, D
9The second unit that forms, by device for power switching V
6And diode D
6, inductance L
3, capacitor C
3, diode D
15, D
16The Unit the 3rd that forms, by device for power switching V
8And diode D
8, inductance L
4, capacitor C
4, diode D
14, D
13The Unit the 4th that forms; V wherein
1Collector electrode, D
1Negative electrode, V
6Collector electrode, D
6Negative electrode, D
13Negative electrode, D
9Negative electrode be connected to mutually node P, V
1Emitter, D
1Anode, D
11Negative electrode, L
1An end be connected to mutually node D, L
1The other end, C
1An end, C
2An end, L
2An end be connected to mutually node A, D
11Anode, C
1The other end, D
12Negative electrode be connected to mutually node C, L
2The other end, D
10Anode, V
3Collector electrode, D
3Negative electrode be connected to mutually node F, D
10Negative electrode, D
9Anode, C
2The other end be connected to mutually node E, V
3Emitter, D
3Anode, V
8Emitter, D
8Anode, D
16Anode, D
12Anode be connected to mutually node N
1, V
6Emitter, D
6Anode, D
15Negative electrode, L
3An end be connected to mutually node G, L
3The other end, C
3An end, C
4An end, L
4An end be connected to mutually Node B, D
15Anode, C
3The other end, D
16Negative electrode be connected to mutually node H, L
4The other end, D
14Anode, V
8Collector electrode, D
8Negative electrode be connected to mutually node I, D
14Negative electrode, D
13Anode, C
4The other end be connected to mutually node J.
Further, described device for power switching V
1~V
8For one or more in insulated gate bipolar transistor IGBT, mos field effect transistor MOSFET, thyristor SCR, turn-off thyristor GTO and integral gate change transistor IGCT mixed.
Further, described diode D
1~D
8For diode or external diode in the body of diode, mos field effect transistor MOSFET in the body of insulated gate bipolar transistor IGBT.
Further, described direct voltage source E
dBe at least photovoltaic cell component or storage battery.
Further, described load is at least the grid alternating current potential source or is equivalent to the load of resistance, inductance, electric capacity and combination thereof.
Above-mentioned second purpose of the present invention, a kind of control method of power converter, it based on a kind of technical scheme that the above topology structure is achieved is: device for power switching V
1And V
8, V
2And V
7, V
3And V
6, V
4And V
5Conducting simultaneously respectively, shutoff, and V simultaneously
1And V
8, V
3And V
6For instantaneous conducting and ON time immobilize, and V
2And V
7, V
4And V
5ON time follow PWM modulation rule and carry out, and definition output current i
0The direction of load flow through from top to bottom for just, otherwise for negative: i worked as
0For timing, at V
2And V
7Before conducting, must first conducting V
1And V
8, work as L
1, L
4Electric current equal load i
0The time, conducting V
2And V
7And at once turn-off V
1And V
8, keep V
2And V
7The time of conducting state is associated with the PWM modulation width, at once turn-offs V when modulation width arrives
2And V
7At V
2And V
7Have no progeny and V in pass
4And V
5Before conducting, must first conducting V
3And V
6, work as L
2, L
3Electric current equal load i
0The time, conducting V
4And V
5And at once turn-off V
3And V
6, keep V
4And V
5The time of conducting state is associated with the PWM modulation width, at once turn-offs V when modulation width arrives
4And V
5Work as i
0When negative, at V
4And V
5Before conducting, must first conducting V
3And V
6, work as L
2, L
3Electric current equal load i
0The time, conducting V
4And V
5And at once turn-off V
3And V
6, keep V
4And V
5The time of conducting state is associated with the PWM modulation width, at once turn-offs V when modulation width arrives
4And V
5At V
4And V
5Have no progeny and V in pass
2And V
7Before conducting, must first conducting V
1And V
8, work as L
1, L
4Electric current equal load i
0The time, conducting V
2And V
7And at once turn-off V
1And V
8, keep V
2And V
7The time of conducting state is associated with the PWM modulation width, at once turn-offs V when modulation width arrives
2And V
7.
Above-mentioned second purpose of the present invention, a kind of control method of power converter, it based on the another kind of technical scheme that the above topology structure is achieved is: device for power switching V
1And V
8, V
2And V
7, V
3And V
6, V
4And V
5Conducting simultaneously respectively, shutoff, and V simultaneously
1And V
8, V
3And V
6For instantaneous conducting and ON time immobilize, and V
2And V
7, V
4And V
5ON time follow PWM modulation rule and carry out, and definition output current i
0The direction of load flow through from top to bottom for just, otherwise for negative: i worked as
0For timing, at V
2And V
7Before conducting, must first conducting V
1And V
8, work as L
1, L
4Electric current equal load i
0The time, conducting V
2And V
7And at once turn-off V
1And V
8, keep V
2And V
7The time of conducting state is associated with the PWM modulation width, at once turn-offs V when modulation width arrives
2And V
7, keep V
3And V
6, V
4And V
5Turn-off always; Work as i
0When negative, keep V
1And V
8, V
2And V
7Turn-off, at V always
4And V
5Before conducting, must first conducting V
3And V
6, work as L
2, L
3Electric current equal load i
0The time, conducting V
4And V
5And at once turn-off V
3And V
6, keep V
4And V
5The time of conducting state is associated with the PWM modulation width, at once turn-offs V when modulation width arrives
4And V
5.
The topological structure of power converter of the present invention and the application of control method thereof, the outstanding effect that compares to prior art is: when the direct current of photovoltaic battery panel is exported electric energy through topological structure combining inverter of the present invention inversion and outputed to electrical network, can effectively suppress to have common mode leakage current between over the ground of photovoltaic battery panel that distributed capacitance over the ground causes, electromagnetic noise and because of the caused EMI of hard switching action of device for power switching because of photovoltaic battery panel, and reduce the conduction loss of inverter bridge device for power switching, greatly improved the efficiency of grid-connected inverters or Independent Power Generation.
Embodiment
Following constipation closes the embodiment accompanying drawing, the specific embodiment of the present invention is described in further detail, so that technical solution of the present invention is easier to understand, grasp.
One, the topological structure of power converter of the present inventionAs shown in Figure 1, its basic composition comprises direct voltage source E
d1, capacitor C
02, by device for power switching V
2And diode D
2, device for power switching V
4And diode D
4, device for power switching V
5And diode D
5, device for power switching V
7And diode D
7The inversion unit 3 that forms, by inductance L
f1, L
f2, capacitor C
fThe filter unit 4 and the load 5 that form, wherein direct voltage source E
dPositive pole and C
0Positive pole, V
2Collector electrode, D
2Negative electrode, V
5Collector electrode, D
5Negative electrode be connected to mutually
Node P, direct voltage source E
dNegative pole and C
0Negative pole, V
4Emitter, D
4Anode, V
7Emitter, D
7Anode be connected to mutually
Node N 1 , V
2Emitter and D
2Anode, V
4Collector electrode, D
4Negative electrode and L
f1An end be connected to mutually
Node A, V
5Emitter and D
5Anode, V
7Collector electrode, D
7Negative electrode and L
f2An end be connected to mutually
Node B, L
f1And L
f2The other end be connected to respectively C
fTwo ends and the two ends of load in
Node LWith
Node N.As feature of the present invention, this topological structure is provided with by device for power switching V based on above basic composition
1And diode D
1, inductance L
1, capacitor C
1, diode D
11, D
12The first module 6 that forms, by device for power switching V
3And diode D
3, inductance L
2, capacitor C
2, diode D
10, D
9The second unit 7 that forms, by device for power switching V
6And diode D
6, inductance L
3, capacitor C
3, diode D
15, D
16The 3rd unit 8 that forms, by device for power switching V
8And diode D
8, inductance L
4, capacitor C
4, diode D
14, D
13The 4th unit 9 that forms; V wherein
1Collector electrode, D
1Negative electrode, V
6Collector electrode, D
6Negative electrode, D
13Negative electrode, D
9Negative electrode be connected to mutually
Node P, V
1Emitter, D
1Anode, D
11Negative electrode, L
1An end be connected to mutually
Node D, L
1The other end, C
1An end, C
2An end, L
2An end be connected to mutually
Node A, D
11Anode, C
1The other end, D
12Negative electrode be connected to mutually
Node C, L
2The other end, D
10Anode, V
3Collector electrode, D
3Negative electrode be connected to mutually
Node F, D
10Negative electrode, D
9Anode, C
2The other end be connected to mutually
Node E, V
3Emitter, D
3Anode, V
8Emitter, D
8Anode, D
16Anode, D
12Anode be connected to mutually
Node N 1 , V
6Emitter, D
6Anode, D
15Negative electrode, L
3An end be connected to mutually
Node G, L
3The other end, C
3An end, C
4An end, L
4An end be connected to mutually
Node B, D
15Anode, C
3The other end, D
16Negative electrode be connected to mutually
Node H, L
4The other end, D
14Anode, V
8Collector electrode, D
8Negative electrode be connected to mutually
Node I, D
14Negative electrode, D
13Anode, C
4The other end be connected to mutually
Node J.
As further refinement or the optimization of technique scheme, this device for power switching V
1~V
8For one or more in insulated gate bipolar transistor IGBT, mos field effect transistor MOSFET, thyristor SCR, turn-off thyristor GTO and integral gate change transistor IGCT mixed, preferred IGBT.And diode D
1~D
8For diode or external diode in the body of diode, mos field effect transistor MOSFET in the body of insulated gate bipolar transistor IGBT.This direct voltage source E
dAt least be chosen as photovoltaic cell component or storage battery.This load is chosen as at least the grid alternating current potential source or is equivalent to the load of resistance, inductance, electric capacity and combination thereof.
Two, based on aforesaid topological structure, the control method of power converter topological structure of the present invention,Need to prove: pulse width modulation (PWM) is to utilize the numeral of microprocessor to export a kind of very effective technology that analog circuit is controlled, and is widely used in from many fields of measure, communicate by letter power control and conversion.Along with the development of technology, this technology infiltration and development goes out phase voltage and controls PWM, pulsewidth PWM method, random PWM, the various ways such as SPWM, line voltage control PWM.Wherein the SPWM method is exactly to be the break-make of in SPWM waveform control of inverter circuit switching device by sinusoidal rule variation with the PWM waveform of sinusoidal wave equivalence with pulse duration, the area of the pulse voltage of its output is equated with the area of sine wave in respective bins of desired output, by change, modulate frequency and the amplitude that wave frequency and amplitude can be regulated the inverter circuit output voltage., for ease of simplify discussing, below just with the SPWM method, realize the control of power converter of the present invention.
Relatively, the impulse wave of generation is used for triggering driving power switching device V for sinusoidal modulation wave and triangular carrier
2And V
7, V
4And V
5.For clarity, the A in Figure 11 partly also amplifies and is shown in Figure 12 as example, has increased V in figure
1And V
8And V
3And V
6Control signal, this is principal character of the present invention just, its objective is for auxiliary V
2And V
7And V
4And V
5Realize soft switch motion, to reduce switching loss, common mode leakage current and electromagnetic interference EMI.
As shown in Figure 2, establish output current i
0Flow through the direction of load from top to bottom for just, lower surface analysis i
0For the operation principle of this circuit of timing, total following 9 kinds of mode of operations.
Pattern 1: as shown in figure 13, at t
0~t
1During this time, main circuit device for power switching V
1And V
8All be in off state, inductance L
f1, L
f2In afterflow, its two ends back-emf as shown in Figure 2, output current i
0By E
dNegative pole sets out, through N
1, D
4, L
f1, load, L
f2, D
5, dc bus P gets back to E
dAnodal.This moment V
2And V
7Electric current be 0, voltage is E
d, V
1And V
8Electric current be 0, and because of C
1And C
4Voltage be 0, so V
1And V
8Voltage be E
d, V
4And V
5For negative current (diode D
4And D
5Forward conduction), as shown in figure 15.
Pattern 2: as shown in figure 13, to t
1Constantly, make device for power switching V
1And V
8Conducting, main circuit except current circuit shown in Figure 2, E
dPositive pole is also through dc bus P, V
1, L
1, L
f1, load, L
f2, L
4, V
8, N
1Get back to E
dNegative pole.Due to L
1, L
4Existence, obviously, V
1, V
8With the conducting of zero current (ZCS) mode, as V in Figure 15
1And V
8Electric current shown in; Along with L
1, L
4The increase of electric current, V
4And V
5Negative current reduce gradually (seeing also equally Figure 15), L
1, L
4And L
f1, L
f2The back-emf direction as shown in Figure 3.
Mode 3: work as L
1, L
4In Current rise to equaling load current i
0The time, D
4And D
5Naturally turn-off.Obvious this shutoff belongs to the ZCS mode and turn-offs.This moment L
1, L
4In electric current want along with i
0Continue to increase L
1, L
4And L
f1, L
f2The back-emf direction as shown in Figure 4.Due to L
1, L
4The effect of back-emf, so at t
2V before
4And V
5Voltage be still 0, as shown in figure 15.
Pattern 4: as shown in figure 13, to t
2Constantly, make V
2And V
7Conducting, because inductive current can not suddenly change, i.e. L
1, L
4In electric current equal L
f1, L
f2In current i
0So, V
2And V
7Electric current or 0, i.e. V
2And V
7With the conducting of ZCS mode, as Fig. 5 and shown in Figure 15.
Pattern 5: due in a upper pattern, V
2And V
7Conducting, make L
1, L
4Two ends by short circuit, therefore L
1, L
4Charged state stop immediately.But because this inductive current keeps and i
0Identical, can not suddenly change, therefore L
1, L
4Back-emf changed direction (as shown in Figure 6).Therefore V
2And V
7Electric current also remain zero.
Pattern 6: as shown in figure 13, at t
3Constantly, turn-off V
1And V
8, L
1, L
4Back-emf pass through respectively C
1D
11And D
14C
4Give C
1And C
4Charging.Owing to just starting to charge, capacitor C
1And C
4Terminal voltage be zero, and the A point and the P point idiostatic, B point and N
1Point is idiostatic, if ignore D
11And D
14Tube voltage drop, P and D point are idiostatic, N
1Point is idiostatic with the I point, therefore V
1And V
8All in no-voltage (ZVS) mode, turn-off.C
1, C
4Two ends start progressively to charge from no-voltage, D point current potential reduces gradually, I point current potential raises gradually, so V
1And V
8Voltage also progressively rise, as Fig. 7, shown in Figure 15.Just due to L
1, L
4Give C
1And C
4Charging, for keeping i
0Constant, by V
2And V
7Electric current supplement this electric current, so V
2And V
7A larger electric current is arranged suddenly, but V
2And V
7Terminal voltage be zero already, do not have the switching loss problem.
Mode 7: work as C
1, C
4Terminal voltage rise to and equal dc voltage E
dThe time, V
1And V
8Voltage be E
d, charging process finishes, but L
1, L
4In dump energy will continue to i
0Discharge.In like manner, for keeping i
0Constant, V
2And V
7Electric current sharply descend again, but this does not cause V
2And V
7Switching loss.L wherein
1In energy pass through L
f1, load, L
f1, V
7, D
12, D
11Discharge, and L
4In energy pass through D
14, D
13, V
2, L
f1, load, L
f2Discharge, as Fig. 8, shown in Figure 15.
Pattern 8: to t
4Constantly, L
1, L
4In dump energy discharge complete, V
2And V
7Electric current progressively increase to again i
0, as shown in figure 15, DC power supply E
dProvide energy by this loop to load.At C
1And C
4Voltage be E
dUnder effect, V appears again
1And V
8Voltage be 0, as Fig. 9 and shown in Figure 14.
Pattern 9: until t
5Constantly, as shown in figure 13, turn-off V
2And V
7.Due to L
f1, L
f2In current i
0Can not suddenly change, its terminal voltage has all changed direction, as shown in figure 10.i
0From L
f2The B point in left side sets out, through C
4, D
13, E
d, D
12, C
1, L
f1, load, arrive L
f2The N point on right side form loop, C
1, C
4Start discharge.C
1, C
4While just starting to discharge, because its terminal voltage is respectively DC power supply voltage E
dIf ignore diode D
12And D
13Tube voltage drop, i.e. C point and N
1Point is idiostatic, and J point and P point are idiostatic, reaches B, N between P, A
1Between voltage difference be all respectively zero.Therefore, V
2And V
7, V
1And V
8Shutoff be all the ZVS mode.Work as C
1, C
4Upper electric charge releases complete, load current i
0Circulation path got back to again state shown in Figure 2.
At t after this
6~t
9(as Figure 14, shown in Figure 15) during this time, the action sequence of this circuit is same as described above, but because V
4V
3D
3L
2And V
5V
6D
6L
3Respectively by D
4, D
5Bypass, so V
3And V
4And V
6And V
5Terminal voltage and electric current be all 0, the operating state of main circuit is still as shown in Figure 2.
Just due to t
6~t
9During this time, V
4V
3D
3L
2And V
5V
6D
6L
3All inoperative, so V
3~V
6Can turn-off always, namely can not adopt control method shown in Figure 11 and adopt control method shown in Figure 14 also can.
As output current i
09 kinds of mode of operations, its operation principle and above-mentioned i are also arranged when negative
0Similar for timing, repeat therefore omit.In like manner because V
1V
2D
1L
1And V
8V
7D
8L
4Respectively by D
2, D
7Bypass, so V
1, V
2, V
7, V
8Can turn-off always, namely can not adopt control method shown in Figure 11 and adopt control method shown in Figure 14 also can.
Three, result of implementation analysisAs shown in figure 16, be originally the simulation result of the common mode leakage current schematic diagram of invention topological structure.If direct voltage source E herein
dRefer to PV, in figure, upper 1/3rd waveform tables show E
dAnode common mode current over the ground, central 1/3rd waveform tables show E
dNegative terminal common mode current over the ground, lower 1/3rd waveform tables show the output current that is incorporated into the power networks of power converter.Can find out: the frequency of two common mode current waveform envelope lines is identical with grid-connected current is all 50Hz, so this 50Hz waveform is not common mode current.Real common mode current is included in the high fdrequency component in this envelope, shows as on the thickness of this envelope waveform.Obviously this envelope is very thin, and this shows that this topological common mode current reality is very little.But, as certification authority, usually only see the size of the whole waveforms amplitude that comprises envelope.In Figure 16, the demarcation of the longitudinal axis is 0.2A/div, i.e. 200mA/div, and the peak-to-peak value of this waveform is strong about 100mA, and its unimodal value (being amplitude) is strong about 50mA, and this numerical value is far below the 300mA limiting value of stipulating in TUV Valuation Standard VDE0126-1-1.Therefore say, use topological structure of the present invention can effectively suppress the common mode current that the distributed capacitance because of PV causes.In addition, because the switching process of device for power switching is all with soft switch form, its effect that suppresses EMI and switching loss is self-evident.