CN103390652A - Groove charge compensation schottky semiconductor device and manufacture method thereof - Google Patents
Groove charge compensation schottky semiconductor device and manufacture method thereof Download PDFInfo
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- CN103390652A CN103390652A CN2012101526852A CN201210152685A CN103390652A CN 103390652 A CN103390652 A CN 103390652A CN 2012101526852 A CN2012101526852 A CN 2012101526852A CN 201210152685 A CN201210152685 A CN 201210152685A CN 103390652 A CN103390652 A CN 103390652A
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Abstract
The invention discloses a groove charge compensation schottky semiconductor device. The groove charge compensation schottky semiconductor device has a charge compensation structure. When the semiconductor device receives certain reverse bias voltage, a first conductive semiconductor material and a second conductive semiconductor material can form charge compensation, and the reverse blocking characteristic of the device is improved. Electrode metal is led into the upper portion of a groove, so that the peak value electric field intensity of the schottky junction surface during the semiconductor device receives the reverse bias voltage can be reduced, and the reverse blocking characteristic of the device is further improved. The invention further provides a manufacture method of the groove charge compensation schottky semiconductor device.
Description
Technical field
The present invention relates to a kind of ditch trench charge compensation Schottky semiconductor device, the invention still further relates to a kind of preparation method of ditch trench charge compensation Schottky semiconductor device.Semiconductor device of the present invention is the basic structure of making power rectifier device.
Background technology
Power semiconductor is used on power management and application of power in a large number, the semiconductor device that specially refers to schottky junction has become the important trend of device development, schottky device has that the forward cut-in voltage is low opens the advantages such as turn-off speed is fast, simultaneously also to have a reverse leakage current large for schottky device, can not be applied to the shortcomings such as hyperbaric environment.
Schottky diode can be by multiple different topology manufacturing, the most frequently used is plane figure, traditional planer schottky diode has the Electric Field Distribution curve of sudden change in drift region, affected the reverse breakdown characteristics of device, traditional planer schottky diode has higher conducting resistance simultaneously.
Summary of the invention
The present invention is directed to the problems referred to above and propose, a kind of ditch trench charge compensation Schottky semiconductor device and preparation method thereof is provided.
A kind of ditch trench charge compensation Schottky semiconductor device is characterized in that: comprising: substrate layer, for semi-conducting material forms; Drift layer, be that the first conductive semiconductor material forms, and is positioned on substrate layer; A plurality of groove structures, groove is arranged in drift layer, and face in drift layer by the trench wall region division the second conductive semiconductor material is arranged, the interior under-filled insulating material that has of groove, the groove internal upper part is filled electrode metal; Schottky barrier junction, be positioned at the first conductive semiconductor material upper surface.
A kind of preparation method of ditch trench charge compensation Schottky semiconductor device is characterized in that: comprise the steps: to form the first conductive semiconductor material layer on the substrate layer surface, then surface forms insulation material layer; Carry out lithography corrosion process and remove the surface portion dielectric, then etching is removed part bare semiconductor material and is formed groove; Carry out the second conductive impurity diffusion in groove; Deposition insulating material in groove, anti-carve the erosion insulating material, and remove the surface insulation material; The deposit barrier metal, carry out sintering and form schottky barrier junction.
When semiconductor device connect certain reverse biased, the first conductive semiconductor material and the second conductive semiconductor material can form charge compensation, improved the reverse breakdown voltage of device.Therefore also can improve the impurity doping content of drift region, thereby can reduce the forward conduction resistance of device, improve the forward conduction characteristic of device.
Introduce electrode metal by groove top, the peak value electric field intensity on schottky junction surface in the time of can reducing semiconductor device and connect reverse biased, thus further improve the reverse blocking voltage of device.
Description of drawings
Fig. 1 is a kind of ditch trench charge compensation Schottky semiconductor device generalized section of the present invention;
Fig. 2 is a kind of ditch trench charge compensation Schottky semiconductor device generalized section of the present invention.
Wherein,
1, substrate layer;
2, silicon dioxide;
3, the first conductive semiconductor material;
4, the second conductive semiconductor material;
5, schottky barrier junction;
6, silicon nitride;
10, upper surface metal level;
11, lower surface metal layer.
Embodiment
Fig. 1 is a kind of ditch trench charge compensation Schottky semiconductor device profile of the present invention, below in conjunction with Fig. 1, describes semiconductor device of the present invention in detail.
A kind of Schottky semiconductor device comprises: substrate layer 1, be N conductive type semiconductor silicon materials, and the doping content of phosphorus atoms is 1E19/CM
3, at substrate layer 1 lower surface, by lower surface metal layer 11 extraction electrodes; The first conductive semiconductor material 3, be positioned on substrate layer 1, is the semiconductor silicon material of N conduction type, and the doping content of phosphorus atoms is 1E16/CM
3The second conductive semiconductor material 4, be positioned near trench wall, is the semiconductor silicon material of P conduction type, and the doping content of boron atom is 3E16/CM
3 Schottky barrier junction 5, be positioned at the surface of the first conductive semiconductor material 3, is the silicide that semiconductor silicon material and barrier metal form; Silicon dioxide 2, be positioned at the groove bottom; Device upper surface and groove internal upper part are with upper surface metal level 10, for device is drawn another electrode.
Its manufacture craft comprises the steps:
The first step, form the first conductive semiconductor material layer in the surperficial extension of substrate layer 1, and deposit forms silicon nitride layer;
Second step, carry out lithography corrosion process, and semiconductor material surface is removed the part silicon nitride, and then etching is removed part bare semiconductor silicon materials and formed groove;
In the 3rd step, carry out the boron impurity diffusion in groove;
In the 4th step, deposit forms silicon dioxide 2 in groove, anti-carves erosion silicon dioxide 2, the erosion removal silicon nitride layer;
The 5th step,, at semiconductor material surface deposit barrier metal, carry out sintering and form schottky barrier junction 5, then at the surface deposition metal, form upper surface metal level 10;
The 6th step, carry out back side metallization technology, form overleaf lower surface metal layer 11, as shown in Figure 1.
Fig. 2 is a kind of ditch trench charge compensation Schottky semiconductor device profile of the present invention, below in conjunction with Fig. 2, describes semiconductor device of the present invention in detail.
A kind of Schottky semiconductor device comprises: substrate layer 1, be N conductive type semiconductor silicon materials, and the doping content of phosphorus atoms is 1E19/CM
3, at substrate layer 1 lower surface, by lower surface metal layer 11 extraction electrodes; The first conductive semiconductor material 3, be positioned on substrate layer 1, is the semiconductor silicon material of N conduction type, and the doping content of phosphorus atoms is 1E16/CM
3The second conductive semiconductor material 4, be positioned near trench wall, is the semiconductor silicon material of P conduction type, and the doping content of boron atom is 3E16/CM
3 Schottky barrier junction 5, be positioned at the surface of the first conductive semiconductor material 3, is the silicide that semiconductor silicon material and barrier metal form; Silicon dioxide 2, be positioned at trench wall; Silicon nitride 6, be positioned at the groove bottom; Device upper surface and groove internal upper part are with upper surface metal level 10, for device is drawn another electrode.
Its manufacture craft comprises the steps:
The first step, form the first conductive semiconductor material layer in the surperficial extension of substrate layer 1, and deposit forms silicon nitride layer;
Second step, carry out lithography corrosion process, and semiconductor material surface is removed the part silicon nitride, and then etching is removed part bare semiconductor silicon materials and formed groove;
The 3rd step, carry out the boron impurity diffusion in groove, form silicon dioxide 2 at trench wall simultaneously;
In the 4th step, deposit forms silicon nitride 6 in groove, anti-carves erosion silicon nitride 6;
The 5th step,, at semiconductor material surface deposit barrier metal, carry out sintering and form schottky barrier junction 5, then at the surface deposition metal, form upper surface metal level 10;
The 6th step, carry out back side metallization technology, form overleaf lower surface metal layer 11, as shown in Figure 2.
Set forth the present invention by above-mentioned example, also can adopt other example to realize the present invention simultaneously, the present invention is not limited to above-mentioned instantiation, so the present invention is by the claims circumscription.
Claims (10)
1. ditch trench charge compensation Schottky semiconductor device is characterized in that: comprising:
Substrate layer, for semi-conducting material forms;
Drift layer, be that the first conductive semiconductor material forms, and is positioned on substrate layer; A plurality of
Groove structure, groove is arranged in drift layer, and face in drift layer by the trench wall region division the second conductive semiconductor material is arranged, the interior under-filled insulating material that has of groove, the groove internal upper part is filled electrode metal;
Schottky barrier junction, be positioned at the first conductive semiconductor material upper surface.
2. semiconductor device as claimed in claim 1 is characterized in that: described substrate layer is the semi-conducting material of high concentration impurities doping.
3. semiconductor device as claimed in claim 1, is characterized in that: the superimposed layer of the semiconductor material layer that described substrate layer can adulterate for semiconductor material layer and the low concentration impurity of high concentration impurities doping.
4. semiconductor device as claimed in claim 1 is characterized in that: in described groove, under-filled insulating material can be silicon dioxide.
5. semiconductor device as claimed in claim 1, it is characterized in that: described the second conductive semiconductor material upper surface is ohmic contact regions.
6. semiconductor device as claimed in claim 1, it is characterized in that: described the second conductive semiconductor material sidewall is ohmic contact regions, directly with electrode metal, is connected.
7. semiconductor device as claimed in claim 1, is characterized in that: also can have insulation material layer between described the second conductive semiconductor material sidewall and electrode metal and isolate.
8. semiconductor device as claimed in claim 1, it is characterized in that: described the second conductive semiconductor material and drift layer the first conductive semiconductor material can form the charge compensation structure.
9. semiconductor device as claimed in claim 1 is characterized in that: described Schottky barrier is become the barrier junction that barrier metal and the first conductive semiconductor material form.
10. the preparation method of a kind of ditch trench charge compensation Schottky semiconductor device as claimed in claim 1, is characterized in that: comprise the steps:
1) form the first conductive semiconductor material layer on the substrate layer surface, then surface forms insulation material layer;
2) carry out lithography corrosion process and remove the surface portion dielectric, then etching is removed part bare semiconductor material and is formed groove;
3) carry out the second conductive impurity diffusion in groove;
4) deposition insulating material in groove, anti-carve the erosion insulating material, and remove the surface insulation material;
5) deposit barrier metal, carry out sintering and form schottky barrier junction.
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| CN103390652B CN103390652B (en) | 2017-04-26 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6710418B1 (en) * | 2002-10-11 | 2004-03-23 | Fairchild Semiconductor Corporation | Schottky rectifier with insulation-filled trenches and method of forming the same |
| US20050242411A1 (en) * | 2004-04-29 | 2005-11-03 | Hsuan Tso | [superjunction schottky device and fabrication thereof] |
| US20110227187A1 (en) * | 2006-07-28 | 2011-09-22 | Panasonic Corporation | Schottky barrier semiconductor device |
| CN102820294A (en) * | 2011-06-03 | 2012-12-12 | 飞兆半导体公司 | Integration of superjunction MOSFET and diode |
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2012
- 2012-05-07 CN CN201210152685.2A patent/CN103390652B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6710418B1 (en) * | 2002-10-11 | 2004-03-23 | Fairchild Semiconductor Corporation | Schottky rectifier with insulation-filled trenches and method of forming the same |
| US20050242411A1 (en) * | 2004-04-29 | 2005-11-03 | Hsuan Tso | [superjunction schottky device and fabrication thereof] |
| US20110227187A1 (en) * | 2006-07-28 | 2011-09-22 | Panasonic Corporation | Schottky barrier semiconductor device |
| CN102820294A (en) * | 2011-06-03 | 2012-12-12 | 飞兆半导体公司 | Integration of superjunction MOSFET and diode |
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| CN103390652B (en) | 2017-04-26 |
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Effective date of registration: 20210426 Address after: Room 301, 3rd floor, building 16, Guangxi Huike Technology Co., Ltd., No. 336, East extension of Beihai Avenue, Beihai Industrial Park, 536000, Guangxi Zhuang Autonomous Region Patentee after: Beihai Huike Semiconductor Technology Co.,Ltd. Address before: 113200 Liaoning Province Xinbin Manchu Autonomous County Federation of disabled persons Patentee before: Zhu Jiang |