CN103390597A - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
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- CN103390597A CN103390597A CN201310008815XA CN201310008815A CN103390597A CN 103390597 A CN103390597 A CN 103390597A CN 201310008815X A CN201310008815X A CN 201310008815XA CN 201310008815 A CN201310008815 A CN 201310008815A CN 103390597 A CN103390597 A CN 103390597A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
- H01L23/49551—Cross section geometry characterised by bent parts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/77—Apparatus for connecting with strap connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/37001—Core members of the connector
- H01L2224/3701—Shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/3754—Coating
- H01L2224/37599—Material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/77—Apparatus for connecting with strap connectors
- H01L2224/7725—Means for applying energy, e.g. heating means
- H01L2224/773—Means for applying energy, e.g. heating means by means of pressure
- H01L2224/77343—Means for applying energy, e.g. heating means by means of pressure by ultrasonic vibrations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/842—Applying energy for connecting
- H01L2224/84201—Compression bonding
- H01L2224/84205—Ultrasonic bonding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
- Connections Effected By Soldering, Adhesion, Or Permanent Deformation (AREA)
Abstract
The invention relates to a semiconductor device which can fasten terminal by full strength. The semiconductor device (100) has terminals (30) with a planar portion (30a) that is joined by an ultrasound joining process at a predetermined connecting portion. The terminals are bent, such that a certain space is formed over a surface of the terminal opposite to the surface which is joined to the planar portion at the connecting portion. The planar portions (30a) of all terminals (30) are extended in a direction from the interior of semiconductor device (100) to an outer side of the semiconductor device (100).
Description
Technical field
The present invention relates to utilize ultrasonic wave to engage the semiconductor device of making.
Background technology
When the terminal that will be arranged at the semiconductor devices such as semiconductor chip is engaged in substrate etc., mainly use scolder.In recent years, the high temperature development the during driving of semiconductor chip etc., in solder bonds, the possibility that scolder comes off uprises, and can't obtain high reliability.
Therefore, recently developed as described in Patent Document 1 like that terminal is carried out the technology that ultrasonic wave engages (below, also referred to as prior art A).
The prior art document
Patent documentation
Patent documentation 1: No. 278913 communiques of TOHKEMY 2006 –.
The problem that invention will solve
Yet in prior art A, the leading section of terminal (busbar (bus bar)) is arranged in recess, is not easy to be used for carrying out ultrasonic tool (wedge (wedge)) that ultrasonic wave engages and this leading section butt fully.Therefore, there are the following problems: the ultrasonic vibration from ultrasonic tool can not be delivered to fully the leading section of terminal, and can not be with sufficient intensity fixed terminal.
Summary of the invention
The present invention completes in order to solve such problem, and its purpose is to provide a kind of semiconductor device with sufficient intensity fixed terminal.
Be used for solving the scheme of problem
To achieve these goals, the semiconductor device of a mode of the present invention utilizes ultrasonic wave to engage to make.Described semiconductor device possesses a plurality of terminals, described a plurality of terminal has the planar section that utilizes described ultrasonic wave joint to engage with the connecting portion of regulation, each described terminal bends become described planar section be in the face opposition side that engages with described connecting portion face above be provided with the space of regulation, the whole described planar section that each described terminal has extends towards the direction of the outside of described semiconductor device in the inside from described semiconductor device.
The invention effect
According to the present invention, semiconductor device possesses a plurality of terminals, and described a plurality of terminals comprise the planar section that utilizes described ultrasonic wave joint to engage with the connecting portion of regulation.Each described terminal bends become described planar section be in the face opposition side that engages with described connecting portion face above be provided with the space of regulation, the included whole described planar section of each described terminal extends towards the direction of outside in the inside from described semiconductor device.
Thus, carrying out ultrasonic wave while engaging, can be easily and will be used for reliably carrying out the ultrasonic tool of this ultrasonic wave joint and planar butt of each terminal.Therefore, can utilize ultrasonic wave to engage and engage accurately each terminal.Therefore, when carrying out the ultrasonic wave joint, can be with sufficient intensity fixed terminal.Therefore, can provide semiconductor device with sufficient intensity fixed terminal.
Description of drawings
Fig. 1 means the stereogram of structure of the semiconductor device of execution mode 1.
Fig. 2 means the figure of the structure of terminal.
Fig. 3 is the figure for the thickness of explanation terminal.
Fig. 4 means the figure of structure of terminal of the variation 2 of execution mode 1.
Fig. 5 means the figure of another example of structure of terminal of the variation 2 of execution mode 1.
Fig. 6 means the figure of structure of terminal of the variation 3 of execution mode 1.
Fig. 7 means the block diagram of the structure of semiconductor device as a comparative example.
Fig. 8 means the figure that semiconductor device is as a comparative example used an example of ultrasonic tool.
Embodiment
Below, Yi Bian with reference to accompanying drawing, Yi Bian embodiments of the present invention are described.In the following description, to the identical identical Reference numeral of structural element mark.Their title and function are also identical.Therefore, there is situation about omitting their detailed description.
Have, the size of illustrative each structural element in execution mode, material, shape, their relative configuration etc. are suitably changed according to structure or the various condition of application device of the present invention again, and the present invention is not limited to these illustrations.In addition, there is the size situation different from actual size of each structural element in each figure.
＜comparative example 〉
Fig. 7 means the block diagram of the structure of semiconductor device 1000 as a comparative example.In Fig. 7, each of X, Y, Z direction is mutually orthogonal.Also mutually orthogonal in each of X, the Y shown in following figure, Z direction.Below, will comprise that also the rightabout direction of directions X and this directions X is called X-direction.The rightabout direction that also will comprise Y-direction and this Y-direction in addition, is called Y direction.The rightabout direction that also will comprise Z direction and this Z direction in addition, is called Z-direction.
Be provided with for example switch driving circuit on each substrate 20.This switch driving circuit for example forms electric power inverter (inverter) circuit.Be provided with the not shown connecting portion of controlling voltage etc. for switch driving circuit is applied on each substrate 20.
3 terminals 40 are fixed in the not shown framework at the place, top of these 3 terminals 40.Therefore, each terminal 40 does not move substantially.In order to carry out outside to connect, 3 terminals 40 are exported to outside framework.3 terminals 40 arrange in the mode of along Y direction, arranging.
Each terminal 40 has the shape of two forks.Terminal 40 has 2 planar 40a with the main surface parallel of substrate 20.The part that leading section that each planar 40a is terminal 40 has been bent.Each planar 40a extends on Y-direction.When one of terminal 40 planar 40a was engaged, this terminal 40 did not move (being fixed).
Utilize in the joint of terminal 40 and be used for carrying out the ultrasonic tool 200 that ultrasonic wave engages.Because ultrasonic tool 200 is the general instruments that engage be used to carrying out ultrasonic wave, so be not described in detail.Below, describe simply.Ultrasonic tool 200 carries out ultrasonic vibration on the direction of regulation, and the object that engages is pressurizeed, and carries out thus ultrasonic wave and engages.
, at this,, as an example, suppose that ultrasonic tool 200 carries out ultrasonic vibration on Y direction.In addition, suppose that in the situation that carry out ultrasonic wave and engage, ultrasonic tool 200 moves on Y direction.
2 planar 40a of terminal 40 engage with 2 connecting portions that are separately positioned on 2 substrates 20 arranging along certain row (directions X).Thus, by the end from terminal 40, apply voltage, thereby can apply voltage to the connecting portion that engages with each planar 40a of terminal 40.
Have again, in the joint method of existing utilization welding, need not to take notice of planar 40a of terminal 40() towards.Yet, in ultrasonic wave engages, utilize terminal towards bond strength is changed significantly.
Have again, in the structure of semiconductor device 1000,, in order to make ultrasonic tool 200 easily making terminal 40 carry out vibrating on the direction of ultrasonic vibration, need to make the leading section of ultrasonic tool 200 elongated.The leading section of ultrasonic tool 200 is the parts of extending on Z-direction in ultrasonic tool 200.That is,, if make the leading section of ultrasonic tool 200 elongated, can put into ultrasonic tool 200, can carry out ultrasonic wave and engage.
Yet in the situation that make the leading section of ultrasonic tool 200 elongated, energy (ultrasonic vibration) is difficult to be delivered to planar 40a of terminal 40(), so the bond strength step-down in the ultrasonic wave joint.That is, in the situation that make the leading section of ultrasonic tool 200 elongated, the transmission variation of ultrasonic energy, cause bond strength deteriorated.
Therefore, as shown in Figure 8, the direction of the ultrasonic vibration of ultrasonic tool 200 is made as X-direction.In this case, can put into ultrasonic tool 200 between each terminal 40, but when carrying out the ultrasonic wave joint, make the stress that terminal 40 moves become large.In this case, the energy (ultrasonic vibration) from ultrasonic tool 200 can't be delivered to fully terminal 40 and produce loss, the bond strength step-down of terminal 40.
In addition, as shown in Figure 8, at planar 40a, in the upper structure of extending of Y-direction (direction that a plurality of terminals 40 are arranged), in the situation that carry out ultrasonic wave, engage, also have following problem.For example, suppose that planar 40a of certain 1 terminal 40 is engaged by ultrasonic wave, planar 40a of another of this terminal 40 do not engaged by ultrasonic wave.
In this case, when in order to carry out ultrasonic wave to engage to this another planar 40a, using this another planar the 40a that extends on Y-direction 200 pairs of the ultrasonic tools that carries out ultrasonic vibration on X-direction to transmit ultrasonic vibration, easily to having carried out planar 40a transmitting vibrations that engages.Consequently, the bond strength of a planar 40a is deteriorated.In addition, in this case, the possibility that planar 40a comes off is also high.
＜execution mode 1 〉
In the present embodiment, the problem in the above-mentioned comparative example of solution.
Fig. 1 means the stereogram of structure of the semiconductor device 100 of execution mode 1.About semiconductor device 100, details will be narrated in the back, and this semiconductor device 100 utilizes ultrasonic wave to engage to make.
With reference to Fig. 1, semiconductor device 100 possesses base station 10,6 substrates 20 and 3 terminals 30.Have again, in Fig. 1, for reduced graph, not shown framework be used to accommodating base station 10 and a plurality of substrate 20.
Have, the quantity of substrate 20 is not limited to 6 again, for example, can be also more than 8.In addition, the quantity of terminal 30 is not limited to 3, can be also more than 4.
Interarea at base station 10 is fixed with 6 substrates 20.As an example, 6 substrates 20 are aligned to 2 row 3 row.
Be provided with for example switch driving circuit on each substrate 20.This switch driving circuit for example forms the electric power inverter circuit.Be provided with the not shown connecting portion of controlling voltage etc. for switch driving circuit is applied on each substrate 20.
3 terminals 30 are fixed in the not shown framework at the place, top of these 3 terminals 30.Therefore, each terminal 30 does not move substantially.In order to carry out outside to connect, 3 terminals 30 are exported to outside framework.3 terminals 30 arrange in the mode of along Y direction, arranging.
Fig. 2 means the figure of the structure of terminal 30.
With reference to Fig. 1 and Fig. 2, terminal 30 has the shape of two forks.Terminal 30 has 2 planar 30a with the main surface parallel of substrate 20.The part that leading section that each planar 30a is terminal 30 has been bent.That is, each terminal 30 bend to planar 30a be in the face opposition side that engages with connecting portion face above be provided with the space of regulation.Whole planar the 30a that each terminal 30 has extends towards the direction of the outside of semiconductor device 100 in the inside from semiconductor device 100.That is, making the direction that planar 30a extends is easily to carry out US(Ultra Sonic: the ultrasonic wave) direction of vibration.
Specifically, each of 2 of each terminal 30 planar 30a is extended on the mutual different direction along X-direction.That is to say, planar 30a of each of each terminal 30 is configured in the mode of the obstruction that can not become ultrasonic tool 200 and move.
In addition, each terminal 30 also has the setting unit of setting 30b.Erectting setting unit 30b is with respect to planar the planar part that 30a is substantially vertical.
Utilize in the joint of terminal 30 and be used for carrying out the above-mentioned ultrasonic tool 200 that ultrasonic wave engages.
, at this,, as an example, suppose that ultrasonic tool 200 carries out ultrasonic vibration on X-direction.In addition, suppose that in the situation that carry out ultrasonic wave and engage, ultrasonic tool 200 moves on X-direction.
As mentioned above, each terminal 30 bend to planar 30a be in the face opposition side that engages with connecting portion face above be provided with the space of regulation.In addition, as mentioned above, each of 2 planar 30a of each terminal 30 is extended on the mutual different direction along X-direction.
Utilize this structure, can be easily and make reliably planar 30a butt of ultrasonic tool 200 and each terminal 30.Consequently, can engage accurately each terminal 30.Therefore, when carrying out the ultrasonic wave joint, can be with sufficient intensity fixed terminal 30.Consequently, can provide semiconductor device 100 with sufficient intensity fixed terminal.According to more than, the reliability of semiconductor device 100 is improved.
In addition, by terminal 30, have above-mentioned shape, thereby, even the length of the leading section of ultrasonic tool 200 is shorter, also can easily to terminal 30, carries out ultrasonic wave and engage.
At this, as an example, the thickness of terminal 30 is made as 1.5mm, the width of terminal 30 is made as 5.0mm, the height of terminal 30 is made as 10mm, the terminal of terminal 30 is engaged spacing be made as 40mm.It is 2 intervals (distance) of erectting setting unit 30b that terminal 30 has that this terminal engages spacing.In this case, in the situation that joint has wish under the state of a planar 30a to engage another planar 30a, the stress of terminal 30 becomes approximately 1/11 times of stress of terminal 40.That is, can make the stress (resistance) of terminal 30 less than the stress of terminal 40.
Therefore, in the situation that carry out ultrasonic wave, engage, easily only make planar 30a vibration.Consequently, terminal 30 deforms with low stress, therefore easy splice terminal 30.Therefore, even also carrying out ultrasonic wave to terminal 30, low stress engages.Consequently, can be at stable US(Ultra Sonic) splice terminal 30 under engaging condition.In addition, in the situation that the few splice terminal accurately 30 of position deviation.
The variation 1 of＜execution mode 1 〉
Carrying out ultrasonic wave while engaging, the resistance of the above-mentioned terminal 30 that vibrates and the thickness of this terminal 30 cube proportional on X-direction.In addition, make the thickness of erectting setting unit 30b thinner, the stress of the terminal 30 when carrying out the ultrasonic wave joint becomes less.That is, usually, with regard to ultrasonic wave engaged, thickness was thinner, more easily engages.
In addition, terminal 30 engages at Liang Chu (2 planar 30a).Therefore, if planar 30a of terminal 30 is engaged, terminal 30 is fixed when another planar 30a engaged so.
At this, the full depth of supposing terminal 30 is 1.5mm.In this case, because terminal 30 is thicker, so terminal intensity is strong, if a planar 30a is fixed, when wish was carried out the ultrasonic wave joint to another planar 30a, terminal 30 was difficult to vibration so.Therefore, can't transmit vibrational energy from ultrasonic tool 200 to terminal, bond strength dies down.
Therefore, in modified embodiment of the present embodiment 1, the other parts in the Thickness Ratio terminal 30 of setting setting unit 30b are thin.Specifically, as shown in Figure 3, in the situation that will erect the thickness of setting unit 30b, be made as T1, the thickness of planar 30a is made as T2, meet T1＜T2.
In addition, the thickness of the setting setting unit 30b in terminal 30 and planar 30a part in addition is made as T3.In this case, meet T1＜T3.Have, T3 also can equate with T2 again.
Have, the relation of amount of the electric current that flows through due to terminal 30 etc., can not make the thickness of terminal 30 thin terrifically again.Therefore, for example in the situation that T2, T3 are 1.5mm, T1 is made as 1.0mm.Thus, the stress of terminal 30 becomes in the situation that 30% left and right of the stress of the terminal 30 that T1 equates with T2.
Have, the relation of amount of the electric current that flows through due to terminal 30 etc., also can widen the width of terminal 30 again.For example, also can make the width of terminal 30 become 1.5 times, and make the sectional area of terminal 30 identical.In this case, the stress of terminal 30 become the terminal 30 before widening width stress pact half below (44%).
As described above, by making the other parts in the Thickness Ratio terminal 30 of erectting setting unit 30b thin, thereby can make the stress (resistance) of terminal 30 less.Thus, splice terminal 30 more accurately.
The variation 2 of＜execution mode 1 〉
In modified embodiment of the present embodiment 2, adopt and make terminal have the structure of bending effect.
Fig. 4 means the figure of structure of terminal 30 of the variation 2 of execution mode 1.
Each terminal 30 is compared with the terminal 30 of execution mode 1, also has bend 31, and this bend 31 has the bending effect that relaxes from the external force of these terminal 30 tops.
Have, the shape of bend 31 is not limited to shape shown in Figure 4 again, for example, can be also shape shown in Figure 5.
By at terminal 30, bend 31 being set, thereby can make the stress (resistance) of terminal 30 less.Thus, splice terminal 30 more accurately.
The variation 3 of＜execution mode 1 〉
In addition, also can at the setting setting unit 30b of each terminal 30, slit 32 be set as shown in Figure 6.
Thus, can make the stress (resistance) of terminal 30 less.Thus, splice terminal 30 more accurately.
Have, the present invention can freely make up the variation of execution mode, execution mode or the variation of execution mode, execution mode suitably is out of shape, is omitted in this scope of invention again.
Utilizability on industry
The present invention can utilize as the semiconductor device with sufficient intensity fixed terminal.
The explanation of Reference numeral:
10 base stations, 20 substrates, 30,40 terminals, 30a, the planar section of 40a, 30b erect setting unit, 32 slits, 100,1000 semiconductor devices, 200 ultrasonic tools.
Claims (4)
1. a semiconductor device, utilize ultrasonic wave to engage and make, wherein,
Described semiconductor device possesses a plurality of terminals, and described a plurality of terminals have the planar section that utilizes described ultrasonic wave joint to engage with the connecting portion of regulation,
Each described terminal bends become described planar section be in the face opposition side that engages with described connecting portion face above be provided with the space of regulation,
The whole described planar section that each described terminal has extends towards the direction of the outside of described semiconductor device in the inside from described semiconductor device.
2. semiconductor device according to claim 1, wherein,
Each described terminal has with respect to described planar substantially vertical planar part,
, in the situation that the thickness of described substantially vertical planar part is made as T1, the thickness of described planar section is made as T2, meet T1＜T2.
3. semiconductor device according to claim 1 and 2, wherein, each described terminal has bend, and described bend has the bending effect that relaxes from the external force of this terminal top.
4. semiconductor device according to claim 2, wherein, be provided with slit in described substantially vertical planar part.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012-105641 | 2012-05-07 | ||
| JP2012105641A JP2013235882A (en) | 2012-05-07 | 2012-05-07 | Semiconductor device |
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| Publication Number | Publication Date |
|---|---|
| CN103390597A true CN103390597A (en) | 2013-11-13 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310008815XA Pending CN103390597A (en) | 2012-05-07 | 2013-01-10 | Semiconductor device |
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| Country | Link |
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| JP (1) | JP2013235882A (en) |
| CN (1) | CN103390597A (en) |
| DE (1) | DE102012224356A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106663639A (en) * | 2014-08-28 | 2017-05-10 | 三菱电机株式会社 | Semiconductor device |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6685143B2 (en) * | 2016-02-03 | 2020-04-22 | 三菱電機株式会社 | Electrode terminal, semiconductor device and power converter |
| JP6838298B2 (en) | 2016-06-22 | 2021-03-03 | 富士電機株式会社 | Semiconductor devices and methods for manufacturing semiconductor devices |
| JP6630762B2 (en) * | 2018-03-07 | 2020-01-15 | ローム株式会社 | Power module |
| DE102018204408B4 (en) | 2018-03-22 | 2022-05-05 | Danfoss Silicon Power Gmbh | BUSBAR, METHOD OF MAKING SAME, AND POWER MODULE HAVING SUCH |
| CN117616568A (en) | 2021-07-13 | 2024-02-27 | 罗姆股份有限公司 | Semiconductor device and method for manufacturing semiconductor device |
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| US6262474B1 (en) * | 1998-06-01 | 2001-07-17 | Fuji Electric Co., Ltd. | Semiconductor device |
| CN1430272A (en) * | 2001-12-26 | 2003-07-16 | 株式会社日立制作所 | Semiconductor device and its manufacturing method |
| JP2012039018A (en) * | 2010-08-11 | 2012-02-23 | Hitachi Ltd | Electronic apparatus and method of manufacturing the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4226200B2 (en) * | 2000-07-25 | 2009-02-18 | 三菱電機株式会社 | Semiconductor device and manufacturing method thereof |
| JP2006278913A (en) | 2005-03-30 | 2006-10-12 | Toyota Motor Corp | Circuit device and manufacturing method therefor |
| JP2009295886A (en) * | 2008-06-06 | 2009-12-17 | Toshiba Corp | Semiconductor device and manufacturing method thereof |
| JP2013051366A (en) * | 2011-08-31 | 2013-03-14 | Hitachi Ltd | Power module and manufacturing method of the same |
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2012
- 2012-05-07 JP JP2012105641A patent/JP2013235882A/en active Pending
- 2012-12-21 DE DE201210224356 patent/DE102012224356A1/en not_active Ceased
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2013
- 2013-01-10 CN CN201310008815XA patent/CN103390597A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6262474B1 (en) * | 1998-06-01 | 2001-07-17 | Fuji Electric Co., Ltd. | Semiconductor device |
| CN1430272A (en) * | 2001-12-26 | 2003-07-16 | 株式会社日立制作所 | Semiconductor device and its manufacturing method |
| JP2012039018A (en) * | 2010-08-11 | 2012-02-23 | Hitachi Ltd | Electronic apparatus and method of manufacturing the same |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106663639A (en) * | 2014-08-28 | 2017-05-10 | 三菱电机株式会社 | Semiconductor device |
| US10522482B2 (en) | 2014-08-28 | 2019-12-31 | Mitsubishi Electric Corporation | Semiconductor device manufacturing method comprising bonding an electrode terminal to a conductive pattern on an insulating substrate using ultrasonic bonding |
Also Published As
| Publication number | Publication date |
|---|---|
| DE102012224356A1 (en) | 2013-11-07 |
| JP2013235882A (en) | 2013-11-21 |
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Application publication date: 20131113 |