CN103378723B - Power control system - Google Patents
Power control system Download PDFInfo
- Publication number
- CN103378723B CN103378723B CN201210563662.0A CN201210563662A CN103378723B CN 103378723 B CN103378723 B CN 103378723B CN 201210563662 A CN201210563662 A CN 201210563662A CN 103378723 B CN103378723 B CN 103378723B
- Authority
- CN
- China
- Prior art keywords
- voltage
- switch
- timing
- pwm controller
- storage elements
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/1563—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators without using an external clock
Abstract
This application discloses a kind of power control system, specifically disclose timing control system, variable duration impulse system and switched-mode power supply system.Timing control system is configured to control the switch timing of the Pwm controller being associated, and this Pwm controller is configured to produce output controls switch (TR1) is being switched on and off conversion between state according to switch timing.The detection of the timing voltage according to the detection input at Pwm controller controls the switch timing of Pwm controller.Timing control system includes the charge storage elements (C5) being electrically charged, and in using, the voltage in charge storage elements (C5) increases with charging, and this voltage can detect at the detection input of pwm unit.Timing control system also includes voltage maintenance unit, is configured to when charge storage elements is charged to the holding voltage of the timing voltage less than Pwm controller remain at holding voltage.
Description
Technical field
The present invention relates to power control field.But the most not exclusively, embodiments of the invention
It is directed to use with pulse width modulation (PWM) technology to change output.Additionally, the present invention
Embodiment relates to increase the technology of the dutycycle of PWM control system.
Background technology
Thering is provided voltage to reduce in Electrical and Electronic device is common demand.This is for from reference power supply
Such as civil power or normal cell receive electric energy but its running voltage is outstanding less than the device of the voltage of power supply
It is set up.
Although there are the various different means providing voltage to reduce, but switched-mode power supply
(SMPS) circuit is typically considered selective technology.SMPS can be first by switching storage
The into and out different electrical configurations of part such as inducer and/or capacitor regulate output voltage and/
Or electric current.Basic SMPS is boost converter, and its simplest form includes inducer and opens
Close.This switch is by oscillation source such as square wave drive, and switch is converted to turn on and off by it.Work as switch
During connection, power is delivered to inducer from power supply.Then inducer receives and stores the merit from power supply
Rate, inducer due to switch conversion and with this power of burst reception.Received from power supply by inducer
Power is then transmitted to load.Inducer helps to loading the power supply providing constant.It is provided to bear
The output voltage carried depends on the performance number from power delivery to inducer, i.e. output voltage and depends on out
The turn-on time closed.
Switch element such as transistor and memory element such as inducer and capacitor have and can ignore
The power attenuation disregarded, so SMPS can work with the efficiency of 100% in theory.It is to say,
All of input power can be passed to load in theory.But, it is not always able to reach
The theoretical efficiency of 100%, and due to the restriction of circuit, power is often by some component conduct
Heat dissipates.
Now, many is applied, generally use the SMPS control chip of standard, such as Dezhou
The TL2843 or 3843 of instrument.But, by utilizing the available circuit of the control chip of these standards
The maximum duty cycle that can reach ordinarily be about 95%.Therefore, it is close to or higher than at output voltage
In the application of little input voltage, the most still can not reach the dutycycle of 100%.Therefore, when input electricity
When pressure is near or below the output voltage wanted, output voltage will not be as close possible to the output electricity wanted
Pressure.Additionally, at output voltage close in the application of minimum input voltage, it is desirable to the duty of 100%
Ratio, so that circuit can reach, with minimum possible input voltage, the output voltage wanted.
Therefore, the problem that presently, there are is, SMPS can not reach the dutycycle of 100%, this
Input voltage is near or below the output voltage wanted or output voltage is close to or higher than minimum input
During voltage, especially it is difficult to solve.
Summary of the invention
According to the first aspect of the invention, it is provided that a kind of pulse width modulation being associated for control
The timing control system of the switch timing of controller.Pwm controller is configured to according to institute
State switch timing and produce output, so that control switch in (ON) state of connection and is disconnected (OFF)
Change between state.Timing voltage according to the detection input at Pwm controller
Detection control Pwm controller switch timing.Timing control system includes being configured
For the charge storage elements being electrically charged.In use, along with charge storage elements is electrically charged, described electricity
Voltage in lotus memory element increases.Additionally, in use, the voltage in described charge storage elements
Can detect at the detection input end of the pwm unit being associated.Timing control system
Also include voltage maintenance unit, be configured as charge storage elements be charged to keep voltage time, will
The voltage of charge storage elements is maintained at holding voltage.Described holding voltage is less than pulse width modulation
The timing voltage of controller.
Described maintenance unit can be connected in parallel with charge storage elements.Maintenance unit can be configured so that
Obtain the voltage in maintenance unit corresponding to keeping voltage.
Voltage in maintenance unit can be arranged by the resistance value of maintenance unit.So, remain single
Unit can include maintaining resistor.The resistance value of maintenance unit can correspond to maintain the resistance of resistor
Value.
Maintenance unit can also include the switch being connected with described resistor in series.This switch can be according to phase
The output of the Pwm controller of association is changed.The switch of maintenance unit can be crystal
Pipe.
This system can also include charge rate device, and this charge rate device is configured to arrange electric charge
The charge rate of memory element.Described charge rate device can be the resistance with following resistance value
Device: described resistance value is configured to arrange the electricity of supply charge storage elements according to the voltage on resistor
Stream.Residing charge storage elements can be capacitor.
The voltage being associated with the maximum charge capacity of charge storage elements can be basic with timing voltage
Identical.
According to the second aspect of the invention, it is provided that a kind of pulse width for modulating input signal is adjusted
System processed.Described variable duration impulse system includes being configured between on-state and off-state turn
The control switch changed.In using, when residing control switchs in an ON state, input signal is transmitted
To the output controlling switch.Described variable duration impulse system also includes Pwm controller,
It is configured to produce output to be changed between on-state and off-state by control switch.Described arteries and veins
Rush width modulation controller to be configured to, when the detection input at described Pwm controller
When place detects timing voltage, control switch is transformed into off-state from on-state.Pulse width
Modulating system also includes timing control system as above.
According to the third aspect of the present invention, it is provided that a kind of switch mode power system.Described switching regulator
Power-supply system includes variable duration impulse system as above.The input letter of variable duration impulse system
Number can be the input voltage received from power supply.The output of variable duration impulse system can be configured
For being delivered to load.
The embodiment provides a kind of system, this system is configured to prevent PWM controller
Dead band (dead-time) is introduced in switch periods.Specifically, The embodiment provides one
The system of kind, this system is configured to prevent from arranging the charge storage elements ratio of the frequency of PWM controller
Capacitor reaches maximum voltage thus switch periods as described in end.Embodiments of the invention are by utilizing
Voltage holding circuit prevents such function from occurring, and described voltage holding circuit is configured to arrange this
Maximum voltage in the charge storage elements of sample.In some embodiments of the invention, this maximum voltage
Arranged by the resistor in parallel with charge storage devices.
Embodiments of the invention make can in the system utilizing the control unit including following function
Reach the dutycycle of 100%: described function was configured to before reaching the dutycycle of 100% terminate
Switch periods.In some embodiments of the invention, the charging to charge storage devices is used for determining out
The pass cycle, and provide circuit that the voltage in charge storage elements is set, this voltage is opened less than expression
Close the voltage of the control unit of end cycle.So, it is therefore prevented that the end of switch periods, wherein need
The dutycycle of 100%.
The embodiment provides a kind of system, this system reaches with minimum possible input voltage
To the output voltage wanted.
Accompanying drawing explanation
Will now be described with reference to the attached figures the exemplary embodiment of the present invention:
Fig. 1 shows the SMPS system according to the first embodiment of the present invention；And
Fig. 2 shows the control unit of the SMPS system in Fig. 1.
In entire disclosure and accompanying drawing, identical reference number refers to identical part.
Detailed description of the invention
Fig. 1 shows the SMPS system 100 according to the first embodiment of the present invention, and it is configured to
Receive power at input from power supply 200, and at outfan, power exported load 300.Input
Power supply 200 is direct current (DC) power supply with minimum amount of voltage that and maximum voltage value.According to this
This bright one side, load 300 is motor；It will be appreciated, however, that load can be any company
Receive the output device of the outfan of SMPS system 100.The voltage request of load 300 is the lowest
In minimum input voltage, or the output voltage of power supply 200, but due to SMPS system 100 institute
The control provided, it is body more closely regulated.The main switching control TR1 quilt of SMPS system 100
It is configured between on-state and off-state conversion, when in an ON state, will be from power supply
100 power received are sent to load 300.Switch TR1 is p-slot field-effect transistor
(FET), its source electrode is connected to power supply 200, and its drain electrode is connected to load via output circuit 102
300.Should be appreciated that this system can be configured with n-channel fet.Output circuit 102 is right
The output being passed to load of SMPS system smooths.The grid of field-effect transistor by
Control circuit is controlled, and therefore, this control circuit controls the dutycycle of whole SMPS system.
Will be described in now each feature in the SMPS system 100 of Fig. 1 and circuit-level.
To consider to control the control circuit of transistor TR1 switch first in detail.Described control circuit has
Three aspects can cause switching TR1 and be changed, and they are:
(1) output voltage controlling circuit, this circuit occurs in input voltage, output voltage or load
During change, change the dutycycle of system 100 to provide constant output；
(2) circuit overcurrent protection, this circuit protection system thus protection is connected to the power supply of system
From due to the damage of the overcurrent at system output；And
(3) timing circuit, this circuit controls the timing of each switch periods and includes frequency.
In the aspect of the invention illustrated, described control circuit employs control unit 103, and it provides
Multiple features of the above-mentioned various aspects of control circuit.Fig. 2 shows the inside of control unit 103
Functional device.As it is shown in figure 1, control unit is PWM controller, specifically, the 8 integrated electricity of pin
The TL2843 on road, such as Texas Instrument.It will be appreciated, however, that any pulse width can be used
Modulation (PWM) controller.
Timing circuit mainly includes agitator 1031, frequency circuit 106 and holding circuit 105, vibration
In device 1031 is arranged in control unit 103 and produce the oscillator signal for switching master switch TR1,
Frequency circuit 106 is configured to arrange the operating frequency of agitator, and holding circuit 105 is used for making it possible to
The dutycycle of 100% is enough provided.
Frequency circuit mainly includes timing resistor R3 and time capacitor C5.Resistor R3 connects
It is connected between the pin Vref of control unit 103 and time capacitor C5.Time capacitor C5
It is connected between timing resistor R3 and ground.Between timing resistor R3 and time capacitor C5
Junction provide the connection of pin RT/CT of control unit 103.The frequency root of agitator
Determine according to f=1.72/ (R3 × C5).
It is now discussed with the operation of timing circuit.When the switch periods of SMPS system initiates, switch
TR1 is connected by control unit 103, so that power is passed to output circuit 102.In switch week
When phase initiates, time capacitor C5 is at cycle starting voltage.Cycle starting voltage is low, with
Time capacitor C5 charging, the voltage on capacitor C5 in charging is with by timing resistor R3
Value and the speed that determines of the value of reference voltage Vref that arranges of the pin Vref of control unit 103 increase
Add.It is to say, timing resistor R3 and pin Vref determines the electricity of supply time capacitor C5
Stream, so that it is determined that the speed of capacitor C5 charging.Then, the voltage warp on time capacitor C5
Monitored by control circuit by the connection of the pin RT/CT to control unit 103.Work as time capacitor
Voltage on C5 reach represent the timing voltage of end cycle, i.e. end cycle voltage time, if opened
Close TR1 to be also not turned off, then switch TR1 is disconnected by the oscillator module of control unit 103, and
And make capacitor C5 repid discharge to starting voltage via RT/CT pin.When C5 arrives the cycle
During starting voltage, next switch periods starts, and TR1 connects, and C5 starts to tie towards the cycle
Beam voltage charges.End cycle voltage is above cycle starting voltage but is less than the voltage of voltage Vref.
Control unit performs above-mentioned functions as follows.Agitator 1031 monitors the electricity on RT/CT pin
Pressure for above-mentioned end cycle voltage and cycle starting voltage, and produce expression C5 be discharged
Internal signal.This signal is one of input of combination logic 1032.Combination logic makes: whenever
When this signal is effective, it causes low level on the output.Thus create output dead band.
When detecting that time capacitor C5 reaches predetermined voltage and switchs week due to control unit 103
At the end of phase, in switch periods, always there is the disconnection period.This disconnection period can also be referred to as blanking
Pulse or dead band.It is thus impossible to reach the dutycycle of 100%.In order to prevent control unit 103 by
In time capacitor C5 reach end cycle voltage and disconnect switch TR1, it is provided that holding circuit or
Unit 105.Holding circuit 105 keeps time capacitor C5 to be at holding voltage until switch is all
Phase terminates, and switch periods is terminated by circuit overcurrent protection due to overcurrent, or wants owing to providing
Output voltage needed for the change of dutycycle terminated by output voltage controlling circuit.Keep voltage little
In end cycle voltage (preferably, only slightly less than end cycle voltage), accordingly it is possible to prevent control
Circuit processed disconnects switch TR1.
According to this aspect of the invention, holding circuit 105 includes maintaining transistor TR6 and maintaining electricity
Resistance device R4.Transistor TR6 and resistor R4 strides across capacitor C5 and is connected in series, resistor R4
It is connected between the drain electrode of transistor TR6 and the pin RT/CT of control unit 103.As following
Discussing in more detail, the grid of transistor TR6 is controlled by the output of control circuit 103.
When no matter when switching TR1 for connecting, transistor TR6 is also for connecting, and switch TR1 is
During disconnection, transistor TR6 is also for disconnecting.When transistor TR6 is for connecting, time capacitor
Voltage on C5 does not rises to exceed holding voltage, and this holding voltage is by Vref, resistor R3
Set with resistor R4.Therefore, select resistor R3 and R4, so that keeping voltage the lowest
TR1 and the end cycle voltage level to time capacitor C5 electric discharge is switched in being used for disconnecting.Dimension
Hold circuit 105 allow SMPS circuit 100 in the case of there is no external control smoothly enter and
Leave this maintenance pattern.
Because the turn-on time of switch periods is not unnecessarily shortened, therefore, holding circuit 105
The dutycycle making 100% is possibly realized.
As discussed below, the selection keeping level of capacitor C5 can affect SMPS circuit
The performance of 100.
When transistor TR6 is for connecting, the holding voltage level of time capacitor C5 is configured to
Too low will affect the cycle time of circuit.Additionally, depend on input voltage, output voltage cycle time
Situation with output loading.The holding level of time capacitor C5 is set close to end cycle electricity
Cycle time will be had little to no effect by voltage level, and the impact of above-mentioned situation can be greatly reduced.
By the control circuit 103 that level is configured to slightly above to be used of keeping of time capacitor C5
End cycle voltage level Vref would not allow for the dutycycle of 100%, but owing to reaching end cycle
The time of voltage level by long-term for the cycle of considerably longer than standard, and during the electric discharge of capacitor C5
Between be fixing, therefore obtained by dutycycle will closely 100%.
The level that keeps of time capacitor C5 is disposed proximate to voltage level Vref by extra for needs
There are the parts of tight tolerance, or testing and debugging parts will be needed.Therefore, in order to avoid needs volume
External part, or perform the demand of the time of this test, preferably by the nominal of time capacitor C5
It is equal with end cycle voltage level for keeping level design.Due to tolerance, some unit
Keep level can be slightly below end cycle voltage level, and the holding level of some unit can be slightly above week
Phase end voltage level, but all will obtain the highest dutycycle, and stably enter and leave maintenance
Pattern.
As it has been described above, control circuit also includes circuit overcurrent protection at the input of system, with protection
System is from the damage of overcurrent.Input in SMPS circuit 100 provides current sensing circuit
101, to assist this overcurrent to detect.Current sensing circuit 101 is difference amplifier, to shunting
Voltage on resistor R0 is amplified and level deviation is to reference voltage 0V, then senses
Electric current is fed to via the resistor R1 for being filtered current sensing signal and capacitor C1
The pin iSENSE of control unit 103.
From figure 2 it can be seen that when overcurrent being detected, receive at iSENSE pin
Signal is used for disconnecting switch TR1, thus protects system and be connected to the load of system.Control IC103
In current sense comparator 1033 monitoring current sense pins (iSENSE) on voltage, and will
This voltage compares with the voltage that maximum voltage is 1V.If the voltage on current sense pin surpasses
Cross this voltage, then the output signal of comparator 1033 is activated.Then, this signal reset PWM
Latch 1034, then the output of latch 1034 be fed into combination logic module 1032, and it is led
Cause switch TR1 to disconnect.Configure this logic so that when PWM latch 1034 resets, defeated
It is low for going out pin.As discussed above, PWM latch is when end cycle, by carrying out self-vibration
Swing the signal setting that the expression switch periods of device terminates.
Therefore, overcurrent sensing function can reduce the dutycycle of system 100.But, owing to it carries
The protection of confession, it preferably includes such function.During maintenance pattern, this function still activates.
As it was previously stated, control circuit also includes controlling loop, including: resistor R10, R11, R12,
And R2, capacitor C2 and C3, and control unit 103.There is provided this control loop for compensating
Input voltage and the change of output loading, to keep constant output voltage, or at least make output electricity
The change of pressure minimizes.Therefore, control loop and can reduce dutycycle by disconnecting switch TR1,
Thus provide, at the outfan of system, the voltage wanted.
Resistor R11 and R12 is connected in series between the outfan of SMPS circuit and pin VFS.
Resistor R10 is connected between pin VFB and ground.Additionally, resistor R2 and capacitor C2
Be connected in series between pin VFB and pin COMP, simultaneously capacitor C3 these pins it
Between be connected in parallel.Resistor R10 and resistor R11's and R12 and ratio and control unit 103
Reference voltage determine output voltage.Although all parts in control loop are helpful, but
Resistor R2 and capacitor C2 and C3 is for ensuring that the main portion of the stability of output voltage
Part.
Such control loop arranges that being referred to as " current-mode " controls loop IC, and it controls inducer
In peak point current as control dutycycle a kind of means, more particularly described below.
Resistor R10, R11 and R12 reduce the output voltage of system, so that when output is in
During voltage needed for load, it is 2.5V at the VFB pin of control unit.Voltage on VFB pin
As difference amplifier 1035(error amplifier) input.Another input of difference amplifier
End is internal 2.5V reference.The output of difference amplifier 1035 is by diode 1036 and 1039
Carry out double diode blood pressure lowering, by resistor layout 1038 divided by 3, and by Zener diode 1039
It is limited to maximum voltage 1V.This signal provides variable restriction, and is fed into above-mentioned electric current sense
Survey comparator 1033.The gain of difference amplifier 1035 is high, and when output voltage is less than load
During required voltage, difference amplifier 1035 is output as height, and current sense comparator 1033
Variable input be limited to 1V.Owing to actual output voltage is close to the output electricity needed for load
Pressure, therefore, the output of difference amplifier 1035 will begin to decline, thus current sense comparator
Variable input also will decline, and thus output electric current is reduced to relatively low value.If it is steady for controlling loop
Fixed, then circuit is up to equilibrium point, and the electric current reduced at this equilibrium point limits and load current phase
Coupling, and output voltage is with required voltage closely.If output voltage rises to required
More than voltage, then the output of difference amplifier 1035 drops to zero, thus electric current limits and is reduced to zero.
As it has been described above, it must be stable for controlling loop, otherwise, due to the delay in circuit, electric current
Restriction will be changed between maximum and zero rapidly.Stability passes through resistor R2, capacitor C2
With correct selection of capacitor C3 and obtain, resistor R2, capacitor C2 and capacitor C3 shadow
Ring the response characteristic of difference amplifier 1035.Although miscellaneous part impact control loop, but they
Selection by such as making the other standards such as output smoothing control.
It is now discussed with the remaining part of system in accompanying drawing.
As it was previously stated, SMPS system 100 is provided with output stage, it is configured to make from switch TR1
The pulse power of output smooths.Therefore, output stage 102 is smooth circuit, it include diode D1,
Inducer L1 and capacitor C6.Inducer L1 is connected in series in drain electrode and the SMPS of transistor TR1
Between the outfan of circuit 100.Then, diode be connected to and inducer L1 and transistor TR1
Drain electrode between junction point between.Capacitor C6 be connected to and inducer L1 Yu SMPS electric
Between junction point between the outfan on road 100.This diode is reverse biased, to prevent at switch
TR1 connect time current direction ground, but still allow for switch TR1 disconnect time electric current in output stage 102
Around flow and flow to load.
When switching TR1 and connecting, electric current flows through switch TR1, therefore, power supply 200 provides
Input voltage is provided across inducer L1 and capacitor C6.So, the voltage on inducer L1
The electric current of linear increase is induced in inducer L1.When TR1 disconnects, the electric current in TR1
It is transferred to D1 so that electric current can continue towards inducer L1, and recycle stream by capacitor C6
Back through diode D1.Electric current is by linear decline, until switch TR1 is again switched on or electric current reaches
Till 0A.The electric current flowed out in inducer L1 is smoothed by capacitor C6, produces stable direct current defeated
Go out voltage and current to load 300.So, inducer L1 and capacitor C6 the LC electricity provided
Road direction load 300 provides smooth output voltage and electric current, and voltage depends on during charging, i.e.
It is stored in the electricity in lc circuit when a switch is on.
SMPS system 100 also includes the driving electricity being configured between control circuit and switch TR1
Road 104.This drive circuit 104 is defeated by control circuit or more specifically control unit 103
Go out voltage and be converted to suitable voltage, be used for operating switch TR1.Assume the defeated of control unit 103
Going out is natural logic and with 0V as reference, and when being output as high, switch TR1 connects, and when defeated
Go out for time low, switch off.But, because switch TR1 is p-channel fet, drive electricity
The output signal that road 104 is configured to control circuit 103 is anti-phase.So, low level grid electricity
Pressure makes switch TR1 connect, and high level voltage makes switch TR1 disconnect.
Control unit 103 can be any type of PWM controller, and it utilizes one or more
External component arranges the frequency of agitator, and provides the output of instruction switch controlling signal.But,
It will also be appreciated that control unit 103 need not take the form of pre-packaged IC, it can also be with discrete
Parts realize.Additionally, all features in Fig. 1 can realize in a single integrated circuit.But,
Control unit should be configured to charge and discharge charge storage devices such as capacitor
Control cycle time.
Should be appreciated that the alternative embodiment of the present invention relates to one and includes such as the first embodiment of the present invention
Described in the system of control circuit.In other embodiments, it is provided that utilize control unit 103
System with timing circuit.Should be appreciated that the system of such embodiment can be used in except SMPS
In other application of system.Such as, such system can be used in any PWM controller that utilizes
In system, such as telecommunications PWM system.
Should be appreciated that any of above embodiment is provided as the present invention and other alternative embodiments can
With the example being provided.Therefore, the scope of the present invention is only limited by the scope of the appended claims.
Additionally, any of above embodiments of the invention can suitably be mutually combined.
Claims (11)
1. the timing control of the switch timing of the Pwm controller being associated for control
System processed, described Pwm controller is configured to produce output with according to described switch timing
Control switch is changed, according in described pulse width modulation control between on-state and off-state
The detection of the timing voltage of the detection input of device processed controls described Pwm controller
Described switch timing, described timing control system includes:
Charge storage elements, is configured to be electrically charged, and wherein, in use, the storage of described electric charge is single
Voltage in unit is electrically charged along with described charge storage elements and increases, and described charge storage elements
On voltage can detect at the detection input of the Pwm controller being associated；And
Voltage maintenance unit, including maintain resistor and with opening that described maintenance resistor in series is connected
Closing, wherein said voltage maintenance unit is configured as described charge storage elements and is charged to keep electricity
During pressure, the voltage of described charge storage elements is maintained at described holding voltage, wherein said switch
Output according to the described Pwm controller being associated is changed, wherein, and described holding
Voltage is less than the timing voltage of described Pwm controller.
2. the system as claimed in claim 1, wherein, described voltage maintenance unit and described electric charge
Memory element is connected in parallel, and configures described voltage maintenance unit so that in described voltage maintenance unit
Voltage is corresponding with described holding voltage.
3. system as claimed in claim 2, wherein, the voltage in described voltage maintenance unit by
The resistance value of described voltage maintenance unit is arranged.
4. system as claimed in claim 3, wherein, the resistance value pair of described voltage maintenance unit
The resistance value of resistor is maintained described in Ying Yu.
5. system as claimed in claim 4, wherein, the described switch of described voltage maintenance unit
It it is transistor.
6. the system as described in aforementioned any one claim, also includes charge rate device, should
Charge rate device is configured to arrange the charge rate of described charge storage elements.
7. system as claimed in claim 6, wherein, described charge rate device be have as follows
The resistor of resistance value: described resistance value is configured to arrange according to the voltage on this resistor be supplied to
The electric current of described charge storage elements.
8. the system as described in any one in claim 1 to 5, wherein, described electric charge stores
Unit is capacitor.
9. the system as described in any one in claim 1 to 5, wherein, deposits with described electric charge
The voltage that the maximum charge capacity of storage unit is associated is identical with described timing voltage.
10. for modulating a variable duration impulse system for input signal, including:
Control switch, be configured to change between on-state and off-state, wherein,
In using, when described control switch is in described on-state, input signal is passed to described control
The outfan of system switch,
Pwm controller, is configured to produce output to be connect described by the described switch that controls
Logical conversion between state and described off-state, described Pwm controller is configured as
When the detection input of described Pwm controller detects timing voltage, described control is opened
Close and be transformed into described off-state from described on-state；And
According to the timing control system described in aforementioned any one claim.
11. 1 kinds of switched-mode power supply systems, including:
Variable duration impulse system as claimed in claim 10, wherein, described input signal be from
The input voltage that power supply receives, and described output is configured to be delivered to load.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB1207545.3 | 2012-04-27 | ||
| GB1207545.3A GB2501539B (en) | 2012-04-27 | 2012-04-27 | Power control system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103378723A CN103378723A (en) | 2013-10-30 |
| CN103378723B true CN103378723B (en) | 2016-09-07 |
Family
ID=46330569
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210563662.0A Expired - Fee Related CN103378723B (en) | 2012-04-27 | 2012-12-21 | Power control system |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN103378723B (en) |
| GB (1) | GB2501539B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104749951A (en) * | 2013-12-31 | 2015-07-01 | 鸿富锦精密工业（深圳）有限公司 | Pulse width modulation controller and power supply circuit provided with same |
| CN110347064B (en) * | 2018-04-03 | 2020-11-20 | 维谛技术有限公司 | Power supply control circuit |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5377091A (en) * | 1994-01-28 | 1994-12-27 | Compaq Computer Corporation | Power converter having regeneration circuit for reducing oscillations |
| CN1592531A (en) * | 2003-08-26 | 2005-03-09 | 奥斯兰姆施尔凡尼亚公司 | Feedback circuit and method of operating ballast resonant inverter |
| CN1826719A (en) * | 2003-07-07 | 2006-08-30 | 汤姆森特许公司 | Switched mode power supply |
-
2012
- 2012-04-27 GB GB1207545.3A patent/GB2501539B/en active Active
- 2012-12-21 CN CN201210563662.0A patent/CN103378723B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5377091A (en) * | 1994-01-28 | 1994-12-27 | Compaq Computer Corporation | Power converter having regeneration circuit for reducing oscillations |
| CN1826719A (en) * | 2003-07-07 | 2006-08-30 | 汤姆森特许公司 | Switched mode power supply |
| CN1592531A (en) * | 2003-08-26 | 2005-03-09 | 奥斯兰姆施尔凡尼亚公司 | Feedback circuit and method of operating ballast resonant inverter |
Also Published As
| Publication number | Publication date |
|---|---|
| GB201207545D0 (en) | 2012-06-13 |
| GB2501539A (en) | 2013-10-30 |
| CN103378723A (en) | 2013-10-30 |
| GB2501539B (en) | 2018-10-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8000117B2 (en) | Buck boost function based on a capacitor bootstrap input buck converter | |
| US9647557B2 (en) | Three phases controller for buck-boost regulators | |
| US9787192B2 (en) | Power-supply circuit, related transmission circuit, integrated circuit, and method of transmitting a signal | |
| US9484758B2 (en) | Hybrid bootstrap capacitor refresh technique for charger/converter | |
| CN202424528U (en) | DC/DC (direct current) converter as well as power supply device and electronic equipment using same | |
| TWI483518B (en) | A control circuit for a switching regulator receiving an input voltage and a method for controlling a main switch and a low-side switch using a constant on-time control scheme in a switching regulator | |
| CN100588097C (en) | Power supply controller method and structure | |
| US8319487B2 (en) | Non-isolated current-mode-controlled switching voltage regulator | |
| CN101414764B (en) | Method and apparatus to reduce the volume required for bulk capacitance in a power supply | |
| US20080174292A1 (en) | Switching regulator capable of efficient control at control mode change | |
| US20120139345A1 (en) | Control method of hybrid power battery charger | |
| US7471071B2 (en) | Extending the voltage operating range of boost regulators | |
| US7646181B2 (en) | Control circuit of DC-DC converter | |
| US9401642B2 (en) | Switching power-supply device | |
| JP2014023269A (en) | Semiconductor integrated circuit and method of operating the same | |
| CN103312176A (en) | Isolated flyback converter with sleep mode for light load operation | |
| US8754580B2 (en) | Semiconductor apparatus and method of controlling operation thereof | |
| TW201439705A (en) | Switching regulator with adaptive PWM/PFM modulator and method thereof | |
| CN203722871U (en) | LED drive circuit system and LED drive control circuit | |
| CN103702486A (en) | LED driving circuit system, control circuit and control method | |
| US8410764B2 (en) | Automatic current limit adjustment for linear and switching regulators | |
| CN104838574A (en) | Power converter with bias voltage regulation circuit | |
| CN105515418A (en) | PFC shutdown circuit for light load | |
| WO2012001525A2 (en) | Intelligent gate drive | |
| CN103166462A (en) | Detecting output diode conduction time for cable drop compensation of a power converter |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CB03 | Change of inventor or designer information | ||
| CB03 | Change of inventor or designer information |
Inventor after: Wain Richard Mark Inventor after: Hu Li Inventor after: Xu Huizheng Inventor before: Wain Richard Mark Inventor before: Hu Li |
|
| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: British Powys Patentee after: Nideke Control Technology Co. Ltd. Address before: British Powys Patentee before: Control Tech Ltd |
|
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160907 Termination date: 20201221 |