CN103378594B - A kind of digitlization power parallel machine current equalizing method and current-equalizing system - Google Patents
A kind of digitlization power parallel machine current equalizing method and current-equalizing system Download PDFInfo
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Abstract
The invention provides a kind of digitlization power parallel machine current equalizing method and system, the identical controller of function is provided with in each power module used, current-sharing can be realized in controller, a high-speed data channel is set up between each power module, this passage is made up of the data/address bus of a serial and a clock lines, and each power module all hangs in this bus.The digital current-sharing method of the embodiment of the present invention, without the need to specific manner of communication, adopt the current share scheme of " autonomous communication is dressed to maximum ", method is simple and reliable.Each module status is identical, and dereliction divides from fixing.Adopt N+m redundancy scheme, make system have high reliability.The method is simple and practical, with low cost, without the need to adopting particular communication mode, reducing system cost and security risk, improve the reliability of system.Data/address bus involved in the present invention is in addition simple and practical, improves the scope of application of described invention.
Description
Technical field
The present invention relates to power technique fields, method and the current-equalizing system realizing the method for particularly a kind of digitlization power parallel machine current-sharing, the method comprises the agreement of carrying out between each power module communicating, and is provided with the device realizing described agreement in this system.
Background technology
High-power out-put supply design is a study hotspot in field of power supplies always.Multiple power module Parallel opertation is one of optimal case solving the design of high-power out-put supply.Due to power sources in parallel have compatible strong, can N+m redundancy backup, reliability is strong, cost performance is high, design difficulty is lower, be easy to a series of advantages such as management, power module parallel technology is constantly improving and development, and has become the core technology of high-power distributed power source.And the core of power module parallel connection, be then parallel operation flow equalize technology.Flow equalize technology refers to when multiple power module is in parallel, the measure of each power module load current of uniform distribution, meet output voltage to keep relative stability when input voltage and output current change simultaneously, and good current-sharing precision and transient response will be had.
The method being realized current-sharing by analog circuit has a variety of, but the limitation of analogue device is very strong, and easily by the impact of external environment, poor anti jamming capability.Along with the digital development trend of power technology, the digital current-sharing scheme adopting digitlization flow equalize technology to realize will become main flow.
The digital current-sharing scheme of prior art is often with RS485, I
2c, the CAN communication technology realize.Current dependence CAN realizes digital current-sharing becomes study hotspot, and State Intellectual Property Office of China discloses a kind of digital current-sharing patent application using CAN on April 6th, 2011, and number of patent application is: CN102005903A.
Inventor is realizing finding in process of the present invention that prior art at least has following shortcoming:
General digital current-sharing technology often relies on communication system to realize, and this scheme of one side comprises communications protocol to whole communication system and requires high, once communication broke down, whole system is very easily collapsed, and improves the potential risk of power-supply system.On the other hand, the control algolithm of this scheme is comparatively complicated, and H.D chip need be selected to realize, and improves design and production cost.Simulation current equalizing method, then the limitation with device is very strong, and easily by the impact of external environment, the defects such as poor anti jamming capability.
Summary of the invention
The embodiment of the present invention provides a kind of digitlization power parallel machine current share scheme and current-equalizing system, proposes a kind of bus and agreement of designed, designed in this scheme.To simplify the design difficulty of digital current-sharing, the reliability of further raising system, reduces costs.
The invention provides a kind of digitlization power parallel machine current equalizing method on the one hand, the identical controller of function is provided with in each power module used in the method, current-sharing can be realized in controller, a high-speed data channel is set up between each power module, this passage is made up of the data/address bus of a serial and a clock lines, and each power module all hangs in this bus; In each flow equalizing ring cycle, in the controller of each module, carry out following steps:
Step 1, detect the step of the output current numerical value of respective power module;
Step 2, the step that processes that respective electric power outputting current numerical value is carried out;
Step 3, the step that the output current numerical value processed is sent by general line;
The step of step 4, reception general line data;
The step that step 5, the output current numerical value process in each data received and this module completed compare, if the output current numerical value that the process in this step in this module completes is greater than all data of reception respectively, turn to step 6, continue the output current numerical value that transmission processing completes, otherwise, turn to step 7;
The control of step 6, acquisition clock general line, continues the output current numerical value completed to general line transmission processing;
Step 7, stopping send, and control this module for receiving data mode;
Step 8, in this module, the output current numerical value that the maximum current got exports numerical value and this module to be made adjustment.
In the method:
Before described step 1, also comprise step 0, step that whether detection system exists fault, if there is fault, then proceed to the step of handling failure, if there is no fault, then turn to step 1.
In described step 2, when output current numerical value is processed, it is step output current numerical value being done to radix-minus-one complement process.
In described step 5, after receiving the output current numerical value of another power module that is sent by data bus, with the output current numerical value of this power module from a high position, one one compares, if one digit number value is identical, then compare next bit, when have one different time, this bit value is that the output current numerical value of the power module of its correspondence of expression of 1 is little.
On the other hand, the present invention also provides and realizes aforementioned digital power parallel machine current equalizing method current-equalizing system, and this system comprises the controller that is arranged in each power module and connects the communication bus that each power module makes to carry out between each power module communicating; Described communication bus comprises data/address bus and a clock lines of a serial, and described each power module is connected with clock general line with described data bus by respective controller;
Described controller comprises: the current detecting unit detecting the output current numerical value of respective power module, the processing unit that the current value detected current detecting unit processes, the current value processed is outputted to the data outputting unit of bus, the data receipt unit of data is received from data/address bus, the comparing unit that the data received by receiving element and the data of processing unit processes compare, the lowest high-current value received and this unit output current several are carried out the current-sharing unit of current-sharing.
In this system:
Also comprise fault detection unit.Described processing unit is the anti-phase inverter carried out by the binary data of input.
Of the present inventionly usefully to be: the digital current-sharing method of the embodiment of the present invention, without the need to specific manner of communication, adopt the current share scheme of " autonomous communication is dressed to maximum ", method is simple and reliable.Each module status is identical, and dereliction divides from fixing.Adopt N+m redundancy scheme, make system have high reliability.The method is simple and practical, with low cost, without the need to adopting particular communication mode, reducing system cost and security risk, improve the reliability of system.Data/address bus involved in the present invention is in addition simple and practical, improves the scope of application of described invention.
Accompanying drawing explanation
Fig. 1 is the data flow diagram in the embodiment of the present invention.
Fig. 2 is flow chart of the present invention.
Fig. 3 is the structured flowchart of present system.
Embodiment
Embodiment 1, as shown in Figure 2,3, the present embodiment is a kind of block diagram completing the system of association power supply flow equalizing function, and as shown in Figure 3, this system comprises the controller that is arranged in each power module and connects the communication bus that each power module makes to carry out between each power module communicating; Communication bus comprises data/address bus and a clock lines of a serial, and each power module is connected with clock general line with described data bus by respective controller; In the power supply of the present embodiment, current-sharing task controller structure is realized substantially identical in all power modules, as shown in Figure 3, all be interconnected by the data/address bus of a serial and a clock, the processing unit that the current detecting unit that the controller detected in respective power module comprises output current numerical value, the current value detected current detecting unit process, in the present embodiment, processing unit is the anti-phase inverter carried out by the binary data of input.By the current value processed, the data outputting unit namely outputting to bus through data later outputs in bus, the data receipt unit of data is received from data/address bus, receiving element receives from the data data/address bus, the comparing unit that the data received by receiving element and the data of processing unit processes compare.The lowest high-current value received and this unit output current several are carried out the current-sharing unit of current-sharing.In the present embodiment, also comprise fault detection unit.The working-flow of the present embodiment is as shown in Figure 2: comprise the following steps:
Whether step 0, detection system exist the step of fault, if there is fault, then proceed to the step of handling failure, if do not have fault, then turn to step 1
Step 1, detect the step of the output current numerical value of respective power module;
Step 2, the step that processes that respective electric power outputting current numerical value is carried out; When this step processes output current numerical value, it is step output current numerical value being done to radix-minus-one complement process.
Step 3, the step that the output current numerical value processed is sent by general line;
The step of step 4, reception general line data;
Step 5, the step that output current numerical value process in each data received and this module completed compares, if the output current numerical value that the process in this step in this module completes is greater than all data of reception respectively, after receiving the output current numerical value of another power module that is sent by data bus, with the output current numerical value of this power module from a high position, one one compares, if one digit number value is identical, then compare next bit, when have one different time, this bit value is that the output current numerical value of the power module of its correspondence of expression of 1 is little.Turn to step 6, continue the output current numerical value that transmission processing completes, otherwise, turn to step 7;
The control of step 6, acquisition clock general line, continues the output current numerical value completed to general line transmission processing;
Step 7, stopping send, and control this module for receiving data mode;
Step 8, in this module, the output current numerical value that the maximum current got exports numerical value and this module to be made adjustment.
In the present embodiment: provide a kind of digitlization power parallel machine current equalizing method, high to solve existing digital current-sharing conceptual design difficulty, communicate numerous and diverse problem, and further reduce costs.Digitlization current equalizing method provided by the present invention comprises: adopt serial radix-minus-one complement data to represent current flow size; The mode of "AND" is used to carry out fast parallel exchange data information; All modules by autonomous bus arbitration, send/receive current lowest high-current value, arbitrate and successfully will obtain transmission route, failed then transfer reception to; According to the current lowest high-current value received, each power module adjustment current value is dressed to current maximum, the maximum current automatic current equalizing method in the similar simulation flow equalize technology of principle.
The embodiment of the present invention provides a kind of bus structures and agreement of designed, designed on the other hand, and this bus comprises: data/address bus and clock bus; Data structure by start bit, n-bit data value, stop bits form; Bus adopts autonomous arbitration mechanism, and when other equipment all send data " 0 ", who first sends data " 1 ", and who just lost bus control right, and the equipment obtaining control will pass to all the other all power modules oneself current lowest high-current value; If a certain device fails, then deactivate automatically, (if need) the power module waking dormancy up are taken over job; Bus clock is without particular/special requirement.Fig. 1 gives the typical data stream of described bus.
The arbitration result of clock line determines that module has clock to send control, and the arbitration result of data/address bus determines the equal flow valuve that we will obtain, and therefore emphasis of the present invention is just bus arbitration method.The particularly arbitration of data/address bus, detailed process is: each power module is by the order transmission data by turn from a high position to low level.It should be noted that sent data are radix-minus-one complements of current the binary current value obtained of sampling.Such as, the current value obtained of sampling is " 1101100010 ", then the data that we send are " 0010011101 ".Data are arbitrated when arriving bus, if the data sent by turn identical (be all " 1 " or be all " 0 "), the power module that so data are identical all can continue to participate in arbitration.When data are different, institute sends out power module that data are " 0 " and continues participation and arbitrate, and other non-" 0 " modules are then eliminated.The module losing arbitration power transfers receiving mode to by sending mode, thus realizes autonomic function; One takes turns data is sent completely and will enters the data transmission of next round, goes round and begins again; After often receiving new data, module regulates the current value of current output, thus realizes digital current-sharing.Example: a certain take turns data communication after, bus have and only have a power module still to have competition temporary, just thinking that this module obtains bus control right; Participate in the competition if any 3 power modules (being respectively module 1,2,3), their current value (using binary numeral to represent) is respectively: I1 " 1001001 ", I2 " 1001010 " and I3 " 1001100 ".Obtain power module to its negate and will send data, be respectively D1 " 0110110 ", D2 " 0110101 ", D3 " 0110011 ", bus is arbitrated three data; Due to data front four all identical, therefore comparing five-digit number according to front, three power modules all retain bus arbitration power; According to algorithm, when data occur different, the power module exported as " 1 " will be eliminated, therefore at five-digit number according to after relatively, just only have module 3 to possess bus arbitration power, therefore module 3 obtains bus control right continuation and sends data, and module 1,2 transfers accepting state to and receives bus data, by that analogy, until this secondary data sends end.
Embodiment 2, present embodiments provide a kind of digital current-sharing method of power module, in order to reduce the potential risk of prior art, improve the reliability of system.
The method of the present embodiment comprises: set up a high-speed data channel between various modules, and this passage is made up of the data/address bus of a serial and a clock lines, and each power module all hangs in this bus.Each power module is built-in with the identical controller of function, and controller processes to the current value of modules, and serially data wire sends.Because multiple power module exists, data/address bus only has one, and therefore bus will be arbitrated data, and the controller losing control will exit automatically, meanwhile opens the receiving function of oneself.The processor of final acquisition control will transmit its current value to each module, and each module is according to the output of this value adjustment oneself.
Concrete step is as follows:
S101, each module initialization, setting are shown parameter, are determined sampling precision, prepare to sample to respective current value;
S102, each controller process are sampled the current value obtained, and are ready for sending;
S103, each controller carry out and process (the binary current value negate obtained sampling) according to the data that each module exports, and the controller obtaining bus control right sends its current value by data/address bus;
S104, each module accept current value, and adjustment exports.
By said method, adopt the mode of arbitration to determine final load current value, therefore relative to general by for additional concentrated equalizing controller or distributed equalizing controller, described in the present embodiment, method is simple, without the need to unnecessary control measure.Not only increase the reliability of power supply like this, also reduce the cost of system, when turn avoid employing Centralized Controller, the hidden danger that controller failure brings.
Embodiment 3:
Present embodiments provide a kind of digital current-sharing method of power module, in order to reduce the potential risk of prior art, improve the reliability of system.
Concrete steps are as follows:
S101, each module initialization, set initial parameter.
Whether S102, monitor and detection system exist fault, and make respective handling.
S103, check errorless after, each module acquires voltage, current value; Current value is sent to monitoring module by each module, and current value is done designated treatment, is ready for sending.
S104, monitoring receive each module voltage value and make corresponding process, and the magnitude of voltage after process is issued to each module; Each modules compete bus control right, the module finally obtaining control sends its current value to other each modules.
S105, each module make corresponding adjustment according to the electric current received to magnitude of voltage.
The present embodiment by with the supervisory control system of power supply with the use of, carry out two ore control for voltage and current, wherein sharing control is identical with embodiment one.Because digital power all includes supervisory control system substantially, therefore with monitoring with the use of design difficulty or extra cost can't be promoted, embody digital current-sharing technical advantage on the contrary.Also making adjustment for voltage is consider that fractional load may possess high sensitivity characteristic to voltage, and for them, voltage stabilizing process is absolutely necessary.
Adopt this example can obtain following beneficial effect:
1, general digital current-sharing scheme is simplified, and by from a passive one to an active one for current-sharing mode.Break away from the uncertainty that passive process brings.With monitoring with the use of making control effects more remarkable, and guarantee system response time not by too much influence.
2, each module status is identical, without master-slave.Reduce the potential risk of system, form real redundant system.
3, given full play to the advantage of digital power, control flexibly, highly versatile, can realize the upgrading of sharing control system under the prerequisite changing hardware circuit hardly.
4, be easy to the intelligent control method and the strategy that realize various advanced person, make the intelligence degree of power supply higher, performance is better, and more reliable.
Certain versatility is had in the sharing control of this programme in the distributed power supply system realized by power module parallel connection.Due to the basis that this programme is based on digital power, digital power has become the trend of industry development simultaneously.Therefore, when major part adopts the power module parallel operation of Numeric Control Technology, all the present invention can be used.
The part that one of ordinary skill in the art will appreciate that and realize in above-described embodiment and whole flow process, that the hardware that can carry out instruction relevant by computer program has come, what described program can be stored in a computer can in access media, this program, when performing, can comprise the flow process of the embodiment of above-mentioned each method.Wherein said storage medium can be disk, laser disc, read-only memory (ROM) or random access memory (RAM) etc.
Above embodiment only for illustration of the technical scheme of the embodiment of the present invention, but not is limited; Although be described in detail the embodiment of the present invention with reference to above-described embodiment, those of ordinary skill in the art has been to be understood that: it still can be modified to the technical scheme that foregoing embodiments is recorded, or replaces wherein portion of techniques feature; And these amendments or replacement, do not make the spirit and scope departing from each embodiment technical scheme of the embodiment of the present invention of technical scheme itself.
Claims (4)
1. a digitlization power parallel machine current equalizing method, the identical controller of function is provided with in each power module used in the method, current-sharing can be realized in controller, it is characterized in that: between each power module, set up a high-speed data channel, this high-speed data channel is made up of the data/address bus of a serial and a clock lines, and each power module all hangs on this data/address bus; In each flow equalizing ring cycle, in the controller of each power module, carry out following steps:
Step 1, detect the step of the output current numerical value of respective power module;
Step 2, the step that processes that the output current numerical value of respective power module is carried out; In this step: when output current numerical value is processed, it is step output current numerical value being done to radix-minus-one complement process;
Step 3, the step that the output current numerical value processed is sent by data/address bus;
Step 301, the output current numerical value processed are arbitrated when arriving data/address bus, if the data sent by turn are identical, the power module that so data are identical all can continue to participate in arbitration; When data are different, institute sends out power module that data are " 0 " and continues participation and arbitrate, and the power module of other non-" 0 " is then eliminated;
Step 302, lose arbitration power power module transfer receiving mode to by sending mode;
Step 303, receive new data after power module regulate the current values of current output to dress to receiving new data.
2. digitlization power parallel machine current equalizing method according to claim 1, is characterized in that: before described step 1, also comprises step 0, step that whether detection system exists fault, if there is fault, then proceed to the step of handling failure, if there is no fault, then turn to step 1.
3. a current-equalizing system for digitlization power parallel machine current equalizing method according to claim 1, this system comprises the controller that is arranged in each power module and connects the communication bus that each power module makes to carry out between each power module communicating; It is characterized in that: described communication bus comprises data/address bus and a clock lines of a serial, described each power module is connected with clock line with described data/address bus by respective controller;
Described controller comprises: the current detecting unit detecting the output current numerical value of respective power module, the processing unit that the current values detected current detecting unit processes, current values after processing unit processes being completed outputs to the data outputting unit of data/address bus, the data receipt unit of data is received from data/address bus, the comparing unit that data after the data received by data receipt unit and processing unit processes complete compare, the maximum current numerical value received and this current detecting unit output current numerical value are carried out the current-sharing unit of current-sharing,
Described processing unit is that the binary data of input is carried out anti-phase inverter;
Also comprise data/address bus arbitration unit, in described data/address bus arbitration unit, if the data that each power module sends by turn are identical, the power module that so data are identical all can continue to participate in arbitration; When data are different, institute sends out the power module that data are " 0 " and continues to participate in arbitration, and the power module of other non-" 0 " is then eliminated, and loses to arbitrate the power module weighed and transfer receiving mode to by sending mode.
4. current-equalizing system according to claim 3, is characterized in that: also comprise fault detection unit.
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| CN101640415A (en) * | 2008-08-01 | 2010-02-03 | 周兆章 | Power supply current equalizing system and current equalizing control method thereof |
| US20110095729A1 (en) * | 2009-10-27 | 2011-04-28 | Ricoh Company, Ltd. | Charging circuit and charging method |
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Address after: 518000 Floors 1-3 and 1-5 of Block A, Block B2, Jinweiyuan Industrial Plant, Longshan District, Pingshan New District, Shenzhen City, Guangdong Province Patentee after: Shenzhen Gold Power Technology Co., Ltd. Address before: 518000 First, Second and Fifth Floors of B2 Workshop of Fengyeyuan Industrial Plant, Liuxian Second Road, Baocheng 68 District, Baoan District, Shenzhen City, Guangdong Province Patentee before: Shenzhen Gold Power Technology Co., Ltd. |