CN103325666A - Semiconductor wafer doping and diffusing technology - Google Patents
Semiconductor wafer doping and diffusing technology Download PDFInfo
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- CN103325666A CN103325666A CN2012100757012A CN201210075701A CN103325666A CN 103325666 A CN103325666 A CN 103325666A CN 2012100757012 A CN2012100757012 A CN 2012100757012A CN 201210075701 A CN201210075701 A CN 201210075701A CN 103325666 A CN103325666 A CN 103325666A
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Abstract
The invention discloses a semiconductor wafer doping and diffusing technology. The process of doping impurities to semiconductor materials comprises a plurality of steps. First, a high concentration dopant layer is formed on a semiconductor wafer in a lower temperature at a high speed, and then the temperature is raised slowly to provide initial impurity diffusion. After excessive dopant layers are removed in the corrosion method, a basic impurity diffusion semiconductor wafer will be formed in a high temperature oxidation environment. The improved method for doping boron into a silicon wafer is provided, and a boron doping layer is made to be formed on the surface of the silicon wafer in a relatively low temperature.
Description
Technical field:
The present invention relates to the process of doped semiconductor, particularly boron is doped to the development in the Silicon Wafer.
Background technology:
In the past boron was doped in the process of Silicon Wafer, the depositional phase forms boron-dopped layer and boron is diffused in the Silicon Wafer finishes for example 1000 degrees centigrade in single temperature.It has been found that this traditional method is very rambunctious, because consequent film resistor depends on temperature at that time, mist, reaction rate, and the interaction between the wafer.In order to reach desirable uniformity, traditional deposition process has adopted the hydrogen chloride gas of boron, and extensively adopts the wafer of processing through furnace tubes, and this causes the specification of wafer and output to be restricted.
Summary of the invention:
The purpose of this invention is to provide one boron is doped to improving one's methods in the Silicon Wafer, to form PN junction.According to the present invention, boron-dopped layer forms in silicon wafer surface under a relatively low temperature.The thickness of doped layer and concentration exceed the amount of requirement, reach the required degree of depth of PN junction to guarantee to mix.Then slowly improve temperature and reach the level that boron can be diffused into from doped layer wafer.In this step, the amount of diffusion can only be by the amount (this also is that boron needs excessive reason) of time and temperature control rather than boron.
Technical solution of the present invention is:
In the present invention, most Silicon Wafers are approximately 0.020 inch, and pass through environment by boron chloride, nitrogen, the processing of the heating furnace that hydrogen and oxygen form.Wafer is placed on the ranks quadrature place of relative wind direction continuously, and crystal column surface is parallel to each other.Deposition process is divided into two stages or two steps, is integrated into one-period and finishes.Although wafer is stacking placement in parallel to each other, there are enough air-flows to form the boron oxide doped layer that reaches required amount at each wafer.
In deposition process, temperature is brought up in 800-1000 degree centigrade the scope, 950 degrees centigrade of the bests.Under this temperature, the solubility of boron solid and diffusance are relatively low, are about respectively 1.5 * 1020/cm3 and 0.05 micron/hour.
Simultaneously, boron oxide doped layer formation rate is very high, especially in the situation that have hydrogen and oxygen in the steam, is specially the decomposition of boron chloride and the formation of boron oxide doped layer.The effect of water vapour is the formation of accelerating doped layer, thereby makes the doped layer that is rich in a large number boron deposit to silicon wafer surface within a relatively short time.In this stage, only have the boron of a very little part to diffuse in the Silicon Wafer.
The amount of boron is greater than being the required amount of doping wafer that reaches in the doped layer.In this process, various parameters, such as temperature, mist, the interaction between reaction rate and the wafer is unessential, and need not strictly control.
After depositional phase, have sufficient boron-dopped layer to deposit to silicon wafer surface, for example every square metre of resistance is 40 ohm about boracic 1000 dusts of Silicon Wafer, and temperature slowly is promoted to 1025 degrees centigrade through approximately tens minutes time.This temperature keep 25 minutes during in, the boron of doping will overflow the boron oxide doped layer and diffuse in the Silicon Wafer.As long as the boron oxide doped layer of sufficient quantity is arranged in silicon wafer surface, the doping rate just only depends on temperature, and irrelevant with the amount of boron oxide, these are different from traditional doping process.Therefore, as long as the boron of q.s is arranged in doped layer, even excessive, the doping under higher temperature also than before doping process even.
After boron diffuses into semiconductor crystal wafer, namely pass through above-mentioned one-period after, wafer is moved out of, remaining boron oxide doped layer will be corroded in the HF solution of 10: 1 (dilution).Select test wafer, then use the film resistor of four-point probe systematic survey wafer.The PN junction degree of depth of gained wafer is about 0.5 μ m (micron).Then wafer is subject to the processing of other traditional handicrafts.
Because the present invention, the productivity of Impurity Diffusion semiconductor crystal wafer is improved and the easier quilt of the uniformity is controlled.The performance of the wafer that conventional art and the present invention obtain is compared as follows table:
Should be understood that the present invention is not limited only to the parameter of specific material or top appointment, can make suitable modification within the scope of the invention.And the present invention also may be applicable to the doping of other III-th families and V group element, and other semiconductive material wafers.
Embodiment:
In the present invention, most Silicon Wafers are approximately 0.020 inch, and pass through environment by boron chloride, nitrogen, the processing of the heating furnace that hydrogen and oxygen form.Wafer is placed on the ranks quadrature place of relative wind direction continuously, and crystal column surface is parallel to each other.Deposition process is divided into two stages or two steps, is integrated into one-period and finishes.Although wafer is stacking placement in parallel to each other, there are enough air-flows to form the boron oxide doped layer that reaches required amount at each wafer.
In deposition process, temperature is brought up in 800-1000 degree centigrade the scope, 950 degrees centigrade of the bests.Under this temperature, the solubility of boron solid and diffusance are relatively low, are about respectively 1.5 * 1020/cm3 and 0.05 micron/hour.
Simultaneously, boron oxide doped layer formation rate is very high, especially in the situation that have hydrogen and oxygen in the steam, is specially the decomposition of boron chloride and the formation of boron oxide doped layer.The effect of water vapour is the formation of accelerating doped layer, thereby makes the doped layer that is rich in a large number boron deposit to silicon wafer surface within a relatively short time.In this stage, only have the boron of a very little part to diffuse in the Silicon Wafer.
The amount of boron is greater than being the required amount of doping wafer that reaches in the doped layer.In this process, various parameters, such as temperature, mist, the interaction between reaction rate and the wafer is unessential, and need not strictly control.
After depositional phase, have sufficient boron-dopped layer to deposit to silicon wafer surface, for example every square metre of resistance is 40 ohm about boracic 1000 dusts of Silicon Wafer, and temperature slowly is promoted to 1025 degrees centigrade through approximately tens minutes time.This temperature keep 25 minutes during in, the boron of doping will overflow the boron oxide doped layer and diffuse in the Silicon Wafer.As long as the boron oxide doped layer of sufficient quantity is arranged in silicon wafer surface, the doping rate just only depends on temperature, and irrelevant with the amount of boron oxide, these are different from traditional doping process.Therefore, as long as the boron of q.s is arranged in doped layer, even excessive, the doping under higher temperature also than before doping process even.
After boron diffuses into semiconductor crystal wafer, namely pass through above-mentioned one-period after, wafer is moved out of, remaining boron oxide doped layer will be corroded in the HF solution of 10: 1 (dilution).Select test wafer, then use the film resistor of four-point probe systematic survey wafer.The PN junction degree of depth of gained wafer is about 0.5 μ m (micron).Then wafer is subject to the processing of other traditional handicrafts.
Should be understood that the present invention is not limited only to the parameter of specific material or top appointment, can make suitable modification within the scope of the invention.And the present invention also may be applicable to the doping of other III-th families and V group element, and other semiconductive material wafers.
Claims (5)
1. semiconductor crystal wafer doping diffusion technique, it is characterized in that: the depositional phase with alloy doped silicon wafers such as boron, phosphorus, arsenic, antimony is included in the step that forms a large amount of alloy layers under the temperature in the definition temperature range in silicon wafer surface with the alloy of choosing, and a large amount of alloy layers formed at Silicon Wafer with comparatively faster speed within very short a period of time; Diffusion phase be included in one the definition temperature the basis on slowly bring up to a relatively high temperature and keep this temperature in the specific period, the alloy of specified quantitative will be diffused in the wafer like this; Then from above-mentioned wafer, remove unnecessary alloy layer.
2. semiconductor crystal wafer doping diffusion technique according to claim 1, it is characterized in that: the environment of diffusional environment is the environment that has mixed boron chloride, nitrogen, hydrogen and oxygen.
3. semiconductor crystal wafer doping diffusion technique according to claim 1 is characterized in that: the temperature that first step forms the depositional phase of alloy layer is approximately 950 degrees centigrade.
4. semiconductor crystal wafer doping diffusion technique according to claim 1, it is characterized in that: the diffusion depth of diffusion phase alloy in above-mentioned wafer is approximately 0.5 micron.
5. semiconductor crystal wafer doping diffusion technique according to claim 1, it is characterized in that: alloy is boron and keeps wafer under about 800 to 1000 degrees centigrade environment in the depositional phase, with about 10 minutes time temperature is increased to approximately 1025 degrees centigrade in diffusion phase, and kept such temperature about 25 minutes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012100757012A CN103325666A (en) | 2012-03-21 | 2012-03-21 | Semiconductor wafer doping and diffusing technology |
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| CN2012100757012A CN103325666A (en) | 2012-03-21 | 2012-03-21 | Semiconductor wafer doping and diffusing technology |
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| CN103325666A true CN103325666A (en) | 2013-09-25 |
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| CN2012100757012A Pending CN103325666A (en) | 2012-03-21 | 2012-03-21 | Semiconductor wafer doping and diffusing technology |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060035448A1 (en) * | 2004-08-12 | 2006-02-16 | Siltronic Ag | Process for producing doped semiconductor wafers from silicon, and the wafers produced thereby |
| CN100530704C (en) * | 2007-12-27 | 2009-08-19 | 北京市太阳能研究所有限公司 | A diffusion technique applied on silicon solar battery |
| WO2010055346A2 (en) * | 2008-11-12 | 2010-05-20 | Silicon Cpv Plc | Photovoltaic solar cells |
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- 2012-03-21 CN CN2012100757012A patent/CN103325666A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060035448A1 (en) * | 2004-08-12 | 2006-02-16 | Siltronic Ag | Process for producing doped semiconductor wafers from silicon, and the wafers produced thereby |
| CN100530704C (en) * | 2007-12-27 | 2009-08-19 | 北京市太阳能研究所有限公司 | A diffusion technique applied on silicon solar battery |
| WO2010055346A2 (en) * | 2008-11-12 | 2010-05-20 | Silicon Cpv Plc | Photovoltaic solar cells |
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Application publication date: 20130925 |