Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described.
Referring to Fig. 1, it is the structural representation of first embodiment of a kind of data handling system provided by the invention.
In the present embodiment, data handling system 1 comprises data access unit 10 and field programmable gate array processing unit 20.
Described data access unit 10 is connected with described field programmable gate array processing unit 20.
Described data access unit 10 is used for being connected with the GSM-R network interface, the differential signal of described GSM-R network interface is carried out analog-to-digital conversion and time division multiplexing is handled, the acquisition Frame; Described Frame comprises signaling data and valid data.
In the present embodiment, described field programmable gate array processing unit 20 is used for extracting the signaling data in the described Frame according to High level data link control, and extracts valid data in the described Frame according to described signaling data.
At present, China GSM-R digital mobile communication system mainly is made of seven subsystems: network exchange subsystem, base station sub-system, operation and maintenance sub system, GPRS subsystem, intelligent network subsystem, fixing switching subsystem and the terminal subsystem of inserting.Carry out transfer of data by different network interfaces wherein between each subsystem, or between each subsystem internal unit.In embodiments of the present invention, described GSM-R network interface comprises Abis interface, A interface, primary rate interface, C interface, D interface, E interface, G interface, GB interface, GN interface, GI interface and GR interface.
Wherein, Abis interface, A interface and primary rate interface (PRI interface) record to some extent in this specification background technology; C interface is the interface between mobile switching centre's (Mobile Switching Center is called for short MSC) and the attaching position register (Home Location Register is called for short HLR); D interface is the interface between MSC and the VLR Visitor Location Register (Visitor Location Register is called for short VLR); E interface is two interfaces between the mobile switching centre; G interface is two interfaces between the VLR Visitor Location Register; The GB interface is the interface between GPRS serving GPRS support node and the base station sub-system; The GN interface is between two GPRS serving GPRS support nodes or the interface between GPRS serving GPRS support node and the Gateway GPRS Support Node; The GI interface is the interface between GPRS and the external packet data net; The GR interface is interface between GPRS service support joint and the HLR.
Referring to Fig. 2, it is the structural representation that the data access unit in the first embodiment of the invention is connected with the GSM-R network interface.
In Fig. 2, Abis interface is the interface between base transceiver station 101 and the base station exchange center 102; The A interface is the interface between base station exchange center 102 and the mobile switching centre 103; The PRI interface is the interface between mobile switching centre 103 and the radio block center 104.
In the present embodiment, when specifically implementing, the employing differential transfer technology in transmission course of GSM-R network signal.Therefore, the analog signal that inserts from each network interface of GSM-R is differential signal.Differential transfer is a kind of signal transmission technology, be different from the way of a traditional ground wire of a holding wire, differential transfer is all transmitted signal on these two lines, and the amplitude of these two signals equates, phase place is opposite, and the signal of the transmission on these two lines is exactly differential signal.
Need to prove, the annexation of only having drawn Abis interface, A interface and PRI interface and signal connector 10 among Fig. 2, other GSM-R network interface does not draw one by one.But the annexation of other GSM-R network interface and data access unit 10 is identical with the annexation of Abis interface and data access unit 10.The signaling data of required collection, voice call data, train driving control data can be transmitted at above-described each GSM-R network interface in the present embodiment.
In the present embodiment, data access unit 10 carries out analog-to-digital conversion with the differential signal of described GSM-R network interface and time division multiplexing is handled, and obtains Frame; Described Frame comprises signaling data and valid data.
Preferably, described Frame is the Frame of E1 standard or the Frame of T1 standard.
Wherein, the primary group of the pulse code modulation in Europe is called for short the E1 standard, and its speed is the 2.048Mb/s(MBPS).The Frame of E1 standard refers to the time division multiplexing frame (its length T=125 microseconds) of E1, is divided into 32 equal time slots altogether, time slot be numbered TS0~TS31.Wherein time slot TS0 is as frame sync identifications, and time slot TS16 is used for transmitting signaling data, and remaining TS1~TS15 and TS17~TS31 totally 30 time slots are used as 30 speech channels.Each time slot transmits the 8bit(bit), therefore an E1 Frame has 256bit.Per second transmits 8000 frames, so the data transfer rate of E1 standard is exactly 2.048Mb/s.
The T1 standard is the pulse code modulation mode of using in the North America.The Frame of T1 standard has 24 time slots.Wherein each time slot is encoded with 7bit, and then adds 1bit signaling code element, therefore a Time Slot Occupancy 8bit.Frame swynchronization code is to add 1bit after the coding of 24 time slots, and every like this frame has 193bit.Therefore, the Frame of T1 standard comprises 23 B channels and a D channel.Wherein the B channel is also referred to as bearer channel, is used for transferring voice or data message in integrated services digital network; The D channel is 16kb/s to the speed that the user provides in the basic rate interface of integrated services digital network, and the speed that provides to the user in primary rate interface is 64kb/s, and the D channel is mainly used in transmitting signaling data.
What at present, adopted each application scenario of China is the E1 standard in Europe mostly.The T1 standard is generally used for advancing the large organization of high bandwidth and high speed rate transmission between remote site, it has high-quality conversation and data transmit the interface.
In the present embodiment, the differential signal that the GSM-R network interface inserts is handled the Frame that obtains, comprise signaling data and valid data.Wherein, described valid data comprise voice call data and train driving control data.Particularly, the data message of containing in this Frame, according to the actual dispatch application of GSM-R network, the data that each network interface transmits are different.
Field programmable gate array (Field-Programmable Gate Array, be called for short FPGA), be programmable logic array (Programmable Array Logic, be called for short PAL), GAL (Generic ArrayLogic, be called for short GAL), the product that further develops on the basis of CPLD programming devices such as (Complex Programmable Logic Device are called for short CPLD).FPGA is as application-specific integrated circuit (ASIC) (Application Specific Integrated Circuit, abbreviation ASIC) a kind of semi-custom circuit in the field occurs, both solve the deficiency of custom circuit, overcome the limited shortcoming of original programming device gate circuit number again.
The operation principle of FPGA is: utilize small-sized look-up table to realize combinational logic, each look-up table is connected to the input of a trigger, trigger drives other logical circuit again or drives input/output module, constituted the basic logic unit module that not only can realize combination logic function but also can realize the sequential logic function thus, these intermodules utilize metal connecting line to be connected to each other or are connected to input/output module.
Referring to Fig. 3, it is the structural representation of second embodiment of a kind of data handling system provided by the invention.
Present embodiment is on the basis of first embodiment, and further, described field programmable gate array processing unit 20 comprises: passage configuration module 201, string and modular converter 202 and data extraction module 203.Wherein, the operation principle of the data access unit in the present embodiment 10 is identical with data access unit among function and first embodiment.
In the present embodiment, described passage configuration module 201 is used for that described Frame is carried out time slot and divides, and with the data of each time slot one by one correspondence distribute to a data passage.
During concrete enforcement, the signaling data in the GSM-R network and valid data (comprising voice call data and train driving control data) utilize time-division multiplex technology, and the formation Frame is put at same physical cord (as coaxial cable, twisted-pair feeder) and transmitted.When adopting the Frame of E1 standard, the different time-gap that different data take respectively in 32 time slots in the Frame carries out transfer of data.
Referring to Fig. 4, be that the data channel of the E1 Frame in the second embodiment of the invention is divided schematic diagram.
E1 Frame with 32 time slots of E1 standard is example, the E1 Frame is carried out data channel divide.Particularly, when forming Frame, with the frame synchronizing signal of time slot 0 store data frame, time slot 1 is deposited signaling data, and time slot 2 is deposited the voice call data, and time slot 3 is deposited train driving control data.After carrying out data channel when dividing, detecting the frame synchronizing signal of time slot 0 when passage configuration module 201, the 8 Bits Serial Bit datas (time interval that every frame sends is 125 microseconds) of time slot 0 in every frame are mapped to data channel 0; 8 Bits Serial Bit datas of time slot 1 are mapped to data channel 1; So analogize, 32 time slots of E1 Frame are divided into 32 data passages.
Described string and modular converter 202 after being used for serial data with each described data channel and being converted to 8 parallel-by-bit data, are exported to described data extraction module 203.String and modular converter 202 are converted to 8 parallel-by-bit data with the serial data of each data channel, and when carrying out data output according to clock cycle of field programmable gate array processing unit 20 or operating frequency, be that unit outputs in the data extraction module 203 and handles with 8 parallel-by-bit data (byte).Data extraction module 203 all is that unit handles with the byte in follow-up processing procedure.
Described data extraction module 203, be used for the identification byte " 01111110 " according to described High level data link control, 8 parallel-by-bit data to each described data channel detect one by one, and when the data of described data channel are identical with described identification byte " 01111110 ", according to described high-level data connection control protocol, data to the data channel corresponding with described identification byte are decoded, and extract described signaling data; And extract valid data in the described Frame according to described signaling data.
Wherein, High level data link control (High-Level Data Link Control, be called for short HDLC), be one at Synchronization Network transmitting data, bit-oriented data link layer protocol.HDLC focuses on the logical transport to the data that are segmented into physical block or bag, and data finish by the beginning flag guiding and by termination flag, are also referred to as the HDLC frame.Particularly, first byte of each HDLC frame and last byte all have an identity code " 01111110 " as beginning flag, the termination flag of frame.Identity code " 01111110 " does not allow to occur in the inside of HDLC frame, in order to avoid cause ambiguity as frame sync mark.
When adopting HDLC to carry out transfer of data, at transmitting terminal, monitor all fields except identity code, when finding continuous 5 bits " 1 " are arranged when occurring, just add thereafter and insert a bit " 0 ", continue the bit stream of sending out follow-up then; At receiving terminal, monitor all fields except the beginning flag sign indicating number equally.After 5 bits of continuous discovery " 1 " occur, if a bit " 0 " is then deleted it automatically thereafter, to recover original bit stream.All bit-oriented data link control protocols all adopt unified frame format, no matter be that data or independent control information all are that unit transmits with the frame.
The FPGA device is programming device, and its inside has comprised the mass memory element, for example trigger (Flip-Flop) or other more complete block of memory.The FPGA device can be used to the logic gates that realizes that some are basic, as AND gate, OR-gate, partial sum gate; Perhaps more complicated combination function is such as decoder etc.The FPGA device inside comprises configurable logic blocks (Configurable Logic Block is called for short CLB), input/output module (Input Output Block comprises IOB) and three component parts of interconnector (Interconnect).In the present embodiment, passage configuration module 201 in the field programmable gate array processing unit 20, string and modular converter 202 and data extraction module 203 can be passed through its inner memory cell, configuration logic module and interconnector are to realize the data processing function of each module in the embodiment of the invention.
Therefore, when the data link layer decoder adopts High level data link control that Frame is handled, data extraction module 203 need be monitored the bit stream in the Frame, after 5 bits of continuous discovery " 1 " occur, if a bit " 0 " is then deleted it automatically thereafter, to obtain the signaling data in the described Frame.
During concrete enforcement, has only the signaling data of gathering certain slot transmission on E1 Frame or the T1 Frame, and it is analyzed, the valid data that just can learn current calling are to exist on which time slot or the data channel to transmit (different network interface, per call is different to valid data institute distributed time slot, and namely the place time slot to valid data carries out dynamic assignment).Therefore, in the present embodiment, according to High level data link control, adopt the FPGA processing unit to extract signaling data, extract the valid data in the Frame then.
The logic of FPGA realizes by loading programming data to inner static storage cell, be stored in value in the memory cell and determined between the logic function of logical block and each module or the connected mode between module and input and output, and final decision the FPGA function that can realize.
In data handling procedure, take full advantage of the flexibility of FPGA device in the circuit design process, realize the signaling data of the whole network interface of GSM-R and the extraction of valid data, thereby improved the overall performance of data handling system.
Further, in the present embodiment, described valid data comprise voice call data or train driving control data.
When described valid data are the voice call data, described data extraction module 203 also is used for according to described signaling data, obtain the data channel at the place of described voice call data, and to adopt the transparent transmission pattern be described voice call data with the data extract of described data channel.During concrete enforcement, by the parsing to described signaling data, obtain the time slot of described voice call data in described Frame, 201 pairs of these Slot allocation data passages of passage configuration module; After data extraction module 203 is obtained the data channel at place of described voice call data, adopt the transparent transmission pattern that the data of this data channel are extracted, be described voice call data.
Transparent transmission, namely length and the content of the data that receive of the data that send of transmitting terminal and receiving terminal are in full accord, and a business of only being responsible for will needing to transmit is sent to the destination, guarantees that simultaneously the quality of transmission get final product, and the business of transmitting is not handled.Therefore, when the voice call data were extracted, data extraction module 203 was equivalent to an invisible data wire, plays the effect of a data link.
When described valid data are train driving control data, described data extraction module 203 also is used for according to described signaling data, obtain the data channel at described train driving control data place, and adopt V.110 agreement that the data of described data channel are decoded, extract described train driving control data.
V.110 agreement belongs to a member in the communication protocol V series, is mainly used in the data terminal equipment in the integrated services digital network (Integrated Services Digital Network is called for short ISDN).Integrated services digital network, be commonly called as " Integrated Service Digital Network ", it is a typical circuit-switched network, feature with reliable transmission, except being used for telephone service, ISDN can also provide such as multiple business such as video telephone, data communication, video conferencing, thereby multiple business such as phone, fax, data, image are comprehensively transmitted in a unified digital network and is handled.If terminal need be in circuit-switched network transmitting data service, need adopt V.110 protocol encapsulation data.
Adopt circuit-switched network transmission train to exercise the control data service in the middle of the GSM-R network just, data terminal equipment designs according to isdn standard, adopts V.110 protocol encapsulation data.V.110 frame need be set up data channel in the mode of dialing before transfer of data, namely distributes transmission time slot.
Referring to table 1, it is a complete V.110 Frame that carries out data encapsulation according to agreement V.110.
The frame structure of table 1V.110 frame
Referring to table 1, byte 0 is identification byte, and perseverance is binary data " 00000000 ", byte 1, byte 2 ..., byte 9 the 1st Bit data be 1, this 17 Bit data is as the sign position of frame V.110; Bit D1~bit D48 is the valid data position of V.110 frame; Bit E1~bit E7 is the Transmission bit rate of frame V.110; Other bits are the overhead bit position of frame when transfer of data V.110.
In the present embodiment, 203 couples of bit D1~bit D48 of data extraction module extract, and the escape character (ESC) in the data after it is handled, will handle according to asynchronous serial communication protocol reduces, and can obtain described train driving and control data.
Referring to Fig. 5, it is the structural representation of the 3rd embodiment of a kind of data handling system provided by the invention.
Further, in the present embodiment, described field programmable gate array processing unit 20 also comprises data check module 204, group bag module 205 and host interface module 206.
Described data check module 204 is used for described signaling data or described valid data are carried out verification, and when verification is correct, described signaling data or described valid data is sent to described group of bag unit 205.
Described group of bag module 205, the described signaling data or the described valid data that are used for described verification unit 204 is submitted to carry out buffer memory and integration, and the signaling data after will integrating or valid data transfer to described host interface module 206.
Described host interface module 206 is used for the control signal according to the backstage central processing unit, and the signaling data or the valid data that extract after integrating in the described group of bag module are given described backstage central processing unit.
A kind of data handling system provided by the invention by data access unit is set, inserts the differential signal of GSM-R network transmission, and it is carried out analog-to-digital conversion and forms Frame according to the time division multiplexing standard; Again by the signaling data in the field programmable gate array processing unit elder generation extraction Frame, again according to this signaling data extracted valid data, realized on a data acquisition system function that adopts the several data of ordered pair GSM-R network interface when normal to gather.
In embodiments of the present invention, also provide a kind of data processing method.
Referring to Fig. 6, it is the schematic flow sheet of an embodiment of a kind of data processing method provided by the invention.
In the present embodiment, described data processing method may further comprise the steps:
Step S1: insert the differential signal of GSM-R network interface, and described differential signal is carried out analog-to-digital conversion and time division multiplexing processing, obtain Frame; Described Frame comprises signaling data and valid data.
Step S2: described Frame is carried out time slot divides, and with the data of each time slot one by one correspondence distribute to a data passage.
Step S3: the data of each described data channel are converted to 8 parallel-by-bit data.
Step S4: according to the identification byte " 01111110 " of described High level data link control, 8 parallel-by-bit data to each described data channel detect one by one, and when the data of described data channel are identical with described identification byte " 01111110 ", according to described high-level data connection control protocol, data to the data channel corresponding with described identification byte are decoded, and extract described signaling data.
Wherein, the step S1 in the present embodiment is identical to the record content of a kind of data handling system that the operation principle of step S4 and process and the embodiment of the invention provide, and no longer discusses in the present embodiment.
Step S5: extract valid data in the described Frame according to described signaling data.
Further, in the present embodiment, described valid data comprise voice call data or train driving control data, then in described step S5, comprising:
When described valid data are described voice call data, according to described signaling data, obtain the data channel at the place of described voice call data, and to adopt the transparent transmission pattern be described voice call data with the data extract of described data channel.Wherein, the operation principle of transparent transmission is identical with the described content of second embodiment of a kind of data handling system provided by the invention, no longer discusses here.
When described valid data are described train driving control data, according to described signaling data, obtain the data channel at described train driving control data place, and adopt V.110 agreement that the data of described data channel are decoded, extract described train driving control data.
Wherein, form according to the frame format of agreement V.110 and data thereof described identical with table 1, no longer argumentation in the present embodiment.
Referring to Fig. 7, be that Fig. 6 embodiment of the present invention adopts the V.110 method flow schematic diagram of agreement extraction train driving control data.Further, described employing V.110 agreement is decoded to the data of described data channel, extracts described train driving control data, comprises step S51~step S52.
Step S51: according to described V.110 agreement, obtain V.110 the frame format of frame and the flag bit of described V.110 frame.
Step S52: according to the flag bit of described V.110 frame, monitor the frame synchronization state of described data channel.
Described data channel be in frame synchronization state the time, extract the Bit String of the data area of described V.110 frame.
Step S53: according to asynchronous serial communication protocol, remove the asynchronous serial communication flag bit in the Bit String of data area of described V.110 frame.
Asynchronous serial communication refers to have the serial data transmission means of irregular data segment transmission characteristic, and it has certain data format in data transmission procedure.
Referring to Fig. 8, it is a kind of frame format of asynchronous serial communication Frame provided by the invention.
First of the asynchronous communication Frame is the start bit.When transmitting apparatus will send a character data, at first send a logical zero signal, this logic low " 0 " is exactly start bit.Start bit passes to receiving equipment by order wire, after receiving equipment detects this logic low " 0 ", just begins to prepare the data with clock information signal.Therefore, the start bit role represents that exactly character transmits beginning.
After receiving equipment is received start bit, and then will receive data bit.The number of data bit can be 5,6,7 or 8 data.In the character data transport process, data bit begins transmission from lowest order.After data send, can send parity check bit.Parity check bit is used for limited error detection occurs, and communicating pair need be arranged consistent parity check system when communication.With regard to data transmitted, parity check bit was redundant digit, a kind of character of its expression data, and this character is used for error detection, though limited but be easy to realize.What send after parity bit or data bit is position of rest, can be 1,1.5 or 2.Position of rest is the end mark of a character data.
As preferred embodiment, in the present embodiment, the significant character data transmit singly with form shown in Figure 8.The start bit b0 of asynchronous serial communication Frame is the logical zero signal; Data bit b1~data bit b8 is 8 data; And when specifically implementing, the asynchronous serial communication Frame does not arrange parity check bit, is position of rest b9 after the data bit b8 back namely, and it is the logical one signal.
In asynchronous serial communication, communication line always is in the logical one state when idle.
Step S54: detect whether have double byte " 0x7D0x5E " or double byte " 0x7D0x5D " in the described Bit String; When having described double byte " 0x7D0x5E ", " 0x7D0x5E " is converted to " 0x7E " with described double byte; When having described double byte " 0x7D0x5D ", " 0x7D0x5D " is converted to " 0x7D " with described double byte.
During concrete enforcement, suppose that current train driving control data are in data channel 16, then for the correct train driving control data of extracting, before carrying out data extract, need carry out frame synchronization to the 8 parallel-by-bit data (byte) that data passage 16 sends at every turn and detect.
Particularly, in synchronization detection process, need to receive data channel 16 10 successive bytes (as the byte 0 in the table 1, byte 1, byte 2 ..., byte 9), whether the byte 0 that detects in these 10 successive bytes is " 00000000 "; Detect again whether byte 1 to the 1st Bit data separately of byte 9 is 1.When these 17 Bit datas all meet the form of frame V.110, think that then the data of data channel 16 have realized V.110 frame synchronization.But in the specific implementation, in order to guarantee reliable synchronization, repeat twice at least about above synchronizing process, Cai the data true synchronization of decision data passage 16 can enter data acquisition then.
In the present embodiment, when the data channel that detects train driving control data place enters synchronous regime, from frame V.110, extract the data among bit D1~bit D48, as the data source of train driving control data; Further, according to asynchronous serial communication protocol the data among bit D1~bit D48 are handled, reject in the data among bit D1~bit D48 about the flag bit in the asynchronous serial communication process, obtains preliminary train driving and controls data.But the transfer character that includes in the specific implementation, HDLC in these preliminary train driving control data.Need do further conversion to data according to the method flow among the step S526.
Step S55: the Bit String after will changing is extracted as described train driving control data.
As preferred embodiment, in the present embodiment, described Frame is the Frame of E1 standard or the Frame of T1 standard.
Referring to Fig. 8, it is the schematic flow sheet of the another embodiment of a kind of data processing method provided by the invention.
Further, present embodiment also comprises step on the basis of the data processing method that first embodiment provides:
Step S6: described signaling data or described valid data are carried out verification.
As preferred embodiment, when specifically implementing, adopt cyclic redundancy check method that described signaling data or valid data are carried out verification.
" CRC " English name is Cyclical Redundancy Check, is called for short CRC, and it is to utilize the principle of division and remainder to carry out error detection (Error Detecting).
The operation principle of CRC check is: produce a cyclic redundancy code at transmitting terminal, namely crc value is attached to the information bit back and sends to receiving terminal together.Receiving end device recomputates crc value to the data of receiving, itself and the crc value of receiving are compared.If two crc value differences illustrate that then mistake appears in data communication; Otherwise, illustrate that then data communication is normal.
Particularly, when transmitting terminal coding and receiving terminal verification, can utilize the generator polynomial G(x of prior agreement) obtain, wherein, x is an information digit certificate.As, k(k 〉=1) the position information bit that will send can corresponding (k-1) order polynomial K(x); R(r 〉=1) the position redundant digit is corresponding to (r-1) order polynomial R(x); Add the code word of the n=k+r that r position redundant digit is formed by information bit back, k position, then corresponding to (n-1) order polynomial T(x) * x*K(x)+R(x).The checkout procedure of receiving terminal is exactly that the code word deconv that will receive is with G(X), if being zero, residue thinks the transmission zero defect; If the non-vanishing then transmission of residue has mistake.
Wherein, CRC check sign indicating number the most commonly used is 16 check code CRC-16 sign indicating number and 32 check code CRC-32 sign indicating number.In the present embodiment, when carrying out data check, can carry out CRC-16 code check and CRC-32 code check simultaneously.For the CRC-16 sign indicating number, its cyclic redundancy check (CRC) standard polynomial commonly used is: x
16+ x
12+ x
5+ 1; For the CRC-32 sign indicating number, its cyclic redundancy check (CRC) standard polynomial commonly used is: X
32+ X
26+ X
23+ X
22+ X
16+ X
12+ X
11+ X
10+ X
8+ X
7+ X
5+ X
4+ X
2+ X+1.
Step S7: and when verification is correct, described signaling data or described valid data are carried out buffer memory and integration.
Step S8: and extract described signaling data or described valid data according to the control signal of backstage central processing unit and give described backstage central processing unit.
A kind of data processing method provided by the invention, insert the differential signal of GSM-R network transmission, after it being carried out analog-to-digital conversion and forming Frame according to the time division multiplexing standard, earlier extract signaling data in the described Frame according to High level data link control, go out valid data in the described Frame according to the information extraction at signaling data end again.Thereby realized the acquisition function to the several data of GSM-R network interface, and solved to the sequence problem in the GSM-R network interface data extraction procedure, guaranteed the correct related of signaling data and valid data.
The above is preferred implementation of the present invention; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; can also make some improvements and modifications, these improvements and modifications also are considered as protection scope of the present invention.