CN103248593A - Method and system for frequency offset estimation and elimination - Google Patents

Abstract

The invention provides a system for frequency offset estimation and elimination, which comprises a receiver used for receiving baseband signals, an analog-to-digital converter connected with the receiver and used for switching the baseband signals received by the receiver to single byte signals x(n), a zero-crossing detection module connected with the analog-to-digital converter and used for performing differentiation for an absolute value of the single byte signals x(n) input by the analog-to-digital converter, a decimation filter used for connecting and receiving the pulse signals input by the zero-crossing detection module and outputting signals of N times symbol rate, a direct current detection module used for converting the signals of N times symbol rate to parallel N route signals of one time symbol rate and then performing sampling synchronisation and selectivity filtering for the N route signals at the same time, and a frequency offset estimation module used for converting an output of the direct current detection module to the frequency offset, wherein signals y(n) output by the zero-crossing detection module is a string of pulse signals related to the frequency of the baseband signals.

Description

Frequency deviation estimation and removing method and system

Technical field

The present invention relates to digital wireless communication field, signal process field especially is specifically related to a kind ofly for communication system, and the frequency deviation of Low Medium Frequency zero passage detection receiver institute acknowledge(ment) signal is estimated and eliminated.

Background technology

At electronic communication, particularly in the mobile communication, adopt the coherent demodulation method more and more, to improve the performance of communication system.Such as at 3G (Third Generation) Moblie (3rd Generation, abbreviation " 3G ") Wideband Code Division Multiple Access (WCDMA) (the Wideband Code Division Multiple Access of one of standard, abbreviation " WCDMA ") in the mobile communication system, the up-downgoing channel between base station and the travelling carriage has all adopted the signal detecting method of coherent demodulation.

One of precondition of coherent demodulation be receiving terminal the demodulation carrier wave must with the modulated carrier of transmitting terminal with homophase frequently.And in actual applications, because a variety of causes makes that the demodulation carrier wave of receiving terminal can not guarantee to keep in full accord with the modulated carrier of transmitting terminal.At first, conditions such as the volume of technical merit and transmitter, receiver and cost have all limited indexs such as the precision of the local crystal oscillator of transmitting-receiving two-end and stability; Secondly, for the wireless environment of mobile communication, the caused Doppler effect that relatively moves of transmitter and receiver can cause frequency departure extra between the transmitter and receiver.Such as, in the 3G mobile communication system, when relative moving speed reaches 120km/h, if carrier frequency is near the 2GHz, then correspondingly will produce the Doppler frequency shift of about 250Hz.This will be more remarkable in satellite communication.At this, in actual applications, adopt frequency deviation estimation and correcting method to correct the transmitting-receiving frequency deviation that causes owing to reasons such as wireless channels usually, to be applicable to coherent demodulation technology, improve systematic function.

In wireless communications environment, because the caused multipath fading of multipath transmisstion, to cause the distortion of wireless signal, not only there is large-scale rapid fluctuation in amplitude, and can superpose and differ at random, this makes current mobile communication system, especially when adopting phase modulation technique, as two-phase key modulation (Binary PhaseShift Keying, abbreviation " BPSK "), four phase keys modulation (Quaternary Phase Shift Keying, be called for short " QPSK "), the demodulation performance that receives signal changes very responsive to phase place.Therefore in current mobile communication system, adopt technology such as channel estimating that wireless channel is propagated the phase distortion that causes more and accurately estimate and corrects, with raising signal demodulation performance.Yet technology such as channel estimating also require the frequency deviation of receiving-transmitting sides in certain scope.In fact, when frequency deviation is higher, accuracy of channel estimation and performance will sharply descend.Therefore, under the multipath channel environment, also press for frequency deviation estimation and correction and carry out correcting frequency deviation, and then improve channel estimation accuracy and systematic function.

As seen, in wireless communication system, particularly in the mobile communication system under the multipath channel environment, frequency deviation is estimated and correcting method is synchronous for transmitting-receiving, coherent demodulation and channel estimating all are vital.

Summary of the invention

The technical problem to be solved in the present invention is to provide the corresponding relation between a kind of baseband signal direct current biasing and the intermediate-freuqncy signal frequency shift (FS), by reponse system, and the method for correction of frequency skew.

The present invention solves above-mentioned technical problem by such technical scheme:

Provide a kind of frequency deviation to estimate and the elimination system that this system comprises:

Receiver is in order to accept baseband signal;

Analog to digital converter, receive that receiver receives with baseband signal, and its analog-signal transitions become single-bit signal x (n);

The zero passage detection module, to connecting and receive the single-bit signal x (n) of analog to digital converter input, and the absolute value of single-bit signal x (n) digital signal carried out differential, the signal y (n) of zero passage detection module output is a string pulse signal relevant with base-band signal frequency;

Decimation filter, connection also receives the pulse signal of being imported by the zero passage detection module, and the signal of N times of symbol rate of output;

The direct current detection module, the signal with N times of symbol rate of decimation filter input namely via the signal of decimation filter output, converts the 1 times of symbol rate signal in parallel N road to, again N road signal is carried out sample-synchronous and selective filter simultaneously afterwards;

Frequency deviation estimating modules is converted to frequency offset with the output of direct current detection module.

As a kind of improvement, the direct current detection module comprises the sample-synchronous module, in order to find out the optimum sampling path, the signal to noise ratio optimum in optimum sampling path.

The present invention also provides a kind of frequency deviation to estimate and the frequency deviation estimating method of the system of elimination that this method may further comprise the steps:

Provide a receiver, in order to accept baseband signal;

One analog to digital converter is provided, the analog-signal transitions of baseband signal is become byte signal x (n);

One zero passage detection module is provided, the absolute value of the byte signal x (n) of analog to digital converter input is carried out differential, the signal y (n) of zero passage detection module output is a string pulse signal relevant with base-band signal frequency;

One decimation filter is provided, and connection also receives the pulse signal of being imported by the zero passage detection module, and the signal of N times of symbol rate of output;

One direct current detection module is provided, converts the signal of N times of symbol rate of decimation filter input to parallel N road 1 times of symbol rate signal, again N road signal is carried out sample-synchronous and selective filter simultaneously afterwards;

One frequency deviation estimating modules is provided, the output of direct current detection module is converted to frequency offset.

As a kind of improvement, the function that the zero passage detection module realizes is as follows: y (n)=diff (abs (x (n))), to the absolute value differential of byte signal x (n) of input, the signal y (n) of zero passage detection module output is a string pulse signal relevant with frequency input signal.

As a kind of improvement, the direct current detection module at first converts the signal of N times of symbol rate of the input signal of decimation filter output (namely via) to parallel N road 1 times of symbol rate signal, again N road signal is carried out sample-synchronous and selective filter simultaneously afterwards, the formula of string and conversion is as follows: y _n(k)=and x (n+Nk), n=1,2...N, wherein, x (n+Nk) is the signal via decimation filter output, y _n(k) be conversion parallel signal afterwards.

As a kind of improvement, the direct current detection module comprises the sample-synchronous module, in order to finding out the optimum sampling path, and the signal to noise ratio optimum in optimum sampling path, its slip related algorithm is:

${\mathrm{stat}}_n\left(k\right)=\underset{m=1}{\overset{M}{\mathrm{\Σ}}}{x}_n(k+m)\×P\left(m\right),n=\mathrm{1,2},...N;k=\mathrm{1,2},...K$

K in the following formula is the input signal that 1bit quantizes for the relevant length of sliding, x, and P then is local targeting sequencing, and length is M, x _nBe each parallel 1 times of symbol rate signal in n road.

As a kind of improvement, the determination methods in optimum sampling path is at first to ask value in each path, again the result in N path relatively.

As a kind of improvement, when calculating the optimum sampling path, the N circuit-switched data is carried out selective filter.

As a kind of improvement, FM signal is through after zero passage detection and the decimation filter, convert corresponding range signal to, the amplitude of response is vIF-v and vIF+v, and wherein vIF is known quantity, will eliminate the input of the data of vIF as selective filter, when the sign bit of data changes, this is the data v (k-1) of front and back constantly, and what v (k) characterized is exactly two corresponding range values of FM signal, and processing mode is:

$\mathrm{symDc}\left(k\right)=\frac{v(k-1)+v\left(k\right)}{2}=\mathrm{dc}\widetilde{\mathrm{Est}}\left(k\right)$

dcEst(k)＝(1-α)×dcEst(k-1)+α×symDc(k)

The moment that changes has taken place in the symbol that k is input signal constantly, symDc in the following formula (k) is the k amplitude difference of two corresponding FM signal constantly, the direct current biasing of signal just, through the low pass filter filters out evaluated error, obtain final direct current biasing estimated value dcEst, α in the following formula has determined the bandwidth of low pass filter, and the optimum sampling path is depended in the final output of selective filter.

As a kind of improvement, the output of direct current detection module is frequency offset by the appraising frequency bias module converts, and processing method is as follows:

$\widehat{\mathrm{fOff}}\left(k\right)=\frac{\mathrm{dcEst}\left(k\right)\×\mathrm{Fs}}{\mathrm{dcGain}\×2}$

Fs is the ADC sample frequency of system, and dcGain then is the DC current gain of decimation filter.

Compared with prior art, the present invention has the following advantages: utilize direct current/frequency deviation estimating method of the present invention, can realize that multidiameter delay bit synchronous and every Lu Douke carry out real-time direct current/compensate of frequency deviation.Thereby direct current of the present invention/frequency deviation is estimated to improve the whole performance of accepting system by the accumulation of a plurality of Frames for the frequency of regulating receiver.

Description of drawings

Fig. 1 is the framework schematic diagram of frequency deviation estimation of the present invention and removing method.

Fig. 2 is the configuration diagram of the direct current detection module in frequency deviation estimation of the present invention and the removing method.

Fig. 3 is the configuration diagram of sample-synchronous module in frequency deviation estimation of the present invention and the removing method.

Fig. 4 is the structural representation of selective filter module in frequency deviation estimation of the present invention and the removing method.

Embodiment

Describe the specific embodiment of the present invention in detail below in conjunction with accompanying drawing.

In Low Medium Frequency zero passage detection receiver, the frequency shift (FS) of signal has been directly changed into the direct current offset of baseband signal.Need detect the flip-flop of baseband signal by special method, reduce frequency shift (FS) to sign synchronization, the influence of sample-synchronous and signal demodulation.

The present invention just provides the corresponding relation between a kind of baseband signal direct current biasing and the intermediate-freuqncy signal frequency shift (FS), by reponse system, and the method for correction of frequency skew.

The present invention utilizes the method for parallel detection, and the direct current biasing in the baseband signal that estimation Low Medium Frequency zero passage detection receiver receives converts direct current biasing to corresponding frequency shift (FS), utilizes the frequency departure between reponse system cancellation receiver and the transmitter.As shown in Figure 1.Wherein, analog to digital converter ADC carries out zero passage detection in order to analog-signal transitions is become byte signal (1-bit) with convenient follow-up zero passage detection module.In unit interval signal through the number of times of zero crossing what, can be used for weighing the height of frequency.The zero passage of frequency-shift keying ripple is counted different with different carrier frequency, counts and can obtain difference about frequency, the basic thought of zero passage detection method that Here it is so detect zero passage.The function that the zero passage detection module realizes is as follows:

y(n)＝diff(abs(x(n)))

To the absolute value differential of 1bit data x (n) of input, the signal y (n) of zero passage detection module output is a string pulse signal relevant with frequency input signal.

Decimation filter has two effects, and the first is to the integration of input signal (frequency pulse), also can be understood as to be averaging; It two is to the signal down-sampling behind the integration, and the data rate of output is N times of character rate.Frequency pulse then is converted into corresponding amplitude information through integration.The corresponding high amplitude of high-frequency, the corresponding low amplitude value of low frequency.

As shown in Figure 2, the direct current detection module at first converts the signal of N times of symbol rate of the input signal of decimation filter output (namely via) to parallel N road 1 times of symbol rate signal.Again N road signal is carried out sample-synchronous and selective filter simultaneously afterwards.The formula of string and conversion is as follows:

y _n(k)＝x(n+Nk)，n＝1，2...N

Wherein, x (n+Nk) is the signal via decimation filter output, y _n(k) be conversion parallel signal afterwards.

The purpose of sample-synchronous module is to find out the optimum sampling path, the signal to noise ratio optimum in optimum sampling path.Therefore, the direct current estimated value of this path correspondence also is optimal value.Shown in Figure 3 is exactly the sample-synchronous module.This module is at first carried out 1bit to input signal and is quantized, and reduces complexity under the situation that does not influence performance.The correlation of recycling and local targeting sequencing is found out optimum sample path.

The relevant formula that slides is as follows:

${\mathrm{stat}}_n\left(k\right)=\underset{m=1}{\overset{M}{\mathrm{\Σ}}}{x}_n(k+m)\×P\left(m\right),n=\mathrm{1,2},...N;k=\mathrm{1,2},...K$

K in the following formula is the relevant length of sliding.X is the input signal that 1bit quantizes.P then is local targeting sequencing, and length is M.

$\hat{N}={\mathrm{MAX}}_n\left({\mathrm{MAX}}_k\left({\mathrm{stat}}_n\left(k\right)\right)\right)$

Following formula is the judgement formula in optimum sampling path, at first asks value in each path, again the result in N path relatively.

When calculating the optimum sampling path, the N circuit-switched data is carried out selective filter.Selective filter in this patent only carries out filtering to the data that the sign bit variation takes place.For MSK or fsk signal, can simply be interpreted as the combination of two FM signal: fIF+f and fIF-f.These two FM signal convert corresponding range signal to through after zero passage detection and the decimation filter, and the amplitude of response is vIF-v and vIF+v, and wherein vIF is known quantity.To eliminate the input of the data of vIF as selective filter, when the sign bit of data changes, what these data (v (k-1), v (k)) before and after constantly characterized is exactly two corresponding range values of FM signal.

$\mathrm{symDc}\left(k\right)=\frac{v(k-1)+v\left(k\right)}{2}=\mathrm{dc}\widetilde{\mathrm{Est}}\left(k\right)$

dcEst(k)＝(1-α)×dcEst(k-1)+α×symDc(k)

Variation has taken place in the symbol that k is input signal constantly.SymDc in the following formula (k) is the k amplitude difference of two corresponding FM signal, the just direct current biasing of signal constantly.Through the low pass filter filters out evaluated error, obtain final direct current biasing estimated value dcEst.α in the following formula has determined the bandwidth of low pass filter.The optimum sampling path is depended in the final output of selective filter.After sample-synchronous finishes, only need carry out direct current biasing to the data in optional sampling path and estimate.

The output of direct current detection module is frequency offset by the appraising frequency bias module converts, and computing formula is as follows:

$\widehat{\mathrm{fOff}}\left(k\right)=\frac{\mathrm{dcEst}\left(k\right)\×\mathrm{Fs}}{\mathrm{dcGain}\×2}$

Fs is the ADC sample frequency of system, and dcGain then is the DC current gain of decimation filter.

Because whole testing process needs certain convergence time, can utilize one or more Frame to come estimating frequency offset, after the data convergence, adjust the local frequency of receiver again, reduce frequency shift (FS) to the influence of Low Medium Frequency zero passage detection receiver demodulation performance with this.

$f_{\mathrm{LO}}=f_{\mathrm{LO}}+\widehat{\mathrm{fOff}}\left(k\right)$

Blanket above-mentioned execution mode, utilization of the present invention:

Direct current/appraising frequency bias: utilize the corresponding relation of decimation filter output and direct current and frequency deviation that frequency deviation is estimated in real time, and utilize BREATHABLE BANDWIDTH FILTER TO CONTROL tracking velocity and precision;

Parallel detection/optimum sampling Path selection: utilize parallel processing, estimate simultaneously and compensate a plurality of assumed position sample sequences, and utilize the output result and carry out synchronously;

Selective filter: the input data of utilizing selective filter to select direct current to estimate, get rid of the data that influence precision, improve the accuracy of direct current/frequency deviation valuation.

Utilize direct current/frequency deviation estimating method of the present invention, can realize that multidiameter delay bit synchronous and every Lu Douke carry out real-time direct current/compensate of frequency deviation.Thereby direct current of the present invention/frequency deviation is estimated to improve the whole performance of accepting system by the accumulation of a plurality of Frames for the frequency of regulating receiver.

The above only is preferred embodiments of the present invention; protection scope of the present invention is not limited with above-mentioned execution mode; as long as the equivalence that those of ordinary skills do according to disclosed content is modified or changed, all should include in the protection range of putting down in writing in claims.

Claims (10)

1. a frequency deviation is estimated and the elimination system, it is characterized in that this system comprises:

Receiver is in order to accept baseband signal;

Analog to digital converter, receive that receiver receives with baseband signal, and its analog-signal transitions become single-bit signal x (n);

The zero passage detection module, to connecting and receive the single-bit signal x (n) of analog to digital converter input, and the absolute value of single-bit signal x (n) digital signal carried out differential, the signal y (n) of zero passage detection module output is a string pulse signal relevant with base-band signal frequency;

Decimation filter, connection also receives the pulse signal of being imported by the zero passage detection module, and the signal of N times of symbol rate of output;

The direct current detection module, the signal with N times of symbol rate of decimation filter input namely via the signal of decimation filter output, converts the 1 times of symbol rate signal in parallel N road to, again N road signal is carried out sample-synchronous and selective filter simultaneously afterwards;

Frequency deviation estimating modules is converted to frequency offset with the output of direct current detection module.

2. frequency deviation according to claim 1 is estimated and the elimination system, it is characterized in that the direct current detection module comprises the sample-synchronous module, in order to find out the optimum sampling path, the signal to noise ratio optimum in optimum sampling path.

3. the described frequency deviation of claim 1 is estimated and the frequency deviation estimating method of the system of elimination, it is characterized in that this method may further comprise the steps:

Provide a receiver, in order to accept baseband signal;

One analog to digital converter is provided, the analog-signal transitions of baseband signal is become byte signal x (n);

One zero passage detection module is provided, the absolute value of the byte signal x (n) of analog to digital converter input is carried out differential, the signal y (n) of zero passage detection module output is a string pulse signal relevant with base-band signal frequency;

One decimation filter is provided, and connection also receives the pulse signal of being imported by the zero passage detection module, and the signal of N times of symbol rate of output;

One direct current detection module is provided, converts the signal of N times of symbol rate of decimation filter input to parallel N road 1 times of symbol rate signal, again N road signal is carried out sample-synchronous and selective filter simultaneously afterwards;

One frequency deviation estimating modules is provided, the output of direct current detection module is converted to frequency offset.

4. described frequency deviation estimating method of claim 3, it is characterized in that, the function that the zero passage detection module realizes is as follows: y (n)=diff (abs (x (n))), to the absolute value differential of byte signal x (n) of input, the signal y (n) of zero passage detection module output is a string pulse signal relevant with frequency input signal.

5. described frequency deviation estimating method of claim 4, it is characterized in that, the direct current detection module at first converts the signal of N times of symbol rate of the input signal of decimation filter output (namely via) to parallel N road 1 times of symbol rate signal, again N road signal is carried out sample-synchronous and selective filter simultaneously afterwards, the formula of string and conversion is as follows: y _n(k)=and x (n+Nk), n=1,2...N, wherein, x (n+Nk) is the signal via decimation filter output, y _n(k) be conversion parallel signal afterwards.

6. the described frequency deviation estimating method of claim 5 is characterized in that the direct current detection module comprises the sample-synchronous module, in order to finding out the optimum sampling path, and the signal to noise ratio optimum in optimum sampling path, its slip related algorithm is:

${\mathrm{stat}}_n\left(k\right)=\underset{m=1}{\overset{M}{\mathrm{\Σ}}}{x}_n(k+m)\×P\left(m\right),n=\mathrm{1,2},...N;k=\mathrm{1,2},...K$

K in the following formula is the input signal that 1bit quantizes for the relevant length of sliding, x, and P then is local targeting sequencing, and length is M, x _nBe each parallel 1 times of symbol rate signal in n road.

7. the described frequency deviation estimating method of claim 6 is characterized in that, the determination methods in optimum sampling path is at first to ask value in each path, again the result in N path relatively.

8. the described frequency deviation estimating method of claim 7 is characterized in that, when calculating the optimum sampling path, the N circuit-switched data is carried out selective filter.

9. described frequency deviation estimating method of claim 8, it is characterized in that, FM signal converts corresponding range signal to through after zero passage detection and the decimation filter, and the amplitude of response is vIF-v and vIF+v, wherein vIF is known quantity, to eliminate the input of the data of vIF as selective filter, when the sign bit of data changes, this data v (k-1) before and after constantly, what v (k) characterized is exactly two corresponding range values of FM signal, and processing mode is:

$\mathrm{symDc}\left(k\right)=\frac{v(k-1)+v\left(k\right)}{2}=\mathrm{dc}\widetilde{\mathrm{Est}}\left(k\right)$

dcEst(k)＝(1-α)×dcEst(k-1)+α×symDc(k)

The moment that changes has taken place in the symbol that k is input signal constantly, symDc in the following formula (k) is the k amplitude difference of two corresponding FM signal constantly, the direct current biasing of signal just, through the low pass filter filters out evaluated error, obtain final direct current biasing estimated value dcEst, α in the following formula has determined the bandwidth of low pass filter, and the optimum sampling path is depended in the final output of selective filter.

10. the described frequency deviation estimating method of claim 9 is characterized in that the output of direct current detection module is frequency offset by the appraising frequency bias module converts, and processing method is as follows:

$\widehat{\mathrm{fOff}}\left(k\right)=\frac{\mathrm{dcEst}\left(k\right)\×\mathrm{Fs}}{\mathrm{dcGain}\×2}$

Fs is the ADC sample frequency of system, and dcGain then is the DC current gain of decimation filter.

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