CN114915524B - DC offset real-time compensation method, device, equipment and storage medium - Google Patents

DC offset real-time compensation method, device, equipment and storage medium Download PDF

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Publication number
CN114915524B
CN114915524B CN202210419553.5A CN202210419553A CN114915524B CN 114915524 B CN114915524 B CN 114915524B CN 202210419553 A CN202210419553 A CN 202210419553A CN 114915524 B CN114915524 B CN 114915524B
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signal
direct current
offset
signals
real time
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CN114915524A (en
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刘洋
杜瑜
唐婷
兰霞
张波
吴欣芸
程焱
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CETC 10 Research Institute
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/32Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/36Modulator circuits; Transmitter circuits
    • H04L27/362Modulation using more than one carrier, e.g. with quadrature carriers, separately amplitude modulated
    • H04L27/364Arrangements for overcoming imperfections in the modulator, e.g. quadrature error or unbalanced I and Q levels
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/32Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/36Modulator circuits; Transmitter circuits
    • H04L27/366Arrangements for compensating undesirable properties of the transmission path between the modulator and the demodulator
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

Abstract

The application discloses a direct current bias real-time compensation method, a device, equipment and a storage medium, wherein the method specifically comprises the following steps of responding to a received demodulated I/Q signal, and calculating a direct current bias component of an input signal in real time; and compensating the input signal in real time according to the direct current bias component. The application calculates the signal direct current deviation in real time by adopting the synchronous IQ signals, and then carries out direct current deviation compensation in real time by the direct current bias compensation module, thereby improving the instantaneity and the effectiveness of the compensation algorithm.

Description

DC offset real-time compensation method, device, equipment and storage medium
Technical Field
The application belongs to the technical field of wireless communication, and particularly relates to a direct current bias real-time compensation method, device, equipment and storage medium.
Background
In recent years, with the rapid development of communication technology and information technology and the continuous progress of aviation and aerospace technology, the development and utilization of space by human beings are accelerated, the development trend of space activities is accelerated, various aircrafts are distributed on the middle-low orbit of the earth, the types of carried services are more and more, the demands of people on information are more and more, and the requirements of various fields on information quantity and information transmission rate are higher and higher.
With the continuous development of communication technology, analog communication systems have failed to meet the requirements of high-speed and efficient information transmission. To date, the development of high-speed data transmission has gradually replaced the traditional analog communication system by a communication system based on software radio, and the communication system becomes one of the main modes of high-speed wireless transmission. In software radio, the digital processing section is required to be as close to the antenna as possible, but if the radio frequency signal received by the antenna is directly a/D sampled, the system is required to have an extremely high sampling rate according to the sampling theorem, and even if this can be achieved, the subsequent signal processing is required to have extremely high processing, which is difficult to achieve in practical engineering. The intermediate frequency is between the radio frequency and the baseband in the communication system, the received radio frequency signal is subjected to down-conversion, namely converted into an analog intermediate frequency signal, and the analog intermediate frequency signal is subjected to A/D conversion to form a digital intermediate frequency signal, so that the requirement of an A/D converter is reduced, the realization of a subsequent module is facilitated, and the method is widely applied to practical engineering.
In a digital intermediate frequency broadband receiver, data which is affected by devices such as an analog down-conversion local oscillator, a high-speed AD (analog-to-digital) and the like and is fed into a rear-end digital processing module for digital synchronous processing after AD sampling inevitably has a direct-current offset component, and the direct-current offset can seriously affect the performance of the receiver. Therefore, the compensation and cancellation technique of the direct current bias signal is one of key techniques of the digital intermediate frequency broadband receiver.
The traditional DC offset compensation only considers the DC offset brought by the high-speed AD chip, and the DC offset brought by the AD device is subtracted by the fixed signal after AD sampling, so that the DC offset compensation effect is achieved. In practical communication systems, except for the AD device itself, analog down-conversion, digital truncation, etc. all cause dc offset of the signal, which makes it difficult for the conventional compensation algorithm to obtain a good compensation effect.
Disclosure of Invention
The application aims to overcome the defects of the prior art and provide a direct current bias real-time compensation method, a device, equipment and a storage medium.
The aim of the application is achieved by the following technical scheme:
a method of dc offset real-time compensation for a wideband receiver, the method comprising:
calculating a direct current bias component of the input signal in real time in response to the received demodulated I/Q signal;
and compensating the input signal in real time according to the direct current bias component.
Further, the calculating, in real time, the dc offset component of the input signal in response to the received demodulated I/Q signal specifically includes:
in response to the received demodulated I/Q signal, the dc offsets of the I and Q signals are obtained by sliding window filtering the I and Q signals, respectively.
Further, the obtaining the dc offset of the I signal and the Q signal by filtering the sliding windows of the I signal and the Q signal respectively specifically includes:
in response to the received demodulated I/Q signals, the I signal and the Q signal are respectively accumulated in a certain period of time to obtain accumulated data I 1 And Q 1
In response to the demodulated I/Q signal received at the time D, the I signal and the Q signal are delayed by the time D 1 And said Q 1 Respectively accumulating in the same time period to obtain accumulated data I D And Q D
Will I 1 And I D Subtracting Q 1 And Q is equal to D Subtracting to obtain the data moving average I with the sliding window length of D 2 And Q 2
Further, the performing real-time compensation on the input signal according to the dc offset component specifically includes:
subtracting the data moving average I from the signal I 2 Obtaining a signal I after DC offset correction 0
Subtracting the data moving average Q from the signal Q 2 Obtaining a signal Q after DC offset correction 0
Further, the D moment value includes a power of 2.
On the other hand, the application also provides a direct current offset real-time compensation device, which comprises:
the direct current offset calculation module is used for responding to the received demodulated I/Q signal and calculating the direct current offset component of the input signal in real time;
and the direct current bias compensation module is used for compensating the input signal in real time according to the direct current bias component.
Optionally, the direct current bias calculation module responds to the received demodulated I/Q signal, and calculates the direct current bias component of the input signal in real time specifically includes:
in response to the received demodulated I/Q signal, the dc offsets of the I and Q signals are obtained by sliding window filtering the I and Q signals, respectively.
Optionally, the direct current bias calculation module specifically includes:
in response to the received demodulated I/Q signals, the I signal and the Q signal are respectively accumulated in a certain period of time to obtain accumulated data I 1 And Q 1
In response to the demodulated I/Q signal received at the time D, the I signal and the Q signal are delayed by the time D 1 And said Q 1 Respectively accumulating in the same time period to obtain accumulated data I D And Q D
Will I 1 And I D Subtracting Q 1 And Q is equal to D Subtracting to obtain the data moving average I with the sliding window length of D 2 And Q 2
Optionally, the direct current bias compensation module compensates the input signal in real time according to the direct current bias component specifically includes:
subtracting the data moving average I from the signal I 2 Obtaining a signal I after DC offset correction 0
Subtracting the data moving average Q from the signal Q 2 Obtaining a signal Q after DC offset correction 0
Optionally, when the dc bias calculation module obtains dc biases of the I signal and the Q signal, the value of D time includes a power of 2.
In another aspect, the present application further provides a computer device, where the computer device includes a processor and a memory, where the memory stores a computer program, and the computer program is loaded and executed by the processor to implement any one of the dc offset real-time compensation methods described above.
In another aspect, the present application further provides a computer readable storage medium, where a computer program is stored, where the computer program is loaded and executed by a processor to implement any one of the dc offset real-time compensation methods described above.
The application has the beneficial effects that:
(1) The method is different from the traditional direct current offset correction method in that the direct current offset compensation is carried out on the demodulated data in real time, the compensation effect of the method acts on the demodulated output signal of the whole communication system, the direct current offset influence caused by AD high-speed sampling can be compensated, the direct current offset influence caused by various factors such as analog down-conversion, digital truncation and the like can be compensated, and the method is suitable for application scenes needing direct current offset compensation in various broadband receivers.
(2) The application is different from the traditional direct current offset compensation method in that the fixed direct current offset component is subtracted, and the direct current offset of the input signal is estimated in real time, so that the direct current offset of the input signal is compensated in real time, and the compensation flexibility is high.
(3) The application obtains the sliding window filtering result of the input signal by utilizing the accumulation summation and the delay subtraction of the input data, and the algorithm calculation is simple and reliable, thereby being convenient for engineering realization.
Drawings
FIG. 1 is a flow chart of a method for compensating DC offset in real time according to an embodiment of the present application;
FIG. 2 is a flow chart of DC offset acquisition by sliding window filtering in accordance with an embodiment of the present application;
FIG. 3 is a schematic diagram of a method for compensating DC offset in real time according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a sliding window filter according to an embodiment of the present application;
fig. 5 is a block diagram of a dc offset compensation apparatus according to an embodiment of the present application.
Detailed Description
Other advantages and effects of the present application will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present application with reference to specific examples. The application may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present application. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict.
All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The traditional DC offset compensation only considers the DC offset brought by the high-speed AD chip, and the DC offset brought by the AD device is subtracted by the fixed signal after AD sampling, so that the DC offset compensation effect is achieved. In practical communication systems, except for the AD device itself, analog down-conversion, digital truncation, etc. all cause dc offset of the signal, which makes it difficult for the conventional compensation algorithm to obtain a good compensation effect.
In order to solve the above technical problems, the following embodiments of the present application relate to a method, an apparatus, a device and a storage medium for compensating dc offset in real time.
Example 1
The dc offset real-time compensation method provided in this embodiment is implemented by a sliding window filter, and referring to fig. 3, a schematic diagram of the dc offset real-time compensation method provided in this embodiment is shown in fig. 3.
Firstly, the demodulated data I is sent into an adder to accumulate input data, and the accumulated data I is obtained 1 The method comprises the steps of carrying out a first treatment on the surface of the And then with the accumulated data I delayed by the time D D Subtracting to obtain the data moving average I with the sliding window length of D 2 The method comprises the steps of carrying out a first treatment on the surface of the Finally subtracting the moving average I from the input data I 2 The I-path direct current offset compensated receiving signal I can be obtained 0
Similarly, the demodulated data Q is sent to an adder for inputting dataAccumulating to obtain accumulated data Q 1 The method comprises the steps of carrying out a first treatment on the surface of the And accumulated data Q delayed by time D D Subtracting to obtain the data moving average Q with the sliding window length of D 2 The method comprises the steps of carrying out a first treatment on the surface of the Finally subtracting the moving average Q from the input data Q 2 The Q paths of receiving signals Q after the DC offset compensation can be obtained 0
Referring to fig. 1, a flowchart of a dc offset real-time compensation method provided in this embodiment is shown in fig. 1. The method specifically comprises the following steps:
s100: the DC offset component of the input signal is calculated in real time in response to the received demodulated I/Q signal.
As an implementation manner, in this embodiment, in response to a received demodulated I/Q signal, a method for calculating, in real time, a dc offset component of an input signal specifically includes:
in response to the received demodulated I/Q signal, the dc offsets of the I and Q signals are obtained by sliding window filtering the I and Q signals, respectively.
Specifically, referring to fig. 2, as shown in fig. 2, a flowchart of the present embodiment for obtaining dc offsets by sliding window filtering, the obtaining dc offsets of an I signal and a Q signal by sliding window filtering of the I signal and the Q signal respectively specifically includes:
step S101: in response to the received demodulated I/Q signals, the I signal and the Q signal are respectively accumulated in a certain period of time to obtain accumulated data I 1 And Q 1
Step S102: in response to the demodulated I/Q signal received at the delay time D, the I signal and the Q signal are then processed in the same manner as I 1 And Q 1 Respectively accumulating in the same time period to obtain accumulated data I D And Q D
Step S103: will I 1 And I D Subtracting Q 1 And Q is equal to D Subtracting to obtain the data moving average I with the sliding window length of D 2 And Q 2
The demodulated I/Q data is continuous, the signal average value is calculated by accumulation for a certain time length as the signal average value is 0, if the signal average value is not 0, the direct current offset exists in the AD input data, and the calculated average value is the direct current offset.
S200: and compensating the input signal in real time according to the direct current bias component.
Specifically, the present embodiment implements dc offset compensation on an input signal by a subtractor.
The real-time compensation of the input signal according to the DC offset component specifically comprises:
subtracting the data moving average I from the signal I 2 Obtaining a signal I after DC offset correction 0
Subtracting the data moving average Q from the signal Q 2 Obtaining a signal Q after DC offset correction 0
Referring to fig. 4, fig. 4 is a schematic diagram of a sliding window filter according to the present embodiment, and the sliding window filter according to the present application uses the accumulated signal I for the signal I 1 Adding the delay one beat with the input signal at the current moment, namely achieving the effect of accumulating the input signal along with time; accumulated signal I 1 Subtracting the accumulated signal I before time D D The signal accumulation sum I of the previous D moments can be obtained 3 For convenience of hardware processing, here D is typically raised to the power of 2, i.e. d=2 N . Signal accumulation sum I for the first D instants 3 By shifting N to the right, the signal mean value I of the first D moments can be obtained 2 I.e. the signal dc offset obtained in real time.
Similarly, for signal Q, the accumulated signal Q 1 Adding the delay one beat with the input signal at the current moment, namely achieving the effect of accumulating the input signal along with time; accumulated signal Q 1 Subtracting the accumulated signal Q before the time D D The signal accumulation sum Q of the previous D moments can be obtained 3 The signal accumulation sum Q of the first D moments 3 By shifting N to the right, the signal average value Q of the first D moments can be obtained 2 I.e. the signal dc offset obtained in real time.
And subtracting the calculated direct current offset from the input signal in real time to realize direct current offset compensation of the broadband receiver.
The traditional direct current offset correction method is only suitable for correcting direct current offset brought by the AD by the test data of the AD chip, and the method provided by the embodiment is to analyze and process the AD sampling data, is different from processing the test data of the AD, and can compensate direct current offset introduced by other modules in the digital processing process.
The direct current offset real-time compensation method provided by the embodiment carries out direct current offset compensation in real time through demodulated data. The method is different from the traditional direct current offset correction method, the compensation effect of the method acts on the demodulation output signal of the whole communication system, can compensate the direct current offset influence caused by AD high-speed sampling, can also compensate the direct current offset influence caused by various factors such as analog down-conversion, digital truncation and the like, and is suitable for application scenes needing direct current offset compensation in various broadband receivers. Compared with the traditional direct current offset compensation method, the direct current offset compensation method is high in compensation flexibility by real-time estimating the direct current offset of the input signal and performing the real-time compensation of the direct current offset on the input signal by subtracting the fixed direct current offset component. And the sliding window filtering result of the input signal is obtained by utilizing the accumulation summation and the delay subtraction of the input data, so that the algorithm calculation is simple and reliable, and the engineering realization is convenient.
Example 2
Referring to fig. 5, as shown in fig. 5, the structure block diagram of the dc offset real-time compensation device provided in this embodiment specifically includes:
a dc offset calculation module 10, configured to calculate a dc offset component of an input signal in real time in response to a received demodulated I/Q signal;
the dc offset compensation module 20 is configured to compensate the input signal in real time according to the dc offset component.
As one embodiment, the dc offset calculation module 10 calculates, in real time, a dc offset component of an input signal in response to a received demodulated I/Q signal, specifically including:
in response to the received demodulated I/Q signal, the dc offsets of the I and Q signals are obtained by sliding window filtering the I and Q signals, respectively.
As one embodiment, the dc offset calculation module 10 obtains dc offsets of the I signal and the Q signal by respectively filtering the I signal and the Q signal sliding windows specifically includes:
in response to the received demodulated I/Q signals, the I signal and the Q signal are respectively accumulated in a certain period of time to obtain accumulated data I 1 And Q 1
In response to the demodulated I/Q signal received at the delay time D, the I signal and the Q signal are then processed in the same manner as I 1 And Q 1 Respectively accumulating in the same time period to obtain accumulated data I D And Q D
Will I 1 And I D Subtracting Q 1 And Q is equal to D Subtracting to obtain the data moving average I with the sliding window length of D 2 And Q 2
As one embodiment, the dc offset compensation module 20 compensates the input signal in real time according to the dc offset component specifically includes:
subtracting the data moving average I from the signal I 2 Obtaining a signal I after DC offset correction 0
Subtracting the data moving average Q from the signal Q 2 Obtaining a signal Q after DC offset correction 0
In one embodiment, the D time value includes a power of 2 when the dc offset calculation module 10 obtains the dc offsets of the I signal and the Q signal.
The direct current bias real-time compensation device provided by the embodiment carries out direct current bias compensation in real time through demodulated data. The compensation effect of the device acts on the demodulation output signal of the whole communication system, can compensate the direct current offset influence caused by AD high-speed sampling, can also compensate the direct current offset influence caused by various factors such as analog down-conversion, digital truncation and the like, and is suitable for application scenes needing direct current offset compensation in various broadband receivers.
Example 3
The preferred embodiment provides a computer device, which can implement the steps in any embodiment of the dc offset real-time compensation method provided by the embodiment of the present application, so that the beneficial effects of the dc offset real-time compensation method provided by the embodiment of the present application can be implemented, and detailed descriptions of the foregoing embodiments are omitted herein.
Example 4
Those of ordinary skill in the art will appreciate that all or a portion of the steps of the various methods of the above embodiments may be performed by instructions, or by instructions controlling associated hardware, which may be stored in a computer-readable storage medium and loaded and executed by a processor. To this end, an embodiment of the present application provides a storage medium having stored therein a plurality of instructions capable of being loaded by a processor to perform the steps of any one of the embodiments of the dc offset real-time compensation method provided by the embodiment of the present application.
Wherein the storage medium may include: read Only Memory (ROM), random access Memory (RAM, random Access Memory), magnetic or optical disk, and the like.
The instructions stored in the storage medium can execute the steps in any one of the embodiments of the dc offset real-time compensation method provided by the embodiments of the present application, so that the beneficial effects that any one of the embodiments of the dc offset real-time compensation method provided by the embodiments of the present application can be achieved, which are detailed in the previous embodiments and are not described herein.
The foregoing description of the preferred embodiments of the application is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the application.

Claims (6)

1. A method of dc offset real-time compensation for a wideband receiver, the method comprising:
calculating a direct current bias component of the input signal in real time in response to the received demodulated I/Q signal;
the calculating, in real time, the dc offset component of the input signal in response to the received demodulated I/Q signal specifically includes:
responding to the received demodulated I/Q signals, and respectively filtering the I signals and the Q signals through sliding windows to obtain direct current biases of the I signals and the Q signals;
the obtaining the direct current bias of the I signal and the Q signal through respectively filtering the sliding windows of the I signal and the Q signal specifically comprises the following steps:
in response to the received demodulated I/Q signals, the I signal and the Q signal are respectively accumulated in a certain period of time to obtain accumulated data I 1 And Q 1
In response to the demodulated I/Q signal received at the time D, the I signal and the Q signal are delayed by the time D 1 And said Q 1 Respectively accumulating in the same time period to obtain accumulated data I D And Q D
Will I 1 And I D Subtracting Q 1 And Q is equal to D Subtracting to obtain the data moving average I with the sliding window length of D 2 And Q 2
And compensating the input signal in real time according to the direct current bias component.
2. The method for compensating the dc offset in real time according to claim 1, wherein the compensating the input signal in real time according to the dc offset component specifically comprises:
subtracting the data moving average I from the signal I 2 Obtaining a signal I after DC offset correction 0
Subtracting the data moving average Q from the signal Q 2 Obtaining a signal Q after DC offset correction 0
3. The method of claim 1, wherein the D moment value comprises a power of 2.
4. A dc offset real-time compensation device, the device comprising:
the direct current offset calculation module is used for responding to the received demodulated I/Q signal and calculating the direct current offset component of the input signal in real time;
the calculating, in real time, the dc offset component of the input signal in response to the received demodulated I/Q signal specifically includes:
responding to the received demodulated I/Q signals, and respectively filtering the I signals and the Q signals through sliding windows to obtain direct current biases of the I signals and the Q signals;
the obtaining the direct current bias of the I signal and the Q signal through respectively filtering the sliding windows of the I signal and the Q signal specifically comprises the following steps:
in response to the received demodulated I/Q signals, the I signal and the Q signal are respectively accumulated in a certain period of time to obtain accumulated data I 1 And Q 1
In response to the demodulated I/Q signal received at the time D, the I signal and the Q signal are delayed by the time D 1 And said Q 1 Respectively accumulating in the same time period to obtain accumulated data I D And Q D
Will I 1 And I D Subtracting Q 1 And Q is equal to D Subtracting to obtain the data moving average I with the sliding window length of D 2 And Q 2
And the direct current bias compensation module is used for compensating the input signal in real time according to the direct current bias component.
5. A computer device comprising a processor and a memory, the memory having stored therein a computer program that is loaded and executed by the processor to implement the dc offset real time compensation method of any one of claims 1 to 3.
6. A computer readable storage medium, characterized in that the storage medium has stored therein a computer program, which is loaded and executed by a processor to implement the dc offset real time compensation method according to any one of claims 1 to 3.
CN202210419553.5A 2022-04-21 2022-04-21 DC offset real-time compensation method, device, equipment and storage medium Active CN114915524B (en)

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