CN103245814A - Combined intelligent universal meter - Google Patents

Combined intelligent universal meter Download PDF

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CN103245814A
CN103245814A CN201310195904XA CN201310195904A CN103245814A CN 103245814 A CN103245814 A CN 103245814A CN 201310195904X A CN201310195904X A CN 201310195904XA CN 201310195904 A CN201310195904 A CN 201310195904A CN 103245814 A CN103245814 A CN 103245814A
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pin
connects
resistance
diode
chip microcomputer
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张培
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Abstract

The invention discloses a combined intelligent universal meter, which mainly comprises circuits such as an analog front-end unit (1), an RLC (Radio Link Control) electric bridge front-end unit (2), a signal conditioning unit (3), an A/D (Analog/Digital) conversion unit (4), a counter front-end unit (5), a CPU (Central Processing Unit) control unit (6) and a power transformation management unit (7). A 32-bit ARM (Advanced RISC Machines) digital-analog hybrid single-chip microprocessor with powerful DSP (Digital Signal Processing) data processing capacity is used as a core component of the universal meter, and functional instruments such as an intelligent alternating current millivoltmeter, an RLC digital electric bridge and an electronic counter are completely integrated in the intelligent universal meter in combination with a well-designed precision analog circuit through program control. The basic parameters of elements such as a resistor, a capacitor and an inductor can be automatically measured, and dynamic and static signals such as alternating current and direct current signals and pulse parameters can also be comprehensively measured. The combined intelligent universal meter is a necessary tool for the electronic industry, electric industry and electric apparatus maintenance personnel.

Description

A kind of combination intelligent multimeter
Technical field
The invention belongs to measurement instrument, it is reasonable to be specifically related to a kind of circuit design, combination property is good, the measuring accuracy height, and volume is small and exquisite, with low cost, integrate the combination intelligent multimeter of dynamic and static weighing functions such as AC signal numeral true rms measurement, digital RLC bridge measurement, direct current signal precision measurement, electronic counting.
Background technology
Multimeter is common, commonly used portable electric signal measurement instrument, the digital multimeter of generally using from early stage analogy multimeter to the modern times, and increased functionality not only, and also measuring accuracy improves greatly.Being one of the most frequently used surveying instrument of electronician, is a kind of instrument of integrated multiple electrical measurement function commonly used, and common multimeter possesses voltage, electric current, resistance three big basic test projects.Now many multimeters all develop to intelligent and multifunction direction.Expanded function is the performance of modern digital multimeter multifunction.Except the fundamental measurement of traditional voltage, electric current, resistance; common expansion measurement function also has break-make measurement, diode measurement, triode measurement, electric capacity measurement, temperature survey, frequency measurement, duty ratio measuring, and maximal value keeps, simulated pointer responds demonstration, built-in anti-interference low-pass filter, PC communication interface, fault-operation protection fast.The expansion measurement function can substitute some special instrument sometimes, expands the range of application of multimeter, reaches a-table-multi-purpose, can also increase work efficiency and percent of automatization.
Yet, existing common multimeter since outstanding be one " general-purpose ", in general special-purpose thing is well-done in special direction unlikely for the thing of general-purpose, thus also can think common multimeter what all do well.This outstanding behaviours is in following several respects:
1, because measuring principle and effective value are measured the restriction of chip, no matter be analogy multimeter, digital multimeter, or high-grade intelligent digital multimeter, they are weaknesses to the measurement of AC signal, especially higher to frequency AC signal, general digital multimeter can only be measured the AC signal about 100KHz, high-grade intelligent digital multimeter also can only be measured the AC signal about 300KHz, can't reach the above level of 1MHz of ac millivoltmeter, also can't guarantee accurate measurement to faint AC signal, therefore, in the real work, often need to buy the ac millivoltmeter of specialty;
2, in the electronic device design maintenance, relate to the measurement of electronic component, particularly for the precision measurement of resistance, electric capacity and inductance, in existing digital multimeter, for the measurement of resistance on the contrary strong point, particularly high-grade intelligent digital multimeter, measured resistance value that can be high-accuracy, but existing digital multimeter all can not accurately be measured the various parameters of electric capacity and inductance basically, therefore, in the real work, often need to buy the RLC bridge measurement equipment of specialty;
3, electronic counter is the electronic measuring instrument of finishing functions such as frequency measurement, time measurement, counting, in the existing digital multimeter, some has had some measurement function in the electronic counter, as frequency, duty ratio measuring is because the restriction of measuring principle and structure, existing digital multimeter is all not competent basically to the measurement of frequency, therefore, in the real work, often need to buy the electronic counter measuring equipment of specialty.
In sum, the digital multimeter of prior art exists precision low, and measurement parameter is few, the cost height, deficiencies such as bad adaptability need have been developed a kind of combination intelligent multimeter that can overcome the prior art deficiency, to satisfy extensive and growing electronic measurement technique demand.
Summary of the invention
The object of the present invention is to provide a kind of circuit design reasonable, combination property is good, the measuring accuracy height, and volume is small and exquisite, with low cost, integrate the combination intelligent multimeter of dynamic and static weighing functions such as digital RLC bridge measurement, AC signal numeral true rms measurement, direct current signal precision measurement, electronic counting.
The object of the present invention is achieved like this, comprise analog front-end unit (1), RLC electric bridge front end unit (2), signal condition unit (3), A/D converting unit (4), counter front end unit (5), CPU control module (6) and power conversion administrative unit circuit such as (7) composition, it is characterized in that: described analog front-end unit (1) is provided with socket (CH1 – CH4), socket transfer relay (101), RC attenuator (102), range transfer relay (103), 500mA current sampling circuit (107), 10A current sampling circuit (108); Described RLC electric bridge front end unit (2) is provided with clock generator (208), timer TIM1(207), timer TIM8(209), dma controller (206), D/A converter DAC2(204), D/A converter DAC1(205), active low-pass filter (201), current/voltage transducer (202), 5:1 attenuator (203); Described signal condition unit (3) is provided with amplifier (302), multichannel input programmable amplifier PGA(301), single-pole double-throw switch (SPDT) (SPDT) (303), phase inverter (304), single-pole double-throw switch (SPDT) (SPDT) phase detector (305), active low-pass filter (306), level shift circuit (307), ADC driver (308); Described A/D converting unit (4) is provided with direct current A/D change-over circuit (401) and exchanges A/D change-over circuit ADC1(404), ADC2(403), dma controller (405), voltage reference former (409); Described counter front end unit (5) be provided with socket (CH5, CH6), frequency divider (501), broad band amplifier (502), ultrahigh-speed comparator (503), single-pole double-throw switch (SPDT) (SPDT) (505), Schmidt's reshaper (506), 4 digit counters (504); Described CPU control module (6) is provided with 32 ARM monolithic digital-to-analogues of the above encapsulation of 100 pin and mixes single-chip microcomputer (604) and software kit thereof, and LCD display (601) is touched key-press matrix (602), serial communication port (603); Described power conversion administrative unit (7) is provided with DC/DC positive supply (701), DC/DC negative supply (702), LDO power supply (703), power switch (704).
Analog front-end unit (1) circuit comprises:
Socket transfer relay (101), RC attenuator (102), range transfer relay (103), 10A current sampling circuit (108), 500mA current sampling circuit (107);
A, 3 pin of the relay (JDQ1) of socket transfer relay (101) connect socket (CH1), 8 pin of relay (JDQ1) connect socket (CH3) by protective tube, diode (DP4, DP1) forward is connected in series between 8 pin and ground of relay (JDQ1), diode (DP2, DP3) differential concatenation is connected between 8 pin and ground of relay (JDQ1), 2 pin of relay (JDQ1) connect the end of the output resistance PTC1 of sinusoidal wave circuit low-pass filter circuit (501), 4 pin of relay (JDQ1) connect RC attenuator (102), 7 pin of relay (JDQ1) connect an end of the sample resistance (RJ9) of 500mA current sampling circuit, 9 pin of relay (JDQ1) connect 2 pin reverse input ends of the amplifier (U6) of current/voltage transducer (502), (5 of relay (JDQ1), 6) pin is connected and connects power supply VCC end, 1 pin of relay (JDQ1) connects the drain D of fet (N2), 10 pin of relay (JDQ1) connect the drain D of fet (N3), the source S of fet (N2) connects the drain D of fet (N1), the source S of fet (N3) connects the drain D of fet (N1), the source S ground connection of fet (N1), the Gate utmost point G of fet (N2) connects the 65 pin PC8 end of single-chip microcomputer (U10), the Gate utmost point G of fet (N3) connects the 66 pin PC9 end of single-chip microcomputer (U10), the Gate utmost point G of fet (N1) connects the 71 pin PA12 end of single-chip microcomputer (U10), also inserts resistance (R87) between the Gate utmost point G of fet (N1) and the ground;
B, the high pressure divider resistance (RH1-RH4) of RC attenuator (102) is connected in series, its two ends parallel high voltage dividing potential drop electric capacity (CHV), one end of high pressure divider resistance (RH1) connects 4 pin of socket transfer relay (JDQ1), one end of high pressure divider resistance (RH4) connects an end of resistance (R26), the other end of resistance (R26) connects 13 pin of cmos switch (U15), 14 of cmos switch (U15), 5 pin link to each other, low pressure divider resistance (RL2) is in parallel with low pressure dividing potential drop electric capacity (CL4), 14 of one end and cmos switch (U15), 5 pin link to each other, other end ground connection, 15 of cmos switch (U15), 2 pin link to each other, low pressure divider resistance (RL3) is in parallel with low pressure dividing potential drop electric capacity (CL1), 15 of one end and cmos switch (U15), 2 pin link to each other, other end ground connection, 11 of cmos switch (U15), 4 pin link to each other, low pressure divider resistance (RL1) is in parallel with low pressure dividing potential drop electric capacity (CL3), 11 of one end and cmos switch (U15), 4 pin link to each other, other end ground connection, 12 of cmos switch (U15), the 1 pin ground connection that links to each other, insert forward and reverse light emitting diode (BL2 that is connected between output terminal 3 pin of cmos switch (U15) and the ground, BL3), control end 9 pin of cmos switch (U15) are held through the 79 pin PC11 that resistance in series (R71) is connected to single-chip microcomputer (U10), and control end 10 pin of cmos switch (U15) are connected to the 31 pin PA6 end of single-chip microcomputer (U10) through resistance in series (R79);
C, 2 pin of the relay (JDQ2) of range transfer relay (103) connect 3 pin of cmos switch (U15), 4 pin of relay (JDQ2) are through parallel resistance (RPV), electric capacity (CPV) connects 4 pin of socket transfer relay (JDQ1), the output signal of 3 pin of relay (JDQ2) inserts signal condition unit (3) circuit through resistance in series (R23), 7 pin of relay (JDQ2) connect reverse input end 2 pin of amplifier (U6) through resistance (RJ4), 9 pin of relay (JDQ2) connect reverse input end 2 pin of amplifier (U6) through resistance (RJ3), 8 pin of relay (JDQ2) connect output terminal 6 pin of amplifier (U6), (5 of relay (JDQ2), 6) pin is connected and connects power supply VCC end, 1 pin of relay (JDQ2) connects the drain D of fet (N5), 10 pin of relay (JDQ2) connect the drain D of fet (N6), the source S of fet (N5) connects the drain D of fet (N4), the source S of fet (N6) connects the drain D of fet (N4), the source S ground connection of fet (N4), the Gate utmost point G of fet (N5) connects the 65 pin PC8 end of single-chip microcomputer (U10), the Gate utmost point G of fet (N6) connects the 66 pin PC9 end of single-chip microcomputer (U10), the Gate utmost point G of fet (N4) connects the 15 pin PC0 end of single-chip microcomputer (U10), also inserts resistance (R86) between the Gate utmost point G of fet (N4) and the ground;
The sample resistance (FL) of D, 10A current sampling circuit (108) is connected between socket (CH4) and the ground connection socket (CH2);
The sample resistance (RJ9) of E, 500mA current sampling circuit (107) is connected between 7 pin of socket (CH4) and socket transfer relay (JDQ1).
RLC electric bridge front end unit (2) circuit comprises:
Clock generator (208), timer TIM1(207), timer TIM8(209), dma controller (206), D/A converter DAC2(204), D/A converter DAC1(205), active low-pass filter (201), current/voltage transducer (202), 5:1 attenuator (203);
The quartz crystal (XTH) of A, clock generator (208) is connected to 12 of single-chip microcomputer (U10), 13 pin, be connected with electric capacity (C9, C8) between 12,13 pin of single-chip microcomputer (U10) and ground, the inner phase-locked loop pll circuit of single-chip microcomputer (U10) produces system clock through programming;
B, timer TIM1(207) timer (TIM1) be the interior programmable timer of single-chip microcomputer (U10), it is input as clock generator (512) and produces system clock, the clock of programming output drives late-class circuit;
C, timer TIM8(209) timer (TIM8) be the interior programmable timer of single-chip microcomputer (U10), it is input as the clock of timer (TIM1) programming output, the clock of programming output is by the 63 pin PC6 output of single-chip microcomputer (U10);
The dma controller of D, dma controller (206) is the interior dma controller of single-chip microcomputer (U10), and it triggers the clock that clock is timer (TIM1) programming output, and its source address is the sinusoidal wave data table address, and its destination address is D/A converter DAC2(204);
E, D/A converter DAC1(205) be interior 12 the D/A converter DAC0 of single-chip microcomputer (U10), produce DC voltage through programming, by the 29 pin DAC0 output of single-chip microcomputer (U10);
F, D/A converter DAC2(204) be interior 12 the D/A converter DAC1 of single-chip microcomputer (U10), produce the sine voltage signal through dma controller (206), by the 30 pin DAC1 output of single-chip microcomputer (U10);
G, one end of the electric capacity (CC5) of active low-pass filter (201) connects the 30 pin DAC1 output of single-chip microcomputer (U10), the other end connects an end of resistance (R49), the other end of resistance (R49) connects an end of resistance (R12), reverse input end 2 pin of the other end concatenation operation amplifier (U9A) of resistance (R12), insert electric capacity (C27) between the contact of resistance (R49) and resistance (R12) and ground, resistance (R49) is connected resistance (R50) end with the contact of resistance (R12), output terminal 1 pin of resistance (R50) other end concatenation operation amplifier (U9A), reverse input end 2 pin and output terminal 1 pin of operational amplifier (U9A) are connected to electric capacity (C24), positive input 3 pin of operational amplifier (U9A) connect the 29 pin DAC0 output of single-chip microcomputer (U10) through resistance in series (R4), output terminal 1 pin of operational amplifier (U9A) connects resistance (R61) end, the other end of resistance (R61) connects an end of thermistor (PTC1), the other end of thermistor (PTC1) connects 2 pin of socket transfer relay (JDQ1), the plus earth of stabilivolt (DZ6), the negative pole of stabilivolt (DZ6) connects the negative pole of diode (DP6), the positive pole of diode (DP6) connects the contact of resistance (R61) and thermistor (PTC1), the minus earth of stabilivolt (DZ4), the positive pole of stabilivolt (DZ4) connects the positive pole of diode (DP5), and the negative pole of diode (DP5) connects the contact of resistance (R61) and thermistor (PTC1);
H, output terminal 6 pin of the operational amplifier (U6) of current/voltage transducer (202) connect 8 pin of range transfer relay (JDQ2), reverse input end 2 pin of operational amplifier (U6) connect 7 pin of range transfer relay (JDQ2) through resistance (RJ4), reverse input end 2 pin of operational amplifier (U6) connect 9 pin of range transfer relay (JDQ2) through resistance (RJ3), reverse input end 2 pin of operational amplifier (U6) connect 9 pin of socket transfer relay (JDQ1), positive input 3 ground connection of operational amplifier (U6), the negative supply termination negative voltage feeder ear VSS of operational amplifier (U6), be connected electric capacity (CC6) between the drain D of the positive supply termination fet (SI3) of operational amplifier (U6), the positive power source terminal of operational amplifier (U6) and ground;
Output terminal 6 pin of one end concatenation operation amplifier (U6) of the resistance (RJ6) of I, 5:1 attenuator (203), the other end of resistance (RJ6) connects an end of resistance (RJ5), the other end ground connection of resistance (RJ5).
Signal condition unit (3) circuit comprises:
Amplifier (302), multichannel input programmable amplifier PGA(301), single-pole double-throw switch (SPDT) (SPDT) (303), phase inverter (304), single-pole double-throw switch (SPDT) (SPDT) phase detector (305), active low-pass filter (306), level shift circuit (307), ADC driver (308);
A, 10 pin of input end in the same way of the operational amplifier (U9C) of amplifier (302) are through resistance in series (R52), thermistor (PTC2) connects 4 pin of socket transfer relay (JDQ1), resistance (R52) is connected the base stage B of triode (TZ1) with the contact of thermistor (PTC2), the emitter E of triode (TZ1) connects the emitter E of triode (TZ2), the base stage B ground connection of triode (TZ2), triode (TZ1, TZ2) collector C is unsettled, be connected resistance (RJ13) between the output terminal (8) of operational amplifier (U9C) and reverse input end 10 pin, be connected resistance (RJ12) between reverse input end 10 pin of operational amplifier (U9C) and ground;
B, 3 pin of road input programmable amplifier PGA circuit (U2) connect an end of thermistor (PTC2) more than the multichannel input programmable amplifier PGA circuit (301) through resistance in series (R34), 7 pin of multichannel input programmable amplifier PGA circuit (U2) connect the output point of 5:1 attenuator (203), 8 pin of multichannel input programmable amplifier PGA circuit (U2) are through output terminal 6 pin of resistance in series (R80) concatenation operation amplifier (U6), is connected the continuous luminotron (BL1 of both positive and negative polarity between 8 pin of multichannel input programmable amplifier PGA circuit (U2) and ground, BL2), 4 pin of multichannel input programmable amplifier PGA circuit (U2) connect 7 pin of socket transfer relay (JDQ1) through resistance in series (R47), 6 pin of multichannel input programmable amplifier PGA circuit (U2) connect 3 pin of range transfer relay (JDQ2) through resistance in series (R25), 2 pin of multichannel input programmable amplifier PGA circuit (U2) are through resistance in series (R46) ground connection, 11 pin VSS of multichannel input programmable amplifier PGA circuit (U2) connect the negative pole of stabilivolt (DZ2), the positive pole of stabilivolt (DZ2) meets negative supply VSS, be connected electric capacity (CC9) between 11 pin of multichannel input programmable amplifier PGA circuit (U2) and ground, 10 pin VREF ground connection of multichannel input programmable amplifier PGA circuit (U2), 16 pin VDD of multichannel input programmable amplifier PGA circuit (U2) connect the emitter E of triode (DTC3), the collector C of triode (DTC3) connects power supply 3V3, the base stage B of triode (DTC3) connects the drain D of field effect transistor (SI2) through resistance in series (R2A), be connected electric capacity (CC8) between 16 pin VDD of multichannel input programmable amplifier PGA circuit (U2) and ground, the 12 pin sheets choosing end CS of multichannel input programmable amplifier PGA circuit (U2) connects the collector C of triode (P4), the collector C of triode (P4) connects 11 pin VSS of multichannel input programmable amplifier PGA circuit (U2) through resistance (R90), the base stage B of triode (P4) connects the 34 pin PC5 end of single-chip microcomputer (U10) through resistance (R33), 13 pin data input pin SI of multichannel input programmable amplifier PGA circuit (U2) connect the collector C of triode (P2), the collector C of triode (P2) connects 11 pin VSS of multichannel input programmable amplifier PGA circuit (U2) through resistance (R91), the base stage B of triode (P2) connects the 66 pin PC9 end of single-chip microcomputer (U10) through resistance (R18), 15 pin input end of clock SCK of multichannel input programmable amplifier PGA circuit (U2) connect the collector C of triode (P3), the collector C of triode (P3) connects the 11 pin VSS that multichannel is imported programmable amplifier PGA circuit (U2) through resistance (R63), and the base stage B of triode (P3) connects the 65 pin PC8 end of single-chip microcomputer (U10) through resistance (R24);
Output terminal 8 pin of the 5 pin Z0 end concatenation operation amplifiers (U9C) of the single-pole double-throw switch (SPDT) (U8) of C, single-pole double-throw switch (SPDT) (SPDT) (303), the 3 pin Z1 end of single-pole double-throw switch (SPDT) (U8) connects output terminal 1 pin of multichannel input programmable amplifier PGA circuit (U2), and 9 pin C control ends of single-pole double-throw switch (SPDT) (U8) connect the 70 pin PA11 end of single-chip microcomputer (U10) through resistance in series (R54);
Reverse input end 6 pin of the operational amplifier (U9B) of D, phase inverter (304) connect the 4 pin Z output terminals of (U8) through resistance in series (R81), reverse input end 6 pin of operational amplifier (U9B) are connected feedback resistance (R82) with output terminal 7 pin, the 5 pin ground connection of input end in the same way (U9B);
The output signal of 4 pin Z output terminals of the single-pole double-throw switch (SPDT) (U8) of E, single-pole double-throw switch (SPDT) (SPDT) phase detector (305) inserts 12 pin X0 input ends of single-pole double-throw switch (SPDT) (U8) through resistance (R36), the output signal of output terminal 7 pin of operational amplifier (U9B) is through 13 pin X1 input ends of resistance (R35) access single-pole double-throw switch (SPDT) (U8), and 11 pin A control ends of single-pole double-throw switch (SPDT) (U8) connect the 63 pin PC6 end of single-chip microcomputers (U10);
D, the output signal of the 14 pin X end of the single-pole double-throw switch (SPDT) (U8) of active low-pass filter (306) is through the resistance (R15 of series connection, R17, R16) 12 pin positive inputs of access operational amplifier (U9D), insert electric capacity (C28) between resistance (R15) and resistance (R17) and the ground, insert electric capacity (C17) between resistance (R17) and resistance (R16) and the ground, insert electric capacity (C2) between 12 pin positive inputs of operational amplifier (U9D) and the ground, insert resistance (RJ11) between 13 pin reverse input ends of operational amplifier (U9D) and the 14 pin output terminals, resistance (RJ11) two ends shunt capacitances (C25) insert resistance (RJ10) between 13 pin reverse input ends of operational amplifier (U9D) and the ground;
Output terminal 14 pin of one end concatenation operation amplifier (U9D) of the resistance (RJ2) of E, level shift circuit (307), the other end of resistance (RJ2) connects an end of resistance (RJ1), and the other end of resistance (RJ1) connects 2 pin of voltage stabilizer (U11);
F, reverse input end 4 pin that exchange the operational amplifier (U18) of A/D driver (207) connect an end of resistance (RJ15), the other end of resistance (RJ15) connects 1 pin of multichannel input programmable amplifier PGA circuit (U2), reverse input end 4 pin of operational amplifier (U18) are connected resistance (RJ14) with output terminal 6 pin, positive input 3 pin of operational amplifier (U18) connect the 30 pin DAC1 end of single-chip microcomputer (U10) through resistance in series (R62), be connected electric capacity (C1) between positive input 3 pin of operational amplifier (U18) and ground, output terminal 6 pin of operational amplifier (U18) connect the 17 pin PC2 end of single-chip microcomputer (U10) through resistance in series (R60), be connected electric capacity (C12) between 17 pin PC2 of single-chip microcomputer (U10) end and ground, output terminal 6 pin of operational amplifier (U18) connect the 18 pin PC3 end of single-chip microcomputer (U10) through resistance in series (R59), be connected electric capacity (C32) between 18 pin PC3 of single-chip microcomputer (U10) end and ground, negative power end 2 pin of operational amplifier (U18) connect the negative pole of stabilivolt (DZ5), the positive pole of stabilivolt (DZ5) connects negative voltage VSS, be connected electric capacity (C4) between negative power end 2 pin of operational amplifier (U18) and ground, positive power source terminal 6 pin of operational amplifier (U18) meet positive supply 3V3, and control end 5 pin of operational amplifier (U18) connect 2 pin of voltage stabilizer (U11) through resistance in series (R3).
A/D converting unit (4) circuit comprises:
Direct current A/D converter (401) exchanges A/D converter ADC1(404), exchange A/D converter ADC2(403), dma controller (405), voltage reference former (402);
A, 5 pin of 24 A/D converters (U4) of direct current A/D converter (3), insert electric capacity (C22) between 6 pin, insert electric capacity (C20) between 4 pin of 24 A/D converters (U4) and ground, 4 pin of 24 A/D converters (U4) connect 6 pin of voltage reference (U13), 10 pin of 24 A/D converters (U4), 11 pin, the 12 pin ground connection that links to each other, 1 pin of 24 A/D converters (U4), 16 pin link to each other, 1 pin of 24 A/D converters (U4) connects output terminal 2 pin of LDO voltage stabilizer (U11), 2 pin of 24 A/D converters (U4), insert inductance (L9) between 16 pin, insert electric capacity (CC4) between 2 pin of 24 A/D converters (U4) and ground, data output end 15 pin of 24 A/D converters (U4) are connected to the 64 pin PC7 end of single-chip microcomputer (U10) through resistance in series (R54), input end of clock 1 pin of 24 A/D converters (U4) is connected to the 91 pin PB5 end of single-chip microcomputer (U10) through resistance in series (R70), 7 pin of 24 A/D converters (U4) connect level shift circuit resistance (RJ1, RJ2) contact, insert electric capacity (C3) between 7 pin of 24 A/D converters (U4) and ground, 8 pin of 24 A/D converters (U4) connect an end of resistance (RJ7), the other end of resistance (RJ7) connects output terminal 2 pin of LDO voltage stabilizer (U11), inserts resistance (RJ8) between 8 pin of 24 A/D converters (U4) and ground, electric capacity (C13);
B, interchange A/D converter ADC1(404) be interior 12 the A/D converter ADC1 of single-chip microcomputer (U10), the input end of 12 A/D converter ADC1 is the 17 pin PC12 end of single-chip microcomputer (U10), carries out the A/D data-switching through programming;
C, interchange A/D converter ADC2(403) be interior 12 the A/D converter ADC2 of single-chip microcomputer (U10), the input end of 12 A/D converter ADC2 is the 18 pin PC13 end of single-chip microcomputer (U10), carries out the A/D data-switching through programming;
D, dma controller (405) are the dma controller in the single-chip microcomputer (U10), carry out the transmission of A/D data-switching through programming;
2 pin power ends of the benchmark integrated circuit (U13) of E, voltage reference former (402) connect power supply 3V3, (1,4,7,8) pin ground connection of benchmark integrated circuit (U13), insert electric capacity (CC14) between 6 pin output terminals of benchmark integrated circuit (U13) and ground, insert resistance (R55) between 3 pin of benchmark integrated circuit (U13) and ground, 3 pin of benchmark integrated circuit (U13) connect an end of resistance (R65), and the other end of resistance (R65) connects the drain D of field effect transistor (SI2).
Counter front end unit (5) circuit comprises:
Socket (CH5, CH6), frequency divider (501), broad band amplifier (502), ultrahigh-speed comparator (503), single-pole double-throw switch (SPDT) (SPDT) (505), Schmidt's reshaper (506), 4 digit counters (504);
A, the socket (CH6) of frequency divider (501) circuit is by series capacitance (CHF4, C30) 1 pin of connection divider circuit (U12), series capacitance (CHF4, C30) be connected to resistance (R43) in the middle of and between the ground, the diode pair that both positive and negative polarity joins (DD3), 6 of divider circuit (U12), 3 pin are connected with the supply pin 2 of divider circuit (U12), insert electric capacity (C14) between the supply pin 2 of divider circuit (U12) and the ground, 5 pin ground connection of divider circuit (U12), insert electric capacity (C21) between 8 pin of divider circuit (U12) and the ground, 4 pin of divider circuit (U12) connect diode (D2) positive pole, the positive pole of diode (D2) negative pole sending and receiving light pipes (LEDF), the negative pole output signal of luminotron (LEDF) is to the next stage circuit;
B, the socket (CH5) of broad band amplifier (502) circuit passes through and the electric capacity (CHF1 of company, CHF3) end links to each other, the other end is connected with resistance (R27), and the electric capacity (CHF1 of company, CHF3) and insert resistance (R20) between resistance (R27) contact and the ground, the other end of resistance (R27) is by parallel resistance (R11), electric capacity (CHF2) connects the Gate utmost point G1 of dual gate FET (TF1), insert the diode pair (DD1) that both positive and negative polarity joins between Gate utmost point G1 and the ground, the Gate utmost point G2 of dual gate FET (TF1) connects the emitter E of triode (TF2), resistance (R9) connects drain D and the power supply of dual gate FET (TF1), resistance (R10) connects the source S and ground of dual gate FET (TF1), the base stage B of triode (TF2) connects the drain D of dual gate FET (TF1), resistance (R1) connects emitter E and the power supply of triode (TF2), be connected the inductance (LGA) and resistance (R23) of series connection between the collector C of triode (TF2) and the source S of dual gate FET (TF1), insert electric capacity (C5) between the emitter E utmost point of triode (TF2) and the ground;
C, 4 pin of the ultrahigh-speed comparator (U1) of ultrahigh-speed comparator (403) circuit connect the collector C of triode (TF2) by electric capacity (C26), electric capacity (CC13) is connected with resistance (R2), in parallel with electric capacity (C26) again, insert resistance (R40) between 4 pin of ultrahigh-speed comparator (U1) and the ground, the diode pair that both positive and negative polarity joins (DD2), 1 pin of ultrahigh-speed comparator (U1) links to each other by resistance (R41) with 3 pin, insert resistance (R42) between 3 pin of ultrahigh-speed comparator (U1) and the ground, 2 pin ground connection of ultrahigh-speed comparator (U1), 5 pin of ultrahigh-speed comparator (U1) connect the negative pole of diode (D4), the positive pole of diode (D4) connects the drain D of field effect transistor (SI4), 5 pin of ultrahigh-speed comparator (U1) connect the negative pole of diode (D6), and the positive pole of diode (D6) connects the drain D of field effect transistor (SI1);
2 pin of the cmos switch (U8) of D, single-pole double-throw switch (SPDT) (SPDT) (505) connect the output signal of 1 pin of multichannel input programmable amplifier PGA circuit (U2) through resistance in series (R19), 1 pin of cmos switch (U8) connects the output signal of the collector C of triode (TF2) through resistance in series (R58), 15 pin output signals of cmos switch (U8) are to subordinate's circuit, and 10 pin control ends of cmos switch (U8) connect 70 pin PA11 pin of single-chip microcomputer (U10) through resistance in series (R54);
E, 2 pin of the time-base integrated circuit (U3) of Schmidt's reshaper (506) circuit, 6 pin link to each other, 15 pin that connect cmos switch (U8) again by electric capacity (CC7), insert resistance (R57) between 6 pin of time-base integrated circuit (U3) and the ground, 6 pin of time-base integrated circuit (U3) are connected by resistance (R72) with 5 pin, 6 pin of time-base integrated circuit (U3) connect the common port of the diode pair (DD4) that both positive and negative polarity joins, the plus earth of diode pair (DD4), 5 pin of time-base integrated circuit (U3) connect the negative electrode of three terminal regulator (TZ4), the plus earth of three terminal regulator (TZ4), the reference utmost point of three terminal regulator (TZ4) is connected with negative electrode, resistance (R76) connects 5 pin and the 8 pin power supplies of time-base integrated circuit (U3), 4 pin of time-base integrated circuit (U3) link to each other with the 63 pin PC6 end of single-chip microcomputer (U10), resistance (R67) connects 3 pin of time-base integrated circuit (U3) and the 92 pin PB6 end of single-chip microcomputer (U10), 8 pin power ends of time-base integrated circuit (U3) connect the negative pole of diode (D7), and the positive pole of diode (D7) connects 5 pin of ultrahigh-speed comparator (U1);
F, 2 pin of the counting circuit (U16) of 4 digit counters (504) circuit connect 1 pin of ultrahigh-speed comparator (U1) through resistance in series (R66), (3 of counting circuit (U16), 4,5,6,8) pin ground connection, (9 of counting circuit (U16), 10) pin connects power supply 16 pin, 7 pin of counting circuit (U16) connect the 63 pin PC6 end of single-chip microcomputer (U10), 1 pin of counting circuit (U16) connects the 33 pin PC4 end of single-chip microcomputer (U10), 11 pin of counting circuit (U16) connect the 93 pin PB7 end of single-chip microcomputer (U10), 12 pin of counting circuit (U16) connect the 95 pin PB8 end of single-chip microcomputer (U10) through resistance in series (R53), 13 pin of counting circuit (U16) connect the 91 pin PB5 end of single-chip microcomputer (U10) through resistance in series (R51), 14 pin of counting circuit (U16) connect the 90 pin PB4 end of single-chip microcomputer (U10) through resistance in series (R53), 16 pin power ends of counting circuit (U16) connect an end of inductance (L5), the other end of inductance (L5) connects power supply 3V3, is connected electric capacity (C18) between 16 pin of counting circuit (U16) and ground.
CPU control module (6) circuit comprises:
Single-chip microcomputer (604), display (601), touch key-press matrix (602), serial communication port (603);
A, the 8 pin XIN end of the single-chip microcomputer (U10) of single-chip microcomputer (604) circuit, 9 pin XOUT terminations are gone into quartz crystal (XTL), the 8 pin XIN end of single-chip microcomputer (U10), be connected with electric capacity (C6 between 9 pin XOUT end and ground, C7), the 33 pin PC4 end of single-chip microcomputer (U10) connects the grid G of field effect transistor (N8), be connected with resistance (R84) between the 33 pin PC4 end of single-chip microcomputer (U10) and ground, be connected hummer (BEEP) between the drain D of field effect transistor (N8) and power end VCC, be connected with electric capacity (CC15 between the 22 pin power vd DA end of single-chip microcomputer (U10) and ground, CB11), be connected inductance (L1) between 22 pin power vd DA of single-chip microcomputer (U10) end and power end 3V3, (6 of single-chip microcomputer (U10), 11,19,28,50,30,75,100) be connected with electric capacity (CC16 between pin power supply vdd terminal and ground, CC1), be connected inductance (L2) between 11 pin power supply vdd terminals of single-chip microcomputer (U10) and power end 3V3, be connected electric capacity (CB9) between power end 3V3 and ground, 67 pin PA8 of single-chip microcomputer (U10) end is connected with the 64 pin PC7 end of single-chip microcomputer (U10), 14 pin preset NRST of single-chip microcomputer (U10) hold with ground between be connected electric capacity (C15);
The be linked in sequence pen section input port (S17-S32) of LCDs (LCD) of the be linked in sequence pen section input port (S1-S16) of LCDs (LCD) of 16 delivery outlets of PD mouth (PD0-PD15) of the single-chip microcomputer (U10) of B, single-chip microcomputer (604) circuit, 16 delivery outlets of the PE mouth of single-chip microcomputer (U10) (PE0-PE15);
Resistance (R38) is connected with resistance (R39), intermediate node connects the COM3 input port of LCDs (LCD), resistance (R38) other end connects 35 pin PB0 delivery outlets of single-chip microcomputer (U10), and resistance (R39) other end connects 47 pin PB10 delivery outlets of single-chip microcomputer (U10);
Resistance (R30) is connected with resistance (R29), intermediate node connects the COM2 input port of LCDs (LCD), resistance (R30) other end connects 36 pin PB1 delivery outlets of single-chip microcomputer (U10), and resistance (R29) other end connects 48 pin PB11 delivery outlets of single-chip microcomputer (U10);
Resistance (R32) is connected with resistance (R31), intermediate node connects the COM1 input port of LCDs (LCD), resistance (R32) other end connects 37 pin PB2 delivery outlets of single-chip microcomputer (U10), and resistance (R31) other end connects 51 pin PB12 delivery outlets of single-chip microcomputer (U10);
Resistance (R13) is connected with resistance (R14), intermediate node connects the COM0 input port of LCDs (LCD), resistance (R13) other end connects 89 pin PB3 delivery outlets of single-chip microcomputer (U10), and resistance (R14) other end connects 96 pin PB9 delivery outlets of single-chip microcomputer (U10);
C, an end that touches button (K1, K0, K3, K2, K4, K5, K25, K26) that touches key-press matrix (302) are connected in parallel, and connect an end of resistance (R21), and the other end of resistance (R21) connects the power end 3V3 of single-chip microcomputer (U10).
The other end that touches button (K1) connects the positive pole of diode (M18), and the negative pole of diode (M18) connects 26 pin PA3 input ports of single-chip microcomputer (U10).
The other end that touches button (K0) connects the positive pole of diode (M17), and the negative pole of diode (M17) connects 23 pin PA0 input ports of single-chip microcomputer (U10).
The other end that touches button (K3) connects the positive pole of diode (M19), and the negative pole of diode (M19) connects 24 pin PA1 input ports of single-chip microcomputer (U10).
The other end that touches button (K2) connects the positive pole of diode (M16), and the negative pole of diode (M18) connects 25 pin PA2 input ports of single-chip microcomputer (U10).
The other end that touches button (K4) connects the positive pole of diode (M20), and the negative pole of diode (M20) connects 25 pin PA2 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M20) of diode (M22), the negative pole of diode (M22) connects 24 pin PA1 input ports of single-chip microcomputer (U10).
The other end that touches button (K5) connects the positive pole of diode (M21), and the negative pole of diode (M21) connects 26 pin PA3 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M21) of diode (M15), the negative pole of diode (M15) connects 25 pin PA2 input ports of single-chip microcomputer (U10).
The other end that touches button (K25) connects the positive pole of diode (M14), and the negative pole of diode (M14) connects 24 pin PA1 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M14) of diode (M12), the negative pole of diode (M12) connects 26 pin PA3 input ports of single-chip microcomputer (U10).
The other end that touches button (K26) connects the positive pole of diode (M7), and the negative pole of diode (M7) connects 23 pin PA0 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M7) of diode (M9), the negative pole of diode (M9) connects 26 pin PA3 input ports of single-chip microcomputer (U10).
An end that touches button (K13, K11, K14, K12, K17, K15) is connected in parallel, and connects 23 pin PA0 input ports of single-chip microcomputer (U10).
The other end that touches button (K13) connects the positive pole of diode (M18), and the negative pole of diode (M18) connects 26 pin PA3 input ports of single-chip microcomputer (U10).
The other end that touches button (K11) connects the positive pole of diode (M19), and the negative pole of diode (M19) connects 24 pin PA1 input ports of single-chip microcomputer (U10).
The other end that touches button (K14) connects the positive pole of diode (M16), and the negative pole of diode (M16) connects 25 pin PA2 input ports of single-chip microcomputer (U10).
The other end that touches button (K12) connects the positive pole of diode (M20), and the negative pole of diode (M20) connects 25 pin PA2 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M20) of diode (M22), the negative pole of diode (M22) connects 24 pin PA1 input ports of single-chip microcomputer (U10).
The other end that touches button (K17) connects the positive pole of diode (M21), and the negative pole of diode (M21) connects 26 pin PA3 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M21) of diode (M15), the negative pole of diode (M15) connects 25 pin PA2 input ports of single-chip microcomputer (U10).
The other end that touches button (K15) connects the positive pole of diode (M14), and the negative pole of diode (M14) connects 24 pin PA1 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M14) of diode (M12), the negative pole of diode (M12) connects 26 pin PA3 input ports of single-chip microcomputer (U10).
An end that touches button (K19, K18, K24, K20, K16) is connected in parallel, and connects 24 pin PA1 input ports of single-chip microcomputer (U10).
The other end that touches button (K19) connects the positive pole of diode (M18), and the negative pole of diode (M18) connects 26 pin PA3 input ports of single-chip microcomputer (U10).
The other end that touches button (K18) connects the positive pole of diode (M17), and the negative pole of diode (M17) connects 23 pin PA0 input ports of single-chip microcomputer (U10).
The other end that touches button (K24) connects the positive pole of diode (M16), and the negative pole of diode (M16) connects 25 pin PA2 input ports of single-chip microcomputer (U10).
The other end that touches button (K20) connects the positive pole of diode (M21), and the negative pole of diode (M21) connects 26 pin PA3 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M21) of diode (M15), the negative pole of diode (M15) connects 25 pin PA2 input ports of single-chip microcomputer (U10).
The other end that touches button (K16) connects the positive pole of diode (M7), and the negative pole of diode (M7) connects 23 pin PA0 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M7) of diode (M9), the negative pole of diode (M9) connects 26 pin PA3 input ports of single-chip microcomputer (U10).
An end that touches button (K7, K6, K8, K9, K10) is connected in parallel, and connects 25 pin PA2 input ports of single-chip microcomputer (U10).
The other end that touches button (K7) connects the positive pole of diode (M18), and the negative pole of diode (M18) connects 26 pin PA3 input ports of single-chip microcomputer (U10).
The other end that touches button (K6) connects the positive pole of diode (M17), and the negative pole of diode (M17) connects 23 pin PA0 input ports of single-chip microcomputer (U10).
The other end that touches button (K8) connects the positive pole of diode (M19), and the negative pole of diode (M19) connects 24 pin PA1 input ports of single-chip microcomputer (U10).
The other end that touches button (K9) connects the positive pole of diode (M14), and the negative pole of diode (M14) connects 24 pin PA1 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M14) of diode (M12), the negative pole of diode (M12) connects 26 pin PA3 input ports of single-chip microcomputer (U10).
The other end that touches button (K10) connects the positive pole of diode (M7), and the negative pole of diode (M7) connects 23 pin PA0 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M7) of diode (M9), the negative pole of diode (M9) connects 26 pin PA3 input ports of single-chip microcomputer (U10).
An end that touches button (K27, K21, K23, K22) is connected in parallel, and connects 26 pin PA3 input ports of single-chip microcomputer (U10);
The other end that touches button (K27) connects the positive pole of diode (M17), and the negative pole of diode (M17) connects 23 pin PA0 input ports of single-chip microcomputer (U10).
The other end that touches button (K21) connects the positive pole of diode (M19), and the negative pole of diode (M19) connects 24 pin PA1 input ports of single-chip microcomputer (U10).
The other end that touches button (K23) connects the positive pole of diode (M16), and the negative pole of diode (M16) connects 25 pin PA2 input ports of single-chip microcomputer (U10).
The other end that touches button (K22) connects the positive pole of diode (M20), and the negative pole of diode (M20) connects 25 pin PA2 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M20) of diode (M22), the negative pole of diode (M22) connects 24 pin PA1 input ports of single-chip microcomputer (U10);
One end of 3 pin connecting resistances (R7) of the socket (CZ232) of D, serial communication port (603), the other end of resistance (R7) connects the positive pole of optocoupler (RXD) luminotron, 2 pin signal grounds of the negative pole combination hub (CZ232) of optocoupler (RXD) luminotron, the collector of optocoupler (RXD) triode connects the 69 pin PA10 end of single-chip microcomputer (U10), one end of resistance (R69) connects the 69 pin PA10 end of single-chip microcomputer (U10), the other end of resistance (R69) connects power end 3V3, the grounded emitter of optocoupler (RXD) triode.
The negative pole of optocoupler (TXD) luminotron connects the 68 pin PA9 end of single-chip microcomputer (U10), and the positive pole of optocoupler (TXD) luminotron connects an end of resistance (R5), and the other end of resistance (R5) connects feeder ear 3V3; The negative pole of luminotron (LED) connects the 68 pin PA9 end of single-chip microcomputer (U10), and the positive pole of luminotron (LED) connects an end of resistance (R70), and the other end of resistance (R70) connects feeder ear 3V3.
1 pin of the emitter gang socket (CZ232) of optocoupler (TXD) triode, the emitter of optocoupler (TXD) triode connects an end of resistance (R6), the other end of resistance (R6) connects 1 pin output terminal of charge pump integrated circuit (U17), and the collector of optocoupler (TXD) triode connects 2 pin feeder ears of charge pump integrated circuit (U17).
2 pin signal grounds of 4 pin gang sockets (CZ232) of charge pump integrated circuit (U17), 3 pin of charge pump integrated circuit (U17) connect an end of electric capacity (CC11), 5 pin of charge pump integrated circuit (U17) connect the other end of electric capacity (CC11), 2 pin of charge pump integrated circuit (U17) connect an end of electric capacity (CC12), 2 pin signal grounds of the other end gang socket (CZ232) of electric capacity (CC12), 1 pin of charge pump integrated circuit (U17) connects an end of electric capacity (CB6), 2 pin signal grounds of the other end gang socket (CZ232) of electric capacity (CB6), the positive pole of stabilivolt (DZ1) connects 1 pin of charge pump integrated circuit (U17), 2 pin signal grounds of the negative pole gang socket (CZ232) of stabilivolt (DZ1), the positive pole of diode (D1) connects 1 pin of charge pump integrated circuit (U17), 3 pin of the negative pole gang socket (CZ232) of diode (D1).
Power conversion administrative unit (7) circuit comprises:
DC/DC positive supply (701), DC/DC negative supply (702), LDO power supply (703), power switch (704);
A, 5 pin of the Switching Power Supply integrated circuit (U5) of DC/DC positive supply (701) meet the anodal VDD of battery, insert electric capacity (CB6) between VDD and ground, 2 pin ground connection of integrated circuit (U5), insert inductance (LPP) between 5 pin of integrated circuit (U5) and 1 pin, the positive pole of diode (DP) connects 1 pin of integrated circuit (U5), the negative pole of diode (DP) connects an end of inductance (L4), the other end of inductance (L4) connects an end of inductance (L6), the other end of inductance (L6) connects feeder ear VCC, feeder ear VCC and the indirect electric capacity (CB4) in ground, the negative pole of diode (DP) and the indirect electric capacity (CB5) in ground, insert electric capacity (CB1) between the contact of inductance (L4) and inductance (L6) and ground, insert electric capacity (C23) between 3 pin of the contact of inductance (L4) and inductance (L6) and integrated circuit (U5), insert electric ancestral (R8) between 3 pin of the contact of inductance (L4) and inductance (L6) and integrated circuit (U5), 3 pin of integrated circuit (U5) connect electric ancestral's (R28) a end, electricity ancestral's (R28) the other end connects the drain D of field effect transistor (N9), the source S ground connection of field effect transistor (N9), the Gate utmost point G of field effect transistor (N9) connects 4 pin of integrated circuit (U5), 3 pin of integrated circuit (U5) connect electric ancestral's (R44) a end, electricity ancestral's (R44) the other end connects the drain D of field effect transistor (N10), the source S ground connection of field effect transistor (N10), the Gate utmost point G of field effect transistor (N10) connects the drain D of the field effect transistor (SI3) of power switch (704);
B, 5 pin of the Switching Power Supply integrated circuit (U7) of DC/DC negative supply (702) meet the anodal VDD of battery, 2 pin ground connection of integrated circuit (U7), insert inductance (LPN) between 5 pin of integrated circuit (U7) and 1 pin, 1 pin of integrated circuit (U7) connects an end of electric capacity (CC10), the other end of electric capacity (CC10) connects the positive pole of diode (DN), the minus earth of diode (DN), the positive pole of diode (DN) connects an end of inductance (L8), the other end of inductance (L8) connects an end of inductance (L7), the other end of inductance (L7) connects feeder ear VSS, VSS and the indirect electric capacity (CB10) in ground, insert electric capacity (CB7) between the contact of inductance (L8) and inductance (L7) and ground, inductance (L8) is connected with the anode of integrated circuit (TZ3) with the contact of inductance (L7), inductance (L8) is connected with an end of resistance (R22) with the contact of inductance (L7), the other end of resistance (R22) connects the reference edge of integrated circuit (TZ3), insert resistance (R37) between the reference edge of integrated circuit (TZ3) and ground, the negative electrode of integrated circuit (TZ3) connects an end of resistance (R78), the other end of resistance (R78) connects the anodal VDD of battery, the base stage B of triode (P1) connects the negative electrode of integrated circuit (TZ3), the collector C of triode (P1) connects the anodal VDD of battery, the emitter E of triode (P1) connects 3 pin of integrated circuit (U7), insert resistance (R77) between 3 pin of integrated circuit (U7) and ground, 4 pin of integrated circuit (U7) connect electric ancestral's (R68) a end, 3 pin of another termination voltage stabilizer (U11) of electric ancestral (R68);
3 pin of the LDO integrated circuit (U14) of C, LDO power supply (703) meet the anodal VDD of battery, 1 pin ground connection of LDO integrated circuit (U14), 2 pin of LDO integrated circuit (U14) meet feeder ear 3V3, feeder ear 3V3 and the indirect electric capacity (CC3) in ground, 3 pin of LDO integrated circuit (U11) connect the negative pole of diode (D9), insert electric capacity (CC2) between 3 pin of LDO integrated circuit (U11) and ground, 1 pin ground connection of LDO integrated circuit (U11), 2 pin of LDO integrated circuit (U11) meet feeder ear 5V, 5V and the indirect electric capacity (CC17) in ground;
D, the grid G of the field effect transistor (DTC2) of power switch (704) connects the 80 pin PC12 end of single-chip microcomputer (U10), the source S of field effect transistor (DTC2) connects the 7 pin PC13 end of single-chip microcomputer (U10), the drain D of field effect transistor (DTC2) connects the grid G of field effect transistor (SI3), insert resistance (R73) between the drain D of field effect transistor (DTC2) and feeder ear VCC, the source S of field effect transistor (SI3) connects feeder ear VCC, power end 7 pin of the drain D concatenation operation amplifier (U6) of field effect transistor (SI3), the grid G of field effect transistor (DTC1) connects the 7 pin PC13 end of single-chip microcomputer (U10), the source S of field effect transistor (DTC1) connects the 80 pin PC12 end of single-chip microcomputer (U10), the drain D of field effect transistor (DTC1) connects the grid G of field effect transistor (SI2), insert resistance (R45) between the drain D of field effect transistor (DTC1) and feeder ear VCC, the source S of field effect transistor (SI2) connects feeder ear VCC, power end 4 pin of the drain D concatenation operation amplifier (U9) of field effect transistor (SI2), the grid G of field effect transistor (DTC6) connects the 32 pin PA7 end of single-chip microcomputer (U10), the source S ground connection of field effect transistor (DTC6), the drain D of field effect transistor (DTC6) connects the grid G of field effect transistor (SI1), insert resistance (R75) between the drain D of field effect transistor (DTC6) and feeder ear VCC, the source S of field effect transistor (SI1) connects feeder ear VCC, the drain D of field effect transistor (SI1) connects the positive pole of diode (D3), the grid G of field effect transistor (DTC5) connects the 80 pin PC12 end of single-chip microcomputer (U10), the source S ground connection of field effect transistor (DTC5), the grid G of field effect transistor (DTC4) connects the 7 pin PC13 end of single-chip microcomputer (U10), the source S of field effect transistor (DTC4) connects the drain D of field effect transistor (DTC5), the drain D of field effect transistor (DTC4) connects the grid G of field effect transistor (SI4), insert resistance (R74) between the drain D of field effect transistor (DTC4) and feeder ear VCC, the source S of field effect transistor (SI4) connects feeder ear VCC, the drain D of field effect transistor (SI4) connects the positive pole of diode (D4), the negative pole of diode (D4) connects 5 pin power ends of ultrahigh-speed comparator (U1), the negative pole of diode (D3) connects 2 pin power ends of divider circuit (U12), the positive pole of diode (D8) connects the drain D of field effect transistor (SI3), the negative pole of diode (D8) connects the drain D of field effect transistor (SI2), the positive pole of diode (D9) connects the drain D of field effect transistor (SI3), the negative pole of diode (D9) connects 3 pin of LDO integrated circuit (U11), the positive pole of diode (D5) connects the drain D of field effect transistor (SI2), and the negative pole of diode (D5) connects 16 pin power ends of single-pole double-throw switch (SPDT) (U8).
Because the present invention adopted new circuit structure design, both improved the measuring accuracy of multimeter, strengthened functionally, reduce production costs again.Basic static parameter that not only can the Fundamentals of Measurement element again can high-precision measurement AC and DC and the dynamic parameter of signal such as pulse, makes multimeter reach general-purpose truly.
Description of drawings
Fig. 1 is frame principle figure of the present invention.
Fig. 2 is the electrical schematic diagram of analog front-end unit of the present invention (1)-RLC electric bridge front end unit (2)-signal condition unit (3)-A/D converting unit (4).
Fig. 3 is the electrical schematic diagram of counter front end unit of the present invention (5)-CPU control module (6).
Embodiment
Below in conjunction with accompanying drawing structure of the present invention, principle of work and the course of work are further described, but never in any form the present invention are limited, any change or improvement based on the present invention does all belong to protection scope of the present invention.
As shown in Figure 1, the present invention's combination intelligent multimeter mainly comprises analog front-end unit (1), RLC electric bridge front end unit (2), signal condition unit (3), A/D converting unit (4), counter front end unit (5), CPU control module (6) and power conversion administrative unit circuit such as (7) composition.
As an example, analog front-end unit of the present invention (1) is provided with socket (CH1 – CH4), socket transfer relay (101), RC attenuator (102), range transfer relay (103), 500mA current sampling circuit (107), 10A current sampling circuit (108).
RLC bridge measurement unit (2) is provided with clock generator (208), timer TIM1(207), timer TIM8(209), dma controller (206), D/A converter DAC2(204), D/A converter DAC1(205), active low-pass filter (201), current/voltage transducer (202), 5:1 attenuator (203).
Signal condition unit (3) is provided with amplifier (302), multichannel input programmable amplifier PGA(301), single-pole double-throw switch (SPDT) (SPDT) (303), phase inverter (304), single-pole double-throw switch (SPDT) (SPDT) phase detector (305), active low-pass filter (306), level shift circuit (307), ADC driver (308).
A/D converting unit (4) is provided with direct current A/D change-over circuit (401) and exchanges A/D change-over circuit ADC1(404), ADC2(403), dma controller (405).
Counter front end unit (5) be provided with socket (CH5, CH6), frequency divider (501), broad band amplifier (502), ultrahigh-speed comparator (503), single-pole double-throw switch (SPDT) (SPDT) (505), Schmidt's reshaper (506), 4 digit counters (504).
CPU control module (6) is provided with 32 ARM monolithic digital-to-analogues of the above encapsulation of 100 pin and mixes single-chip microcomputer (604) and software kit thereof, and LCD display (601) is touched key-press matrix (602), serial communication port (603).
Power conversion administrative unit (7) is provided with DC/DC positive supply (701), DC/DC negative supply (702), LDO power supply (703), power switch (704).
The effect of analog front-end unit (1) is the sampling of carrying out AC and DC voltage, current signal;
Because voltage signal is up to 1000V, frequency range is 0-1MHz, therefore voltage attenuator adopts the composite attenuation device, voltage signal to 0-500mv, directly switched by relay, to the voltage signal of 5-1000v, the RC broadband attenuation device decay of adopting the CMOS electronic switch to form, switched entering signal conditioning unit (3) processing of circuit again by relay.
The AC and DC voltage signal of test pencil socket CH1 input is entered by 3 pin of socket transfer relay JDQ1, switch through socket transfer relay JDQ1,4 pin output by socket transfer relay JDQ1, be divided into two-way at this voltage signal: one tunnel 4 pin through protective resistance RPV access range transfer relay JDQ2, capacitor C PV is speed-up capacitor, guarantees that high-frequency signal passes through; Another road enters by resistance R H1-RH4, RJL2, RJL3, RJL1, the RC broadband voltage divider dividing potential drop that capacitor C HV, CL4, CL1, CL3, CMOS electronic switch U15 form, signal is by the 3 pin output of CMOS electronic switch U15, enter 2 pin of range transfer relay JDQ2, both positive and negative polarity is connected between 2 pin of JDQ2 and ground luminotron BL3, BL4 carry out overvoltage protection; 3 pin output signal entering signals conditioning unit (3) processing of circuit of range transfer relay JDQ2.
Concrete processing to the big or small voltage signal of difference is as follows:
To 50 500mV voltage, entered by 4 pin of JDQ2;
To 5V voltage, the 20:1 broadband attenuation device decay by resistance R H1-RH4, CHV, R26, RL1, CL3 form from the 3 pin Y end output of U15, then enters 2 pin of JDQ2, by the 3 pin output of JDQ2;
To 50V voltage, the 100:1 broadband attenuation device decay by resistance R H1-RH4, CHV, R26, RL3, CL1 form from the 3 pin Y end output of CMOS electronic switch U15, then enters 2 pin of JDQ2, by the 3 pin output of JDQ2;
To 500 1000V voltage, the 2000:1 broadband attenuation device of being made up of resistance R H1-RH4, CHV, R26, RL2, CL4 decay from the 3 pin Y end output of CMOS electronic switch U15, then enters 2 pin of JDQ2, by the 3 pin output of JDQ2.
AC and DC electric current front end signal modulate circuit: 500mA test pencil socket CH3, replaceable fuse tube F1, diode DP1-DP4, socket transfer relay JDQ1, current sampling resistor RJ9 form 500mA current gear sample circuit, and 10A test pencil socket CH4, current sampling resistor FL10 form the big current gear sample circuit of 10A.
Socket transfer relay JDQ1, range transfer relay JDQ2, the action of CMOS electronic switch U15 all by the mouth line traffic control of single-chip microcomputer U10, under the control of software, is selected suitable gear.
The AC and DC voltage and current measurement uses the following circuit unit of signal condition unit (3): multichannel input programmable amplifier PGA(301), single-pole double-throw switch (SPDT) SPDT(303), single-pole double-throw switch (SPDT) SPDT phase detector (305), active low-pass filter (306), level shift circuit (307), ADC driver (308).
Multichannel input programmable amplifier PGA circuit: through the rough handling of AC and DC voltage, electric current front end signal front-end circuit, high and low voltage signal, large and small current signal has converted the small voltage signal to, because the signal source is different, signal magnitude does not wait, before entering A/D converter, need signal is amplified to best dynamic range, to obtain the highest measuring accuracy, the effect of Here it is programmable amplifier PGA circuit, simultaneously, signal is carried out the impedance conversion, to adapt to the input circuit requirement of A/D converter.This programmable amplifier PGA circuit is made up of integrated circuit U2, model is the MCP6S28 of little core company, combined-voltage signal by the output of 3 pin of range transfer relay JDQ2 enters PGA circuit U 2(MCP6S28 through resistance R 25) 6 pin, the ac and dc current signal of the 7 pin output of socket transfer relay JDQ1 enters PGA circuit U 2(MCP6S28 through resistance R 47) 4 pin.
Zero point circuit: combination intelligent multimeter of the present invention is eliminated the zero-error of instrument by soft, combination of hardware.In the front end modulate circuit of signal, inevitably produce various offset voltages, also produce various noises simultaneously; In A/D converter, also there are offset voltage, noise.Need to eliminate these offset voltages, noise, to improve the measuring accuracy of instrument.The present invention is in measuring process, regularly input end is passed through CMOS electronic switch ground connection, measure offset voltage, the NF of whole signal link, insert measuring-signal by the CMOS electronic switch then, the data that record deduct offset voltage, noise, just can obtain correct measurement result.Be specially PGA circuit U 2(MCP6S28) 2 pin through resistance R 46 ground connection, be the automatic zero set (AZS) shelves.
U2 integrated circuit MCP6S28 is multichannel input programmable amplifier PGA circuit, by the SPI interface, can from 8 road signals, select one road signal to send into the PGA circuit and amplify processing, the PGA circuit can carry out the processing of 8 grades of gains to signal, 1,2,4,5,8,10,16,32 times be can be and processing, the wide 0-1MHz that reaches of the frequency of operation of this MCP6S28, input impedance height amplified, noise is low, is the maincenter of mimic channel of the present invention.Its operating voltage is positive 3V3, negative 3V, be connected with single-chip microcomputer U10 by SPI, resistance R 24, R63, R18, R91, R33, R90, triode P3, P2, P4 form level shift circuit, and the control signal of the CMOS level that single-chip microcomputer U10 is sent converts the positive and negative level signal that MCP6S28 can accept to.
The combined-voltage signal of PGA circuit U 2(MCP6S28) 1 pin output is divided into four the tunnel: the one tunnel and sends into CMOS electronic switch U8(ISL84053 through resistance in series R19) 2 pin Y0 end, again through selecting from U8(ISL84053) the output of 15 pin, enter frequency measurement circuit; Two the tunnel send into the 16 pin PC1 end of single-chip microcomputer U10 through resistance in series R48, as break-make retaining test signal; Three the tunnel enter CMOS electronic switch U8(ISL84053) 3 pin Z1 end, through selecting from U8(ISL84053) the output of 4 pin Z end, enter CMOS electronic switch U8(ISL84053 through resistance R 36) 12 pin X0 end, through selecting from U8(ISL84053) the output of 14 pin X end, the four tunnel send into the ADC driver through resistance R J15.
Active low-pass filter: the direct current signal of 14 pin X end output CMOS electronic switch U8(ISL84053), enter active low-pass filter filtering, the amplification be made up of resistance R 15, R17, R18, RJ10, RJ11, capacitor C 28, C17, C2, C25, operational amplifier U9D, the normal voltage signal of output is sent into direct current A/D change-over circuit and is handled.
Direct current A/D change-over circuit: the high precision that the core parts U4 of A/D converter circuit has adopted the design of the easy Deco skill of core (Shenzhen) company limited to produce, 24 sigma-delta A/D converters of low noise SDI0819.The A/D converter work clock adopts internal clocking, 15 pin data line SDO of A/D converter circuit U 4 connect the 64 pin PC7 mouths of single-chip microcomputer U10 through resistance in series R85,14 pin clock line SCK connect the 91 pin PB5 mouths of single-chip microcomputer U10 through resistance in series R83,16 pin connect high level and are set to 20 A/D conversions of per second, 5, insert capacitor C 22 between 6 pin, form RC wave filter filtering clutter with the resistance of inside; 8 pin negative sense differential input ends of A/D converter circuit U 4 insert the datum by RJ7, RJ8, C13 dividing potential drop, 7 pin forward differential input ends connect the level shift circuit of being made up of RJ1, RJ2, C3, by U13(LM4140A) form reference voltage source, insert 4 pin reference voltage input terminals of A/D converter circuit U 4.In A/D converter circuit U 4, the DC simulation voltage signal has been converted into digital signal.
Digital sample effective value converter circuit: different with most of multimeters, the present invention adopts digital sample effective value converter Measuring Alternating Current Signal.Its principle is that input signal carries out level amplification, level shift, anti-aliasing filter by adjusting circuit, and the output of generation directly is added to the high-speed a/d analog to digital converter.A/D converter is made digitized processing with high sampling rate to input signal, calculates the effective value of this digitized wave forms then.Digital sample effective value converter surpasses analog converter in many aspects.It can not only faster measurement AC signal, better measures spike train and other low duty ratio signal, and the precision height, bandwidth.Because 12 A/D converters of high speed SAR type of 32 ARMCortex-M3/M4 digital-to-analogues of hardware using of the present invention hybrid computer U10 inside; software adopts 32 ARMCortex-M3/M4 digital-to-analogues with powerful DSP data-handling capacity to mix single-chip microcomputer and calculates effective value in good time; simplified the complicacy of system greatly; can effectively reduce cost, reduce power consumption.
Digital sample effective value converter circuit is made up of 4 parts: ADC driver, 12 A/D converters of the high speed SAR type of single-chip microcomputer U10 inside, dma controller, software effective value engine;
The combined-voltage signal of 1 pin output ADC driver: from programmable amplifier PGA circuit U 2(MCP6S28) enters the sign-changing amplifier of being made up of resistance R J14, RJ15, R62, capacitor C 1, operational amplifier U18; This amplifier is as the driving circuit of 12 A/D converters of high speed SAR type, and its effect has three:
The one, the high-frequency ac voltage of PGA output is amplified to the trend of work scope of 12 A/D converters of high speed SAR type, can reduce the bandwidth requirement of PGA like this.
The 2nd, level shift converts the bipolarity AC signal to the unipolarity ac voltage signal.
The 3rd, drive the ADC converter, 12 A/D converters of single-chip microcomputer U10 inner high speed SAR type, equivalence is a dynamic capacity load.Because slewing rate is up to 5MHz, the AC signal bandwidth reaches 1MHz, for guaranteeing the precision of 2 A/D converters of high speed SAR Class1, needs the high-speed a/d driver.
The high-frequency ac voltage signal of operational amplifier U18 output, be divided into two-way: the one tunnel sends into the 17 pin PC2 end of single-chip microcomputer U10 through resistance in series R60, signal input part for 12 A/D converter ADC1 of single-chip microcomputer U10 inner high speed SAR type, two the tunnel send into the 18 pin PC3 end of single-chip microcomputer U10 through resistance in series R59, be the signal input part of 12 A/D converter ADC2 of single-chip microcomputer U10 inner high speed SAR type, capacitor C 32, C12 are storage capacitor; Under software control, single-chip microcomputer U10 inner high speed SAR type 12 A/D converter ADC1, ADC2 work simultaneously, convert the high-frequency ac voltage signal to digital signal, owing to use two ADC converter synchronous workings, improved the precision of 12 A/D converters of high speed SAR type.
Software effective value engine: the high-frequency ac voltage signal has converted digital signal in 12 A/D converters of high speed SAR type, effect by dma controller, data are sent among the internal memory RAM, these data have just obtained the waveform of high-frequency ac voltage signal, must be through resolving the information that just can obtain being correlated with, the work of Here it is software effective value engine.The slewing rate of 12 A/D converters of SAR type of the present invention reaches 5MHz, software effective value engine can be exported data 2 times/second, the maximum, the minimum value that comprise Wave data, the DC voltage bias voltage in the signal, the AC value in the signal, the direct current+AC value in the signal.
As an example, RLC electric bridge front end unit of the present invention (2) is provided with clock generator (208), timer TIM1(207), timer TIM8(209), dma controller (206), D/A converter DAC2(204), D/A converter DAC1(205), active low-pass filter (201), current/voltage transducer (202), 5:1 attenuator (203).
Signal condition unit (3) is provided with amplifier (302), multichannel input programmable amplifier PGA(301), single-pole double-throw switch (SPDT) (SPDT) (303), phase inverter (304), single-pole double-throw switch (SPDT) (SPDT) phase detector (305), level shift circuit (307).
The RLC bridge measurement is based on free coordinate axis plural number V-I measuring principle, namely add sine wave signal in detected element, under the control of computing machine, utilize the rectangular axes principle, measure the complex values of the voltage and current at detected element two ends respectively, calculate equivalent reactance and the resistance value of series connection or equivalent electrical circuit in parallel then by computing machine, again according to the plural phase relation of ratio and the voltage and current of reactance and resistance, judging this element is resistance, electric capacity or inductance calculate other parameters of element then.Formula: Zs=Vu/I=-Rs*Vu/Vs has expressed the relation between the parameter.As long as measure complex voltage Vu and Vs, and Rs is known, both can try to achieve parameter to be measured.In addition, measure their projections on two coordinate axis in the orthogonal coordinate system of any phase angle and realize measurement to vectorial voltage differing with vector voltage.Phase demodulation control of the present invention also is not limited to the prima facies angle, but has adopted free coordinate axis principle to realize.After recording the real part voltage of detected element, the phase demodulation control signal is moved back 90 ° when measuring imaginary part voltage.Under the control of computing machine, utilize phase discriminator and A/D converter, measure Vu and Vs respectively.
Sine wave signal produces circuit: the present invention can use the sine wave signal of 100Hz, 120Hz, 1000Hz, 10KHz, 100KHz to measure the various parameters of components and parts.The test sine wave signal is made up of the internal part of single-chip microcomputer (U10): external crystal XTH and inner PLL circuit clocking, timer TIM1, the TIM8 tandem working, clock signal driving timing device TIM1 work, the overflow pulse one road of timer TIM1 drives dma controller, the digital sine wave datum that dma controller periodically will be deposited in the FLASH internal memory ROM table is sent into DAC1 (12 D/A converters 1) in the sheet, convert simulating signal to through 12 D/A converters, 30 pin output analog sine from single-chip microcomputer U10, operational amplifier U9A, resistance R 49, R12, R50, R4, capacitor C 27, C24, CC5, C10 forms the active low-pass filter of 100KHz; The forward end of U9A is DAC0(12 position D/A converter 0 in the single-chip microcomputer U10 sheet through 29 pin that R4, C10 meet single-chip microcomputer U10) output pin, when measuring electric capacity, according to the measurement demand, can add the 2V direct current biasing in test signal.
Another road of the overflow pulse of timer TIM1 driving timing device TIM8, produced the square wave reference signal TA1 that strict phase relation is arranged with analog sine by timer TIM8, be the CMOS level, 63 pin PC6 end output by single-chip microcomputer U10, phase demodulation square-wave signal TA1 driving high-speed cmos switch U8(ISL84053) control end 11 pin A end, SPDT finishes sinusoidal wave phase demodulation by this single-pole double-throw switch (SPDT).
The sinusoidal wave test signal of active low-pass filter output is sent into 2 pin of socket transfer relay JDQ1 through resistance R 61, thermistor PTC1, and 3 pin through JDQ1 output to test pencil socket CH1 again; Element is surveyed in reception between test pencil socket CH1 and the CH3; Be connected to the excess voltage protection of recovery certainly of DP5, DP6, DZ3, DZ4 composition between resistance R 61, the thermistor PTC1; The signal of 2 pin of JDQ1 output is drawn through thermistor PTC2, enters PGA circuit U 2(MCP6S28 through resistance R 34) 3 pin, as the voltage signal U on the element under test.TZ1, TZ2 form from recovering excess voltage protection, protection PGA circuit U 2(MCP6S28) do not broken by superpotential.
Operational amplifier U9C, resistance R 52, RJ12, RJ13 form big level voltage amplifier, as the voltage signal Vu on the element under test, remedy PGA circuit U 2(MCP6S28) the trend of work defect of insufficient.
Operational amplifier U6(TLC071) form current/voltage (I/V) transducer, it is input end grounding in the same way; Test pencil socket CH3 inserts 8 pin of socket transfer relay JDQ1 through protective tube F1, DP1-DP4 forms current foldback circuit, at the bridge measurement state, 8 pin of JDQ1 and 9 pin are connected, element under test is therefore received operational amplifier U6(TLC071) reverse input end, U6(TLC071) be connected to measuring resistance Rs between output and the reverse input end, according to different ranges, select the measuring resistance of two different resistances by range transfer relay JDQ2; So just obtained the current signal in the element under test; U6(TLC071) output signal is divided into two-way, one the tunnel sends into PGA circuit U 2(MCP6S28 through resistance R 80) 8 pin, both positive and negative polarity is connected between 8 pin PGA circuit U 2(MCP6S28) and ground luminotron BL2, BL3 form clamped circuit, assurance PGA circuit U 2(MCP6S28) operate as normal, the 5:1 voltage divider that another road is formed by resistance R J5, RJ6 inserts PGA circuit U 2(MCP6S28) 7 pin.
Programmable amplifier PGA circuit: through I/V conversion and voltage signal acquisition, at PGA circuit U 2(MCP6S28) input end obtained sine voltage, the current signal of element under test, because components and parts numerical value span is big, therefore the voltage, the current signal wide ranges that cause element under test need the PGA circuit to adjust signal level before phase demodulation.The sine wave signal of the different ranges of input end PGA circuit U 2(MCP6S28) is amplified to best signal level through PGA under software control, improve measuring accuracy.
Phase detector circuit: the 3 pin Z1 end signal of output access CMOS electronic switch U8(ISL84053 PGA circuit U 2(MCP6S28)), the signal access CMOS electronic switch U8(ISL84053 of big level voltage amplifier output) 5 pin Z0 end, CMOS electronic switch U8(ISL84053) signal that 4 pin Z bring out, one the tunnel sends into CMOS electronic switch U8(ISL84053 through resistance in series R36) 12 pin X0 end, after the sign-changing amplifier 180 that another road is formed by operational amplifier U9B is spent oppositely, send into CMOS electronic switch U8(ISL84053 through resistance in series R35) 13 pin X1 end, the reference signal TA1 that single-chip microcomputer U10 sends connects digital control end 11 pin of cmos switch, like this at cmos switch U8(ISL84053) 14 pin X output terminals just obtained stepping of representation element size and phase information and moved DC voltage; This voltage amplifies through the active low-pass filter filtering that resistance R 15, R17, R16, RJ10, RJ11, capacitor C 28, C17, C2, C25, operational amplifier U9D form, step moving DC voltage and just convert sizeable steady d. c. voltage signal to, this signal enter A the D change-over circuit convert digital quantity (seeing the voltage measurement part) to.
As an example, counter front end unit of the present invention (5) is provided with socket (CH5, CH6), frequency divider (501), broad band amplifier (502), ultrahigh-speed comparator (503), single-pole double-throw switch (SPDT) (SPDT) (505), Schmidt's reshaper (506), 4 digit counters (504).
The cycle of signal namely is one all needed time of vibration of signal, if signal is shaped to rectangular pulse signal, then can be divided into positive pulse and negative pulse, obviously the cycle equals positive pulsewidth and negative pulsewidth sum, if in train of impulses, take out a pulse as signal strobe, the control given frequency is that the clock signal of F0 enters counter, then count N pulse and pulsewidth between following relation: TX=N/F0 is arranged.The present invention utilizes the Timer of single-chip microcomputer U10, by software control produce width be 1 second signal as signal strobe, this signal is from the 63 pin PC6 end output of single-chip microcomputer U10; Counting unit has been reached 4 high speed 160MHz counters formations of outside expansion by 16 bit timings/4, one 8 software counters of counter of single-chip microcomputer U10 inside.4 digit counters of this expansion are by U16(74LVC161) form, wherein, the data output end Q3 of 4 digit counter U16 (74LVC161) connects the 93 pin PB7 end of single-chip microcomputer U10, output terminal Q2 connects the 95 pin PB8 end of single-chip microcomputer U10 through resistance in series R53, output terminal Q1 connects the 91 pin PB5 end of single-chip microcomputer U10 through resistance in series R51, output terminal Q0 connects the 90 pin PB4 end of single-chip microcomputer U10 through resistance in series R56, counter Enable Pin CEP connects the 63 pin PC6 end of single-chip microcomputer U10, counter U16 (74LVC161) clear terminal MR connects the 66 pin PC9 end of single-chip microcomputer U10, gets the count value of extension counter by this mouthful software readable.
For the ultra-high frequency signal of frequency greater than 100MHz, imported after R-C coupling is carried out 64 frequency divisions to high frequency divider U12 (MB501SL) by socket CH6,1/64 frequency pulse signal of the 4 pin output of frequency divider U12 (MB501SL) is through diode D2, luminotron LED, inductance L GA, resistance R 23, R10 carries out the DC level coupling, at the pulse signal of triode TF2 collector output by CC13, R2, C26 is coupled to high-speed comparator U1(LMV7219) 4 pin reverse input ends, high-speed comparator U1(LMV7219) 3 pin positive inputs are added with feedback voltage, form Schmidt's comparer, through export the digital signal of COMS level after Schmidt's comparer U1 shaping by 1 pin, send into counter U16 (74LVC161) through resistance in series R66.
For the signal of frequency less than 120MHz, by socket CH5 input through R-C coupling to dual gate FET TF1(BF998) grid G 1, the grid G 1 of dual gate FET TF1 is connected to schottky diode DD1, resistance R 20, R27, R11, the amplitude limiter circuit that capacitor C HF1, CHF3, CHF2 form; Dual gate FET TF1 and high frequency PNP triode TF2(BFT92), resistance R 9, R1, R23, R10 form the DC coupling amplifier, signal after the amplification is by high frequency PNP triode TF2(BFT92) collector output, be divided into two-way at this signal: frequency is greater than 2MHz, less than the signal of 120MHz, enter high-speed comparator U1(LMV7219) handle; Frequency is sent into alternative COMS electronic switch U8 less than the signal of 2MHz through resistance R 58, the signal that switch is selected is coupled to Schmidt's comparer U3(TLC555 through capacitor C C7) 2,6 pin, this bipod is by R72, R57, accurate reference source TZ4(LMV431) is biased to the about 0.9V of suitable level, Schmidt's comparer U3(TLC555) 5 pin are by R76, accurate reference source TZ4(LMV431) is biased to 1.24V, Schmidt's comparer U3(TLC555) 4 pin preset terminations are gone into the control signal that 63 pin PC6 by single-chip microcomputer U10 bring in, when measured frequency, be signal strobe, when surveying pulse parameter, be enable signal, the digital signal of 3 pin output CMOS level Schmidt's comparer U3(TLC555), the 92 pin PB6 that send into single-chip microcomputer U10 through resistance in series hold, and this external signal for inner 16 bit timings of single-chip microcomputer U10/counter 4 is imported 1 end.
The pulse parameter metering circuit: Schmidt's comparer U3(TLC555) and the 92 pin PB6 of single-chip microcomputer U10 hold the external signal of 16 bit timings/counter 4 to import 1 end to form the pulse parameter metering circuit.Inside 16 bit timings of single-chip microcomputer U10/counter 4 has multiple mode of operation able to programme, can directly measure the parameter of pulse under pulse width PWM pattern.When measuring pulse parameter, single-chip microcomputer U10 arranges enable signal 63 pin PC6 end for high, make Schmidt's comparer U3(TLC555) be operated in continuous state, from Schmidt's comparer U3(TLC555) 3 pin output consecutive pulses signal, single-chip microcomputer U10 arranges 16 bit timings/counter 4 in pulse width PWM pattern, can directly measure positive pulse width and recurrence interval under software control, the difference of the two namely is negative pulse width, and then calculates the arteries and veins dutycycle again.
The CPU control module comprises: single-chip microcomputer (U10), touch RS-232 serial communication interface, power supply and management circuit thereof etc. that key-press matrix, 128 sections LCDs (LCD) interface, photoelectricity are isolated.
Single-chip microcomputer (U10): single-chip microcomputer U10 is that 32 ARMCortex-M3/M4 digital-to-analogues with powerful DSP data-handling capacity that ST company produces are mixed single-chip microcomputer; it can not only be in low-voltage; low-power consumption; high-speed operate as normal down; have a large amount of numerals and analog component simultaneously; use it for the present invention; not only simplified hardware design; and by using its powerful DSP data processing instructions; for the present invention has realized the high-accuracy measurement of digital sample software effective value, it is core devices of the present invention.Can select STM32F1 series STM32F103VCT6, the STM32F2 series STM32F205VCT6 of the ARMCortex-M3/M4 series of ST for use, models such as STM32F4 series STM32F405VCT6, STM32F3 series STM32F305VCT6, as long as there is the 256K of being no less than program storage inside, the above LQFP100 encapsulation of 100 pin just can realize purpose of the present invention.
LCD is that 32X4 has 128 sections of the present invention segmentation liquid crystal displays that are exclusively used in that adopt the 4COM driving, as system display.Because STM32F series does not have the hardware lcd driver, the present invention utilizes hardware to cooperate, and has realized the software-driven of 4COM liquid crystal display.
Touch key-press matrix: the present invention uses coding type to touch key-press matrix, utilize the buffer action of diode, use four I/O mouth lines of single-chip microcomputer U10, under the support of control software, just can connect the button that touches more than 28, simplify circuit, saved I/O mouth line greatly.Resistance R 21, touch-switch (K0-K27), diode M7, M9, M12, M14-M22 composition touch key-press matrix.Wherein the K0 key is the switch switch of the present invention's intelligence multimeter, the one end meets power supply 3V3 by pull-up resistor R21, the positive pole of another termination isolating diode M17, the negative pole of M17 connects the 23 pin PA0 end of single-chip microcomputer U10, this pin is the control end that wakes up of 32 ARMCortex-M3/M4, when operate as normal, use as common I/O mouth line, under off-mode, the Cortex-M3/M4 kernel is in holding state, only go into high level signal in the 23 pin PA0 terminations of single-chip microcomputer U10, just can wake the Cortex-M3/M4 kernel up, make its work that resets again.
The RS-232 serial port: resistance R 7, R69, photoelectrical coupler RXD form RS-232 level receiver, are Transistor-Transistor Logic level with the RS-232 level conversion; Resistance R 5, R6, photoelectrical coupler TXD forms the RS-232 level transmitter, Transistor-Transistor Logic level is transformed into the RS-232 level, RS-232 level transmitter positive-negative power obtains like this: the negative level signal rectification of the Data In-Line of the RS-232 of diode D1 obtains negative voltage, and be stored among the capacitor C B6, stabilivolt DZ1 in parallel is limited in 5.6V with voltage, one tunnel end that is connected on resistance R 6 is supplied with the level translator negative voltage, another road negative electricity crimping charge pump U17(MAX828) 2 pin, reverse through charge pump, export positive voltage at CC12, send the transducer positive voltage to supply with RS-232.Like this, utilize the electric weight of external data line, system need not extra power supply, has just realized that the photoelectricity of RS-232 serial port is isolated.
Power supply and management circuit thereof: combination intelligent multimeter of the present invention, need the measurement function of realization numerous, the accuracy requirement height, measure bandwidth, need to use high performance components and parts, these components and parts not only need the supply voltage of different size, and need appreciable power consumption, and the electric weight of battery is limited, therefore needs complicated power conversion and electric power management circuit.The present invention divides four kinds of voltage-stabilized power supply circuits:
1,3.3V power supply: by low pressure difference linear voltage regulator LDO U14(MCP1700) and peripheral filter capacitor form, be power supplies such as single-chip microcomputer U10, counter U16;
2,5.6/6V power supply: form high efficiency Switching Power Supply by U5 and peripheral cell LPP, DP, CB1, CB5, CB8, L4, L6, R8, R28, R44, R64, N9, N10, at different measurement states, its output voltage can be 5.6V or 6.4V;
3 ,-and the 6V power supply: form high efficiency Switching Power Supply by U7 and peripheral cell LPN, CC10, DN, CB7, CB10, L7, L8, R77, R22, R37, R78, P1, TZ3;
4,5V power supply: by low pressure difference linear voltage regulator LDO U11(MCP1700) and peripheral filter capacitor form, be mainly high precision, 24 sigma-delta A/D converters of low noise U19(SDI0819) power supply.
The power supply management circuit of power switch (704):
The present invention is divided into different piece with all digital-to-analog circuits by the measurement parameter difference, when measuring certain parameter, have only interlock circuit just to insert power work, irrelevant circuit power is closed, can significantly reduce electrical source consumption like this, prolong the serviceable life of battery.
Field effect transistor SI3, DTC2, the switch that resistance R 73 is formed is the operational amplifier U6 power supply of RLC electric bridge front end unit (2), field effect transistor SI2, DTC1, the switch that resistance R 45 is formed is signal condition unit (3) power supply, field effect transistor SI1, DTC6, the switch that resistance R 75 is formed is the frequency divider (501) of counter front end unit (5), ultrahigh-speed comparator (503), Schmidt's reshaper (506) power supply, field effect transistor SI4, DTC4, DTC5, the switch that resistance R 74 is formed is counter front end unit (5) broad band amplifier (502), ultrahigh-speed comparator (503), Schmidt's reshaper (506) power supply.
Element of the present invention is not limited only to above-mentioned model, and the components and parts with identical function can be replaced use, can reach purpose of the present invention equally.
Characteristics of the present invention:
The present invention's combination intelligent multimeter will have 32 ARMCortex-M3/M4 digital-to-analogues of powerful DSP data-handling capacity and mix single-chip microcomputer for digital multimeter; mimic channel adopts multichannel input programmable amplifier PGA circuit MCP6S28 as the maincenter of mimic channel simultaneously; high precision is adopted in direct current A/D conversion; 24 sigma-delta A/D converters of low noise SDI0819; exchange the A/D conversion and adopt 12 A/D converters of high speed SAR type; the comprehensive software that adopts; the method of hardware greatly improves the precision of digital multimeter, and function has obtained strengthening and expansion.Adopted computer program control automatic zero adjustment technology, the data storage capacities that single-chip microcomputer is powerful has been eliminated the offset voltage of operational amplifier etc., has reduced the requirement to components and parts, has also eliminated the influence of components and parts error to precision.The present invention not only can realize measuring automatically to element underlying parameters such as resistance, electric capacity, inductance, can carry out composite measurement to dynamic/static signals such as AC and DC signal and pulse parameters again, it is comparatively single to have overcome existing function of multimeter, only stationary singnal can be surveyed, and Dynamic Signal can not be measured; Can only measure direct current signal, drawback that can not Measuring Alternating Current Signal.Can form measuring system easily, be electronics, electrician trade and electrical maintenance personnel's indispensable instrument.

Claims (10)

1. combination intelligent multimeter, comprise analog front-end unit (1), RLC electric bridge front end unit (2), signal condition unit (3), A/D converting unit (4), counter front end unit (5), CPU control module (6) and power conversion administrative unit circuit such as (7) composition, it is characterized in that: described analog front-end unit (1) is provided with socket (CH1 – CH4), socket transfer relay (101), RC attenuator (102), range transfer relay (103), 500mA current sampling circuit (107), 10A current sampling circuit (108); Described RLC electric bridge front end unit (2) is provided with clock generator (208), timer TIM1(207), timer TIM8(209), dma controller (206), D/A converter DAC2(204), D/A converter DAC1(205), active low-pass filter (201), current/voltage transducer (202), 5:1 attenuator (203); Described signal condition unit (3) is provided with amplifier (302), multichannel input programmable amplifier PGA(301), single-pole double-throw switch (SPDT) (SPDT) (303), phase inverter (304), single-pole double-throw switch (SPDT) (SPDT) phase detector (305), active low-pass filter (306), level shift circuit (307), ADC driver (308); Described A/D converting unit (4) is provided with direct current A/D change-over circuit (401) and exchanges A/D change-over circuit ADC1(404), ADC2(403), dma controller (405), voltage reference former (409); Described counter front end unit (5) be provided with socket (CH5, CH6), frequency divider (501), broad band amplifier (502), ultrahigh-speed comparator (503), single-pole double-throw switch (SPDT) (SPDT) (505), Schmidt's reshaper (506), 4 digit counters (504); Described CPU control module (6) is provided with 32 ARM digital-to-analogues of the above encapsulation of 100 pin and mixes single-chip microcomputer (604) and software kit thereof, and LCD display (601) is touched key-press matrix (602), serial communication port (603); Described power conversion administrative unit (7) is provided with DC/DC positive supply (701), DC/DC negative supply (702), LDO power supply (703), power switch (704).
2. combination intelligent multimeter according to claim 1, it is characterized in that: described analog front-end unit (1) circuit comprises:
Socket transfer relay (101), RC attenuator (102), range transfer relay (103), 10A current sampling circuit (108), 500mA current sampling circuit (107);
A, 3 pin of the relay (JDQ1) of socket transfer relay (101) connect socket (CH1), 8 pin of relay (JDQ1) connect socket (CH3) by protective tube, diode (DP4, DP1) forward is connected in series between 8 pin and ground of relay (JDQ1), diode (DP2, DP3) differential concatenation is connected between 8 pin and ground of relay (JDQ1), 2 pin of relay (JDQ1) connect the end of the output resistance PTC1 of sinusoidal wave circuit low-pass filter circuit (501), 4 pin of relay (JDQ1) connect RC attenuator (102), 7 pin of relay (JDQ1) connect an end of the sample resistance (RJ9) of 500mA current sampling circuit, 9 pin of relay (JDQ1) connect 2 pin reverse input ends of the amplifier (U6) of current/voltage transducer (502), (5 of relay (JDQ1), 6) pin is connected and connects power supply VCC end, 1 pin of relay (JDQ1) connects the drain D of fet (N2), 10 pin of relay (JDQ1) connect the drain D of fet (N3), the source S of fet (N2) connects the drain D of fet (N1), the source S of fet (N3) connects the drain D of fet (N1), the source S ground connection of fet (N1), the Gate utmost point G of fet (N2) connects the 65 pin PC8 end of single-chip microcomputer (U10), the Gate utmost point G of fet (N3) connects the 66 pin PC9 end of single-chip microcomputer (U10), the Gate utmost point G of fet (N1) connects the 71 pin PA12 end of single-chip microcomputer (U10), also inserts resistance (R87) between the Gate utmost point G of fet (N1) and the ground;
B, the high pressure divider resistance (RH1-RH4) of RC attenuator (102) is connected in series, its two ends parallel high voltage dividing potential drop electric capacity (CHV), one end of high pressure divider resistance (RH1) connects 4 pin of socket transfer relay (JDQ1), one end of high pressure divider resistance (RH4) connects an end of resistance (R26), the other end of resistance (R26) connects 13 pin of cmos switch (U15), 14 of cmos switch (U15), 5 pin link to each other, low pressure divider resistance (RL2) is in parallel with low pressure dividing potential drop electric capacity (CL4), 14 of one end and cmos switch (U15), 5 pin link to each other, other end ground connection, 15 of cmos switch (U15), 2 pin link to each other, low pressure divider resistance (RL3) is in parallel with low pressure dividing potential drop electric capacity (CL1), 15 of one end and cmos switch (U15), 2 pin link to each other, other end ground connection, 11 of cmos switch (U15), 4 pin link to each other, low pressure divider resistance (RL1) is in parallel with low pressure dividing potential drop electric capacity (CL3), 11 of one end and cmos switch (U15), 4 pin link to each other, other end ground connection, 12 of cmos switch (U15), the 1 pin ground connection that links to each other, insert forward and reverse light emitting diode (BL2 that is connected between output terminal 3 pin of cmos switch (U15) and the ground, BL3), control end 9 pin of cmos switch (U15) are held through the 79 pin PC11 that resistance in series (R71) is connected to single-chip microcomputer (U10), and control end 10 pin of cmos switch (U15) are connected to the 31 pin PA6 end of single-chip microcomputer (U10) through resistance in series (R79);
C, 2 pin of the relay (JDQ2) of range transfer relay (103) connect 3 pin of cmos switch (U15), 4 pin of relay (JDQ2) are through parallel resistance (RPV), electric capacity (CPV) connects 4 pin of socket transfer relay (JDQ1), the output signal of 3 pin of relay (JDQ2) inserts signal condition unit (3) circuit through resistance in series (R23), 7 pin of relay (JDQ2) connect reverse input end 2 pin of amplifier (U6) through resistance (RJ4), 9 pin of relay (JDQ2) connect reverse input end 2 pin of amplifier (U6) through resistance (RJ3), 8 pin of relay (JDQ2) connect output terminal 6 pin of amplifier (U6), (5 of relay (JDQ2), 6) pin is connected and connects power supply VCC end, 1 pin of relay (JDQ2) connects the drain D of fet (N5), 10 pin of relay (JDQ2) connect the drain D of fet (N6), the source S of fet (N5) connects the drain D of fet (N4), the source S of fet (N6) connects the drain D of fet (N4), the source S ground connection of fet (N4), the Gate utmost point G of fet (N5) connects the 65 pin PC8 end of single-chip microcomputer (U10), the Gate utmost point G of fet (N6) connects the 66 pin PC9 end of single-chip microcomputer (U10), the Gate utmost point G of fet (N4) connects the 15 pin PC0 end of single-chip microcomputer (U10), also inserts resistance (R86) between the Gate utmost point G of fet (N4) and the ground;
The sample resistance (FL) of D, 10A current sampling circuit (108) is connected between socket (CH4) and the ground connection socket (CH2);
The sample resistance (RJ9) of E, 500mA current sampling circuit (107) is connected between 7 pin of socket (CH4) and socket transfer relay (JDQ1).
3. combination intelligent multimeter according to claim 1, it is characterized in that: described RLC electric bridge front end unit (2) circuit comprises:
Clock generator (208), timer TIM1(207), timer TIM8(209), dma controller (206), D/A converter DAC2(204), D/A converter DAC1(205), active low-pass filter (201), current/voltage transducer (202), 5:1 attenuator (203);
The quartz crystal (XTH) of A, clock generator (208) is connected to 12 of single-chip microcomputer (U10), 13 pin, be connected with electric capacity (C9, C8) between 12,13 pin of single-chip microcomputer (U10) and ground, the inner phase-locked loop pll circuit of single-chip microcomputer (U10) produces system clock through programming;
B, timer TIM1(207) timer (TIM1) be the interior programmable timer of single-chip microcomputer (U10), it is input as clock generator (512) and produces system clock, the clock of programming output drives late-class circuit;
C, timer TIM8(209) timer (TIM8) be the interior programmable timer of single-chip microcomputer (U10), it is input as the clock of timer (TIM1) programming output, the clock of programming output is by the 63 pin PC6 output of single-chip microcomputer (U10);
The dma controller of D, dma controller (206) is the interior dma controller of single-chip microcomputer (U10), and it triggers the clock that clock is timer (TIM1) programming output, and its source address is the sinusoidal wave data table address, and its destination address is D/A converter DAC2(204);
E, D/A converter DAC1(205) be interior 12 the D/A converter DAC0 of single-chip microcomputer (U10), produce DC voltage through programming, by the 29 pin DAC0 output of single-chip microcomputer (U10);
F, D/A converter DAC2(204) be interior 12 the D/A converter DAC1 of single-chip microcomputer (U10), produce the sine voltage signal through dma controller (206), by the 30 pin DAC1 output of single-chip microcomputer (U10);
G, one end of the electric capacity (CC5) of active low-pass filter (201) connects the 30 pin DAC1 output of single-chip microcomputer (U10), the other end connects an end of resistance (R49), the other end of resistance (R49) connects an end of resistance (R12), reverse input end 2 pin of the other end concatenation operation amplifier (U9A) of resistance (R12), insert electric capacity (C27) between the contact of resistance (R49) and resistance (R12) and ground, resistance (R49) is connected resistance (R50) end with the contact of resistance (R12), output terminal 1 pin of resistance (R50) other end concatenation operation amplifier (U9A), reverse input end 2 pin and output terminal 1 pin of operational amplifier (U9A) are connected to electric capacity (C24), positive input 3 pin of operational amplifier (U9A) connect the 29 pin DAC0 output of single-chip microcomputer (U10) through resistance in series (R4), output terminal 1 pin of operational amplifier (U9A) connects resistance (R61) end, the other end of resistance (R61) connects an end of thermistor (PTC1), the other end of thermistor (PTC1) connects 2 pin of socket transfer relay (JDQ1), the plus earth of stabilivolt (DZ6), the negative pole of stabilivolt (DZ6) connects the negative pole of diode (DP6), the positive pole of diode (DP6) connects the contact of resistance (R61) and thermistor (PTC1), the minus earth of stabilivolt (DZ4), the positive pole of stabilivolt (DZ4) connects the positive pole of diode (DP5), and the negative pole of diode (DP5) connects the contact of resistance (R61) and thermistor (PTC1);
H, output terminal 6 pin of the operational amplifier (U6) of current/voltage transducer (202) connect 8 pin of range transfer relay (JDQ2), reverse input end 2 pin of operational amplifier (U6) connect 7 pin of range transfer relay (JDQ2) through resistance (RJ4), reverse input end 2 pin of operational amplifier (U6) connect 9 pin of range transfer relay (JDQ2) through resistance (RJ3), reverse input end 2 pin of operational amplifier (U6) connect 9 pin of socket transfer relay (JDQ1), positive input 3 ground connection of operational amplifier (U6), the negative supply termination negative voltage feeder ear VSS of operational amplifier (U6), be connected electric capacity (CC6) between the drain D of the positive supply termination fet (SI3) of operational amplifier (U6), the positive power source terminal of operational amplifier (U6) and ground;
Output terminal 6 pin of one end concatenation operation amplifier (U6) of the resistance (RJ6) of I, 5:1 attenuator (203), the other end of resistance (RJ6) connects an end of resistance (RJ5), the other end ground connection of resistance (RJ5).
4. combination intelligent multimeter according to claim 1, it is characterized in that: signal condition unit (3) circuit comprises:
Amplifier (302), multichannel input programmable amplifier PGA(301), single-pole double-throw switch (SPDT) (SPDT) (303), phase inverter (304), single-pole double-throw switch (SPDT) (SPDT) phase detector (305), active low-pass filter (306), level shift circuit (307), ADC driver (308);
A, 10 pin of input end in the same way of the operational amplifier (U9C) of amplifier (302) are through resistance in series (R52), thermistor (PTC2) connects 4 pin of socket transfer relay (JDQ1), resistance (R52) is connected the base stage B of triode (TZ1) with the contact of thermistor (PTC2), the emitter E of triode (TZ1) connects the emitter E of triode (TZ2), the base stage B ground connection of triode (TZ2), triode (TZ1, TZ2) collector C is unsettled, be connected resistance (RJ13) between the output terminal (8) of operational amplifier (U9C) and reverse input end 10 pin, be connected resistance (RJ12) between reverse input end 10 pin of operational amplifier (U9C) and ground;
B, 3 pin of road input programmable amplifier PGA circuit (U2) connect an end of thermistor (PTC2) more than the multichannel input programmable amplifier PGA circuit (301) through resistance in series (R34), 7 pin of multichannel input programmable amplifier PGA circuit (U2) connect the output point of 5:1 attenuator (203), 8 pin of multichannel input programmable amplifier PGA circuit (U2) are through output terminal 6 pin of resistance in series (R80) concatenation operation amplifier (U6), is connected the continuous luminotron (BL1 of both positive and negative polarity between 8 pin of multichannel input programmable amplifier PGA circuit (U2) and ground, BL2), 4 pin of multichannel input programmable amplifier PGA circuit (U2) connect 7 pin of socket transfer relay (JDQ1) through resistance in series (R47), 6 pin of multichannel input programmable amplifier PGA circuit (U2) connect 3 pin of range transfer relay (JDQ2) through resistance in series (R25), 2 pin of multichannel input programmable amplifier PGA circuit (U2) are through resistance in series (R46) ground connection, 11 pin VSS of multichannel input programmable amplifier PGA circuit (U2) connect the negative pole of stabilivolt (DZ2), the positive pole of stabilivolt (DZ2) meets negative supply VSS, be connected electric capacity (CC9) between 11 pin of multichannel input programmable amplifier PGA circuit (U2) and ground, 10 pin VREF ground connection of multichannel input programmable amplifier PGA circuit (U2), 16 pin VDD of multichannel input programmable amplifier PGA circuit (U2) connect the emitter E of triode (DTC3), the collector C of triode (DTC3) connects power supply 3V3, the base stage B of triode (DTC3) connects the drain D of field effect transistor (SI2) through resistance in series (R2A), be connected electric capacity (CC8) between 16 pin VDD of multichannel input programmable amplifier PGA circuit (U2) and ground, the 12 pin sheets choosing end CS of multichannel input programmable amplifier PGA circuit (U2) connects the collector C of triode (P4), the collector C of triode (P4) connects 11 pin VSS of multichannel input programmable amplifier PGA circuit (U2) through resistance (R90), the base stage B of triode (P4) connects the 34 pin PC5 end of single-chip microcomputer (U10) through resistance (R33), 13 pin data input pin SI of multichannel input programmable amplifier PGA circuit (U2) connect the collector C of triode (P2), the collector C of triode (P2) connects 11 pin VSS of multichannel input programmable amplifier PGA circuit (U2) through resistance (R91), the base stage B of triode (P2) connects the 66 pin PC9 end of single-chip microcomputer (U10) through resistance (R18), 15 pin input end of clock SCK of multichannel input programmable amplifier PGA circuit (U2) connect the collector C of triode (P3), the collector C of triode (P3) connects the 11 pin VSS that multichannel is imported programmable amplifier PGA circuit (U2) through resistance (R63), and the base stage B of triode (P3) connects the 65 pin PC8 end of single-chip microcomputer (U10) through resistance (R24);
Output terminal 8 pin of the 5 pin Z0 end concatenation operation amplifiers (U9C) of the single-pole double-throw switch (SPDT) (U8) of C, single-pole double-throw switch (SPDT) (SPDT) (303), the 3 pin Z1 end of single-pole double-throw switch (SPDT) (U8) connects output terminal 1 pin of multichannel input programmable amplifier PGA circuit (U2), and 9 pin C control ends of single-pole double-throw switch (SPDT) (U8) connect the 70 pin PA11 end of single-chip microcomputer (U10) through resistance in series (R54);
Reverse input end 6 pin of the operational amplifier (U9B) of D, phase inverter (304) connect the 4 pin Z output terminals of (U8) through resistance in series (R81), reverse input end 6 pin of operational amplifier (U9B) are connected feedback resistance (R82) with output terminal 7 pin, the 5 pin ground connection of input end in the same way (U9B);
The output signal of 4 pin Z output terminals of the single-pole double-throw switch (SPDT) (U8) of E, single-pole double-throw switch (SPDT) (SPDT) phase detector (305) inserts 12 pin X0 input ends of single-pole double-throw switch (SPDT) (U8) through resistance (R36), the output signal of output terminal 7 pin of operational amplifier (U9B) is through 13 pin X1 input ends of resistance (R35) access single-pole double-throw switch (SPDT) (U8), and 11 pin A control ends of single-pole double-throw switch (SPDT) (U8) connect the 63 pin PC6 end of single-chip microcomputers (U10);
D, the output signal of the 14 pin X end of the single-pole double-throw switch (SPDT) (U8) of active low-pass filter (306) is through the resistance (R15 of series connection, R17, R16) 12 pin positive inputs of access operational amplifier (U9D), insert electric capacity (C28) between resistance (R15) and resistance (R17) and the ground, insert electric capacity (C17) between resistance (R17) and resistance (R16) and the ground, insert electric capacity (C2) between 12 pin positive inputs of operational amplifier (U9D) and the ground, insert resistance (RJ11) between 13 pin reverse input ends of operational amplifier (U9D) and the 14 pin output terminals, resistance (RJ11) two ends shunt capacitances (C25) insert resistance (RJ10) between 13 pin reverse input ends of operational amplifier (U9D) and the ground;
Output terminal 14 pin of one end concatenation operation amplifier (U9D) of the resistance (RJ2) of E, level shift circuit (307), the other end of resistance (RJ2) connects an end of resistance (RJ1), and the other end of resistance (RJ1) connects 2 pin of voltage stabilizer (U11);
F, reverse input end 4 pin that exchange the operational amplifier (U18) of A/D driver (207) connect an end of resistance (RJ15), the other end of resistance (RJ15) connects 1 pin of multichannel input programmable amplifier PGA circuit (U2), reverse input end 4 pin of operational amplifier (U18) are connected resistance (RJ14) with output terminal 6 pin, positive input 3 pin of operational amplifier (U18) connect the 30 pin DAC1 end of single-chip microcomputer (U10) through resistance in series (R62), be connected electric capacity (C1) between positive input 3 pin of operational amplifier (U18) and ground, output terminal 6 pin of operational amplifier (U18) connect the 17 pin PC2 end of single-chip microcomputer (U10) through resistance in series (R60), be connected electric capacity (C12) between 17 pin PC2 of single-chip microcomputer (U10) end and ground, output terminal 6 pin of operational amplifier (U18) connect the 18 pin PC3 end of single-chip microcomputer (U10) through resistance in series (R59), be connected electric capacity (C32) between 18 pin PC3 of single-chip microcomputer (U10) end and ground, negative power end 2 pin of operational amplifier (U18) connect the negative pole of stabilivolt (DZ5), the positive pole of stabilivolt (DZ5) connects negative voltage VSS, be connected electric capacity (C4) between negative power end 2 pin of operational amplifier (U18) and ground, positive power source terminal 6 pin of operational amplifier (U18) meet positive supply 3V3, and control end 5 pin of operational amplifier (U18) connect 2 pin of voltage stabilizer (U11) through resistance in series (R3).
5. combination intelligent multimeter according to claim 1, it is characterized in that: described A/D converting unit (4) circuit comprises:
Direct current A/D converter (401) exchanges A/D converter ADC1(404), exchange A/D converter ADC2(403), dma controller (405), voltage reference former (402);
A, 5 pin of 24 A/D converters (U4) of direct current A/D converter (3), insert electric capacity (C22) between 6 pin, insert electric capacity (C20) between 4 pin of 24 A/D converters (U4) and ground, 4 pin of 24 A/D converters (U4) connect 6 pin of voltage reference (U13), 10 pin of 24 A/D converters (U4), 11 pin, the 12 pin ground connection that links to each other, 1 pin of 24 A/D converters (U4), 16 pin link to each other, 1 pin of 24 A/D converters (U4) connects output terminal 2 pin of LDO voltage stabilizer (U11), 2 pin of 24 A/D converters (U4), insert inductance (L9) between 16 pin, insert electric capacity (CC4) between 2 pin of 24 A/D converters (U4) and ground, data output end 15 pin of 24 A/D converters (U4) are connected to the 64 pin PC7 end of single-chip microcomputer (U10) through resistance in series (R54), input end of clock 1 pin of 24 A/D converters (U4) is connected to the 91 pin PB5 end of single-chip microcomputer (U10) through resistance in series (R70), 7 pin of 24 A/D converters (U4) connect level shift circuit resistance (RJ1, RJ2) contact, insert electric capacity (C3) between 7 pin of 24 A/D converters (U4) and ground, 8 pin of 24 A/D converters (U4) connect an end of resistance (RJ7), the other end of resistance (RJ7) connects output terminal 2 pin of LDO voltage stabilizer (U11), inserts resistance (RJ8) between 8 pin of 24 A/D converters (U4) and ground, electric capacity (C13);
B, interchange A/D converter ADC1(404) be interior 12 the A/D converter ADC1 of single-chip microcomputer (U10), the input end of 12 A/D converter ADC1 is the 17 pin PC12 end of single-chip microcomputer (U10), carries out the A/D data-switching through programming;
C, interchange A/D converter ADC2(403) be interior 12 the A/D converter ADC2 of single-chip microcomputer (U10), the input end of 12 A/D converter ADC2 is the 18 pin PC13 end of single-chip microcomputer (U10), carries out the A/D data-switching through programming;
D, dma controller (405) are the dma controller in the single-chip microcomputer (U10), carry out the transmission of A/D data-switching through programming;
2 pin power ends of the benchmark integrated circuit (U13) of E, voltage reference former (402) connect power supply 3V3, (1,4,7,8) pin ground connection of benchmark integrated circuit (U13), insert electric capacity (CC14) between 6 pin output terminals of benchmark integrated circuit (U13) and ground, insert resistance (R55) between 3 pin of benchmark integrated circuit (U13) and ground, 3 pin of benchmark integrated circuit (U13) connect an end of resistance (R65), and the other end of resistance (R65) connects the drain D of field effect transistor (SI2).
6. combination intelligent multimeter according to claim 1, it is characterized in that: described counter front end unit (5) circuit comprises:
Socket (CH5, CH6), frequency divider (501), broad band amplifier (502), ultrahigh-speed comparator (503), single-pole double-throw switch (SPDT) (SPDT) (505), Schmidt's reshaper (506), 4 digit counters (504);
A, the socket (CH6) of frequency divider (501) circuit is by series capacitance (CHF4, C30) 1 pin of connection divider circuit (U12), series capacitance (CHF4, C30) be connected to resistance (R43) in the middle of and between the ground, the diode pair that both positive and negative polarity joins (DD3), 6 of divider circuit (U12), 3 pin are connected with the supply pin 2 of divider circuit (U12), insert electric capacity (C14) between the supply pin 2 of divider circuit (U12) and the ground, 5 pin ground connection of divider circuit (U12), insert electric capacity (C21) between 8 pin of divider circuit (U12) and the ground, 4 pin of divider circuit (U12) connect diode (D2) positive pole, the positive pole of diode (D2) negative pole sending and receiving light pipes (LEDF), the negative pole output signal of luminotron (LEDF) is to the next stage circuit;
B, the socket (CH5) of broad band amplifier (502) circuit passes through and the electric capacity (CHF1 of company, CHF3) end links to each other, the other end is connected with resistance (R27), and the electric capacity (CHF1 of company, CHF3) and insert resistance (R20) between resistance (R27) contact and the ground, the other end of resistance (R27) is by parallel resistance (R11), electric capacity (CHF2) connects the Gate utmost point G1 of dual gate FET (TF1), insert the diode pair (DD1) that both positive and negative polarity joins between Gate utmost point G1 and the ground, the Gate utmost point G2 of dual gate FET (TF1) connects the emitter E of triode (TF2), resistance (R9) connects drain D and the power supply of dual gate FET (TF1), resistance (R10) connects the source S and ground of dual gate FET (TF1), the base stage B of triode (TF2) connects the drain D of dual gate FET (TF1), resistance (R1) connects emitter E and the power supply of triode (TF2), be connected the inductance (LGA) and resistance (R23) of series connection between the collector C of triode (TF2) and the source S of dual gate FET (TF1), insert electric capacity (C5) between the emitter E utmost point of triode (TF2) and the ground;
C, 4 pin of the ultrahigh-speed comparator (U1) of ultrahigh-speed comparator (403) circuit connect the collector C of triode (TF2) by electric capacity (C26), electric capacity (CC13) is connected with resistance (R2), in parallel with electric capacity (C26) again, insert resistance (R40) between 4 pin of ultrahigh-speed comparator (U1) and the ground, the diode pair that both positive and negative polarity joins (DD2), 1 pin of ultrahigh-speed comparator (U1) links to each other by resistance (R41) with 3 pin, insert resistance (R42) between 3 pin of ultrahigh-speed comparator (U1) and the ground, 2 pin ground connection of ultrahigh-speed comparator (U1), 5 pin of ultrahigh-speed comparator (U1) connect the negative pole of diode (D4), the positive pole of diode (D4) connects the drain D of field effect transistor (SI4), 5 pin of ultrahigh-speed comparator (U1) connect the negative pole of diode (D6), and the positive pole of diode (D6) connects the drain D of field effect transistor (SI1);
2 pin of the cmos switch (U8) of D, single-pole double-throw switch (SPDT) (SPDT) (505) connect the output signal of 1 pin of multichannel input programmable amplifier PGA circuit (U2) through resistance in series (R19), 1 pin of cmos switch (U8) connects the output signal of the collector C of triode (TF2) through resistance in series (R58), 15 pin output signals of cmos switch (U8) are to subordinate's circuit, and 10 pin control ends of cmos switch (U8) connect 70 pin PA11 pin of single-chip microcomputer (U10) through resistance in series (R54);
E, 2 pin of the time-base integrated circuit (U3) of Schmidt's reshaper (506) circuit, 6 pin link to each other, 15 pin that connect cmos switch (U8) again by electric capacity (CC7), insert resistance (R57) between 6 pin of time-base integrated circuit (U3) and the ground, 6 pin of time-base integrated circuit (U3) are connected by resistance (R72) with 5 pin, 6 pin of time-base integrated circuit (U3) connect the common port of the diode pair (DD4) that both positive and negative polarity joins, the plus earth of diode pair (DD4), 5 pin of time-base integrated circuit (U3) connect the negative electrode of three terminal regulator (TZ4), the plus earth of three terminal regulator (TZ4), the reference utmost point of three terminal regulator (TZ4) is connected with negative electrode, resistance (R76) connects 5 pin and the 8 pin power supplies of time-base integrated circuit (U3), 4 pin of time-base integrated circuit (U3) link to each other with the 63 pin PC6 end of single-chip microcomputer (U10), resistance (R67) connects 3 pin of time-base integrated circuit (U3) and the 92 pin PB6 end of single-chip microcomputer (U10), 8 pin power ends of time-base integrated circuit (U3) connect the negative pole of diode (D7), and the positive pole of diode (D7) connects 5 pin of ultrahigh-speed comparator (U1);
F, 2 pin of the counting circuit (U16) of 4 digit counters (504) circuit connect 1 pin of ultrahigh-speed comparator (U1) through resistance in series (R66), (3 of counting circuit (U16), 4,5,6,8) pin ground connection, (9 of counting circuit (U16), 10) pin connects power supply 16 pin, 7 pin of counting circuit (U16) connect the 63 pin PC6 end of single-chip microcomputer (U10), 1 pin of counting circuit (U16) connects the 33 pin PC4 end of single-chip microcomputer (U10), 11 pin of counting circuit (U16) connect the 93 pin PB7 end of single-chip microcomputer (U10), 12 pin of counting circuit (U16) connect the 95 pin PB8 end of single-chip microcomputer (U10) through resistance in series (R53), 13 pin of counting circuit (U16) connect the 91 pin PB5 end of single-chip microcomputer (U10) through resistance in series (R51), 14 pin of counting circuit (U16) connect the 90 pin PB4 end of single-chip microcomputer (U10) through resistance in series (R53), 16 pin power ends of counting circuit (U16) connect an end of inductance (L5), the other end of inductance (L5) connects power supply 3V3, is connected electric capacity (C18) between 16 pin of counting circuit (U16) and ground.
7. combination intelligent multimeter according to claim 1, it is characterized in that: described CPU control module (6) circuit comprises:
Single-chip microcomputer (604), display (601), touch key-press matrix (602), serial communication port (603);
A, the 8 pin XIN end of the single-chip microcomputer (U10) of single-chip microcomputer (604) circuit, 9 pin XOUT terminations are gone into quartz crystal (XTL), the 8 pin XIN end of single-chip microcomputer (U10), be connected with electric capacity (C6 between 9 pin XOUT end and ground, C7), the 33 pin PC4 end of single-chip microcomputer (U10) connects the grid G of field effect transistor (N8), be connected with resistance (R84) between the 33 pin PC4 end of single-chip microcomputer (U10) and ground, be connected hummer (BEEP) between the drain D of field effect transistor (N8) and power end VCC, be connected with electric capacity (CC15 between the 22 pin power vd DA end of single-chip microcomputer (U10) and ground, CB11), be connected inductance (L1) between 22 pin power vd DA of single-chip microcomputer (U10) end and power end 3V3, (6 of single-chip microcomputer (U10), 11,19,28,50,30,75,100) be connected with electric capacity (CC16 between pin power supply vdd terminal and ground, CC1), be connected inductance (L2) between 11 pin power supply vdd terminals of single-chip microcomputer (U10) and power end 3V3, be connected electric capacity (CB9) between power end 3V3 and ground, 67 pin PA8 of single-chip microcomputer (U10) end is connected with the 64 pin PC7 end of single-chip microcomputer (U10), 14 pin preset NRST of single-chip microcomputer (U10) hold with ground between be connected electric capacity (C15);
The be linked in sequence pen section input port (S17-S32) of LCDs (LCD) of the be linked in sequence pen section input port (S1-S16) of LCDs (LCD) of 16 delivery outlets of PD mouth (PD0-PD15) of the single-chip microcomputer (U10) of B, single-chip microcomputer (604) circuit, 16 delivery outlets of the PE mouth of single-chip microcomputer (U10) (PE0-PE15);
Resistance (R38) is connected with resistance (R39), intermediate node connects the COM3 input port of LCDs (LCD), resistance (R38) other end connects 35 pin PB0 delivery outlets of single-chip microcomputer (U10), and resistance (R39) other end connects 47 pin PB10 delivery outlets of single-chip microcomputer (U10);
Resistance (R30) is connected with resistance (R29), intermediate node connects the COM2 input port of LCDs (LCD), resistance (R30) other end connects 36 pin PB1 delivery outlets of single-chip microcomputer (U10), and resistance (R29) other end connects 48 pin PB11 delivery outlets of single-chip microcomputer (U10);
Resistance (R32) is connected with resistance (R31), intermediate node connects the COM1 input port of LCDs (LCD), resistance (R32) other end connects 37 pin PB2 delivery outlets of single-chip microcomputer (U10), and resistance (R31) other end connects 51 pin PB12 delivery outlets of single-chip microcomputer (U10);
Resistance (R13) is connected with resistance (R14), intermediate node connects the COM0 input port of LCDs (LCD), resistance (R13) other end connects 89 pin PB3 delivery outlets of single-chip microcomputer (U10), and resistance (R14) other end connects 96 pin PB9 delivery outlets of single-chip microcomputer (U10);
C, touch key-press matrix (302) it
An end that touches button (K1, K0, K3, K2, K4, K5, K25, K26) is connected in parallel, and connects an end of resistance (R21), and the other end of resistance (R21) connects the power end 3V3 of single-chip microcomputer (U10);
The other end that touches button (K1) connects the positive pole of diode (M18), and the negative pole of diode (M18) connects 26 pin PA3 input ports of single-chip microcomputer (U10);
The other end that touches button (K0) connects the positive pole of diode (M17), and the negative pole of diode (M17) connects 23 pin PA0 input ports of single-chip microcomputer (U10);
The other end that touches button (K3) connects the positive pole of diode (M19), and the negative pole of diode (M19) connects 24 pin PA1 input ports of single-chip microcomputer (U10);
The other end that touches button (K2) connects the positive pole of diode (M16), and the negative pole of diode (M18) connects 25 pin PA2 input ports of single-chip microcomputer (U10);
The other end that touches button (K4) connects the positive pole of diode (M20), and the negative pole of diode (M20) connects 25 pin PA2 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M20) of diode (M22), the negative pole of diode (M22) connects 24 pin PA1 input ports of single-chip microcomputer (U10);
The other end that touches button (K5) connects the positive pole of diode (M21), and the negative pole of diode (M21) connects 26 pin PA3 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M21) of diode (M15), the negative pole of diode (M15) connects 25 pin PA2 input ports of single-chip microcomputer (U10);
The other end that touches button (K25) connects the positive pole of diode (M14), and the negative pole of diode (M14) connects 24 pin PA1 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M14) of diode (M12), the negative pole of diode (M12) connects 26 pin PA3 input ports of single-chip microcomputer (U10);
The other end that touches button (K26) connects the positive pole of diode (M7), and the negative pole of diode (M7) connects 23 pin PA0 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M7) of diode (M9), the negative pole of diode (M9) connects 26 pin PA3 input ports of single-chip microcomputer (U10);
An end that touches button (K13, K11, K14, K12, K17, K15) is connected in parallel, and connects 23 pin PA0 input ports of single-chip microcomputer (U10);
The other end that touches button (K13) connects the positive pole of diode (M18), and the negative pole of diode (M18) connects 26 pin PA3 input ports of single-chip microcomputer (U10);
The other end that touches button (K11) connects the positive pole of diode (M19), and the negative pole of diode (M19) connects 24 pin PA1 input ports of single-chip microcomputer (U10);
The other end that touches button (K14) connects the positive pole of diode (M16), and the negative pole of diode (M16) connects 25 pin PA2 input ports of single-chip microcomputer (U10);
The other end that touches button (K12) connects the positive pole of diode (M20), and the negative pole of diode (M20) connects 25 pin PA2 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M20) of diode (M22), the negative pole of diode (M22) connects 24 pin PA1 input ports of single-chip microcomputer (U10);
The other end that touches button (K17) connects the positive pole of diode (M21), and the negative pole of diode (M21) connects 26 pin PA3 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M21) of diode (M15), the negative pole of diode (M15) connects 25 pin PA2 input ports of single-chip microcomputer (U10);
The other end that touches button (K15) connects the positive pole of diode (M14), and the negative pole of diode (M14) connects 24 pin PA1 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M14) of diode (M12), the negative pole of diode (M12) connects 26 pin PA3 input ports of single-chip microcomputer (U10);
An end that touches button (K19, K18, K24, K20, K16) is connected in parallel, and connects 24 pin PA1 input ports of single-chip microcomputer (U10);
The other end that touches button (K19) connects the positive pole of diode (M18), and the negative pole of diode (M18) connects 26 pin PA3 input ports of single-chip microcomputer (U10);
The other end that touches button (K18) connects the positive pole of diode (M17), and the negative pole of diode (M17) connects 23 pin PA0 input ports of single-chip microcomputer (U10);
The other end that touches button (K24) connects the positive pole of diode (M16), and the negative pole of diode (M16) connects 25 pin PA2 input ports of single-chip microcomputer (U10);
The other end that touches button (K20) connects the positive pole of diode (M21), and the negative pole of diode (M21) connects 26 pin PA3 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M21) of diode (M15), the negative pole of diode (M15) connects 25 pin PA2 input ports of single-chip microcomputer (U10);
The other end that touches button (K16) connects the positive pole of diode (M7), and the negative pole of diode (M7) connects 23 pin PA0 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M7) of diode (M9), the negative pole of diode (M9) connects 26 pin PA3 input ports of single-chip microcomputer (U10);
An end that touches button (K7, K6, K8, K9, K10) is connected in parallel, and connects 25 pin PA2 input ports of single-chip microcomputer (U10);
The other end that touches button (K7) connects the positive pole of diode (M18), and the negative pole of diode (M18) connects 26 pin PA3 input ports of single-chip microcomputer (U10);
The other end that touches button (K6) connects the positive pole of diode (M17), and the negative pole of diode (M17) connects 23 pin PA0 input ports of single-chip microcomputer (U10);
The other end that touches button (K8) connects the positive pole of diode (M19), and the negative pole of diode (M19) connects 24 pin PA1 input ports of single-chip microcomputer (U10);
The other end that touches button (K9) connects the positive pole of diode (M14), and the negative pole of diode (M14) connects 24 pin PA1 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M14) of diode (M12), the negative pole of diode (M12) connects 26 pin PA3 input ports of single-chip microcomputer (U10);
The other end that touches button (K10) connects the positive pole of diode (M7), and the negative pole of diode (M7) connects 23 pin PA0 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M7) of diode (M9), the negative pole of diode (M9) connects 26 pin PA3 input ports of single-chip microcomputer (U10);
An end that touches button (K27, K21, K23, K22) is connected in parallel, and connects 26 pin PA3 input ports of single-chip microcomputer (U10);
The other end that touches button (K27) connects the positive pole of diode (M17), and the negative pole of diode (M17) connects 23 pin PA0 input ports of single-chip microcomputer (U10);
The other end that touches button (K21) connects the positive pole of diode (M19), and the negative pole of diode (M19) connects 24 pin PA1 input ports of single-chip microcomputer (U10);
The other end that touches button (K23) connects the positive pole of diode (M16), and the negative pole of diode (M16) connects 25 pin PA2 input ports of single-chip microcomputer (U10);
The other end that touches button (K22) connects the positive pole of diode (M20), and the negative pole of diode (M20) connects 25 pin PA2 input ports of single-chip microcomputer (U10); The positive pole of the cathode connecting diode (M20) of diode (M22), the negative pole of diode (M22) connects 24 pin PA1 input ports of single-chip microcomputer (U10);
One end of 3 pin connecting resistances (R7) of the socket (CZ232) of D, serial communication port (603), the other end of resistance (R7) connects the positive pole of optocoupler (RXD) luminotron, 2 pin signal grounds of the negative pole combination hub (CZ232) of optocoupler (RXD) luminotron, the collector of optocoupler (RXD) triode connects the 69 pin PA10 end of single-chip microcomputer (U10), one end of resistance (R69) connects the 69 pin PA10 end of single-chip microcomputer (U10), the other end of resistance (R69) connects power end 3V3, the grounded emitter of optocoupler (RXD) triode;
The negative pole of optocoupler (TXD) luminotron connects the 68 pin PA9 end of single-chip microcomputer (U10), and the positive pole of optocoupler (TXD) luminotron connects an end of resistance (R5), and the other end of resistance (R5) connects feeder ear 3V3; The negative pole of luminotron (LED) connects the 68 pin PA9 end of single-chip microcomputer (U10), and the positive pole of luminotron (LED) connects an end of resistance (R70), and the other end of resistance (R70) connects feeder ear 3V3;
1 pin of the emitter gang socket (CZ232) of optocoupler (TXD) triode, the emitter of optocoupler (TXD) triode connects an end of resistance (R6), the other end of resistance (R6) connects 1 pin output terminal of charge pump integrated circuit (U17), and the collector of optocoupler (TXD) triode connects 2 pin feeder ears of charge pump integrated circuit (U17);
2 pin signal grounds of 4 pin gang sockets (CZ232) of charge pump integrated circuit (U17), 3 pin of charge pump integrated circuit (U17) connect an end of electric capacity (CC11), 5 pin of charge pump integrated circuit (U17) connect the other end of electric capacity (CC11), 2 pin of charge pump integrated circuit (U17) connect an end of electric capacity (CC12), 2 pin signal grounds of the other end gang socket (CZ232) of electric capacity (CC12), 1 pin of charge pump integrated circuit (U17) connects an end of electric capacity (CB6), 2 pin signal grounds of the other end gang socket (CZ232) of electric capacity (CB6), the positive pole of stabilivolt (DZ1) connects 1 pin of charge pump integrated circuit (U17), 2 pin signal grounds of the negative pole gang socket (CZ232) of stabilivolt (DZ1), the positive pole of diode (D1) connects 1 pin of charge pump integrated circuit (U17), 3 pin of the negative pole gang socket (CZ232) of diode (D1).
8. combination intelligent multimeter according to claim 1, it is characterized in that: described power conversion administrative unit (7) circuit comprises:
DC/DC positive supply (701), DC/DC negative supply (702), LDO power supply (703), power switch (704);
A, 5 pin of the Switching Power Supply integrated circuit (U5) of DC/DC positive supply (701) meet the anodal VDD of battery, insert electric capacity (CB6) between VDD and ground, 2 pin ground connection of integrated circuit (U5), insert inductance (LPP) between 5 pin of integrated circuit (U5) and 1 pin, the positive pole of diode (DP) connects 1 pin of integrated circuit (U5), the negative pole of diode (DP) connects an end of inductance (L4), the other end of inductance (L4) connects an end of inductance (L6), the other end of inductance (L6) connects feeder ear VCC, feeder ear VCC and the indirect electric capacity (CB4) in ground, the negative pole of diode (DP) and the indirect electric capacity (CB5) in ground, insert electric capacity (CB1) between the contact of inductance (L4) and inductance (L6) and ground, insert electric capacity (C23) between 3 pin of the contact of inductance (L4) and inductance (L6) and integrated circuit (U5), insert electric ancestral (R8) between 3 pin of the contact of inductance (L4) and inductance (L6) and integrated circuit (U5), 3 pin of integrated circuit (U5) connect electric ancestral's (R28) a end, electricity ancestral's (R28) the other end connects the drain D of field effect transistor (N9), the source S ground connection of field effect transistor (N9), the Gate utmost point G of field effect transistor (N9) connects 4 pin of integrated circuit (U5), 3 pin of integrated circuit (U5) connect electric ancestral's (R44) a end, electricity ancestral's (R44) the other end connects the drain D of field effect transistor (N10), the source S ground connection of field effect transistor (N10), the Gate utmost point G of field effect transistor (N10) connects the drain D of the field effect transistor (SI3) of power switch (704);
B, 5 pin of the Switching Power Supply integrated circuit (U7) of DC/DC negative supply (702) meet the anodal VDD of battery, 2 pin ground connection of integrated circuit (U7), insert inductance (LPN) between 5 pin of integrated circuit (U7) and 1 pin, 1 pin of integrated circuit (U7) connects an end of electric capacity (CC10), the other end of electric capacity (CC10) connects the positive pole of diode (DN), the minus earth of diode (DN), the positive pole of diode (DN) connects an end of inductance (L8), the other end of inductance (L8) connects an end of inductance (L7), the other end of inductance (L7) connects feeder ear VSS, VSS and the indirect electric capacity (CB10) in ground, insert electric capacity (CB7) between the contact of inductance (L8) and inductance (L7) and ground, inductance (L8) is connected with the anode of integrated circuit (TZ3) with the contact of inductance (L7), inductance (L8) is connected with an end of resistance (R22) with the contact of inductance (L7), the other end of resistance (R22) connects the reference edge of integrated circuit (TZ3), insert resistance (R37) between the reference edge of integrated circuit (TZ3) and ground, the negative electrode of integrated circuit (TZ3) connects an end of resistance (R78), the other end of resistance (R78) connects the anodal VDD of battery, the base stage B of triode (P1) connects the negative electrode of integrated circuit (TZ3), the collector C of triode (P1) connects the anodal VDD of battery, the emitter E of triode (P1) connects 3 pin of integrated circuit (U7), insert resistance (R77) between 3 pin of integrated circuit (U7) and ground, 4 pin of integrated circuit (U7) connect electric ancestral's (R68) a end, 3 pin of another termination voltage stabilizer (U11) of electric ancestral (R68);
3 pin of the LDO integrated circuit (U14) of C, LDO power supply (703) meet the anodal VDD of battery, 1 pin ground connection of LDO integrated circuit (U14), 2 pin of LDO integrated circuit (U14) meet feeder ear 3V3, feeder ear 3V3 and the indirect electric capacity (CC3) in ground, 3 pin of LDO integrated circuit (U11) connect the negative pole of diode (D9), insert electric capacity (CC2) between 3 pin of LDO integrated circuit (U11) and ground, 1 pin ground connection of LDO integrated circuit (U11), 2 pin of LDO integrated circuit (U11) meet feeder ear 5V, 5V and the indirect electric capacity (CC17) in ground;
D, the grid G of the field effect transistor (DTC2) of power switch (704) connects the 80 pin PC12 end of single-chip microcomputer (U10), the source S of field effect transistor (DTC2) connects the 7 pin PC13 end of single-chip microcomputer (U10), the drain D of field effect transistor (DTC2) connects the grid G of field effect transistor (SI3), insert resistance (R73) between the drain D of field effect transistor (DTC2) and feeder ear VCC, the source S of field effect transistor (SI3) connects feeder ear VCC, power end 7 pin of the drain D concatenation operation amplifier (U6) of field effect transistor (SI3), the grid G of field effect transistor (DTC1) connects the 7 pin PC13 end of single-chip microcomputer (U10), the source S of field effect transistor (DTC1) connects the 80 pin PC12 end of single-chip microcomputer (U10), the drain D of field effect transistor (DTC1) connects the grid G of field effect transistor (SI2), insert resistance (R45) between the drain D of field effect transistor (DTC1) and feeder ear VCC, the source S of field effect transistor (SI2) connects feeder ear VCC, power end 4 pin of the drain D concatenation operation amplifier (U9) of field effect transistor (SI2), the grid G of field effect transistor (DTC6) connects the 32 pin PA7 end of single-chip microcomputer (U10), the source S ground connection of field effect transistor (DTC6), the drain D of field effect transistor (DTC6) connects the grid G of field effect transistor (SI1), insert resistance (R75) between the drain D of field effect transistor (DTC6) and feeder ear VCC, the source S of field effect transistor (SI1) connects feeder ear VCC, the drain D of field effect transistor (SI1) connects the positive pole of diode (D3), the grid G of field effect transistor (DTC5) connects the 80 pin PC12 end of single-chip microcomputer (U10), the source S ground connection of field effect transistor (DTC5), the grid G of field effect transistor (DTC4) connects the 7 pin PC13 end of single-chip microcomputer (U10), the source S of field effect transistor (DTC4) connects the drain D of field effect transistor (DTC5), the drain D of field effect transistor (DTC4) connects the grid G of field effect transistor (SI4), insert resistance (R74) between the drain D of field effect transistor (DTC4) and feeder ear VCC, the source S of field effect transistor (SI4) connects feeder ear VCC, the drain D of field effect transistor (SI4) connects the positive pole of diode (D4), the negative pole of diode (D4) connects 5 pin power ends of ultrahigh-speed comparator (U1), the negative pole of diode (D3) connects 2 pin power ends of divider circuit (U12), the positive pole of diode (D8) connects the drain D of field effect transistor (SI3), the negative pole of diode (D8) connects the drain D of field effect transistor (SI2), the positive pole of diode (D9) connects the drain D of field effect transistor (SI3), the negative pole of diode (D9) connects 3 pin of LDO integrated circuit (U11), the positive pole of diode (D5) connects the drain D of field effect transistor (SI2), and the negative pole of diode (D5) connects 16 pin power ends of single-pole double-throw switch (SPDT) (U8).
9. according to claim 1,7 described combination intelligent multimeters, it is characterized in that: single-chip microcomputer U10 is that 32 ARMCortex-M3/M4 digital-to-analogues of ST company are mixed single-chip microcomputer STM32F1 series monolithic such as STM32F103 series, STM32F2 series monolithic such as STM32F205 series, STM32F3 series monolithic such as STM32F303 series, STM32F4 series monolithic such as STM32F405 series and software kit thereof.
10. combination intelligent multimeter according to claim 1, it is characterized in that: U1 is LMV7219, U2 is MCP6S28, MCP6S26, U3 is ICL7555, TLC555, LMC555, U4 are SDI0819, U5, U7 is LM2703, U6 is TLC071, U8 is ISL84053, and U9 is TLV2374, and U10 is STM32F103VCT6, STM32F205VCT6, STM32F303VCT6, STM32F405VCT6, U11, U14 is MCP1700 series LDO, U12 is MB501, and U13 is LM4140, and U15 is ISL84052, U16 is 74LVC161, U17 is MAX828, MAX829, NCP1729, U18 are SGM723, TZ3, TZ4 is LMV431.
CN201310195904XA 2013-05-23 2013-05-23 Combined intelligent universal meter Pending CN103245814A (en)

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CN104090622A (en) * 2014-07-18 2014-10-08 周国文 Digital-analog hybrid circuit reference source with high supply voltage rejection ratio
CN104076858A (en) * 2014-07-18 2014-10-01 周国文 Improved mixed-signal chip
CN104168019B (en) * 2014-07-22 2017-11-24 常州同惠电子股份有限公司 Analog-digital converter and conversion method for digital multimeter
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CN105444816A (en) * 2015-12-31 2016-03-30 天津芯慧鸿业科技发展有限公司 Intelligent-type multipurpose instrument
CN105823917A (en) * 2016-04-25 2016-08-03 优利德科技(中国)有限公司 Method for simultaneously monitoring current and temperature or simultaneously monitoring voltage and current and dual-mode instrument
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CN107070430A (en) * 2017-05-04 2017-08-18 中国石油集团渤海钻探工程有限公司 A kind of analog circuit nursed one's health for underground engineering parameter measurement signal and method
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CN107367629A (en) * 2017-08-23 2017-11-21 漳州市玉山电子制造有限公司 A kind of digital multimeter
CN107367629B (en) * 2017-08-23 2023-02-28 漳州市玉山电子制造有限公司 Digital multimeter
CN110794190A (en) * 2019-11-08 2020-02-14 郭世强 Pointer type voltage and resistance meter adopting integrated operational amplifier

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Application publication date: 20130814