CN103235770A - Solid-state memory based on ultra-wide digital interface - Google Patents
Solid-state memory based on ultra-wide digital interface Download PDFInfo
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- CN103235770A CN103235770A CN201310148692XA CN201310148692A CN103235770A CN 103235770 A CN103235770 A CN 103235770A CN 201310148692X A CN201310148692X A CN 201310148692XA CN 201310148692 A CN201310148692 A CN 201310148692A CN 103235770 A CN103235770 A CN 103235770A
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Abstract
The invention discloses a solid-state memory based on an ultra-wide digital interface. All solid-state memory devices with digital interfaces in the current market are low in transmission rate. A UWDI (ultra-wide digital interface) control module realizes data transmission between a memory device and a host through a UWDI bus. A data distribution module is used for distributing data received by the UWDI control module to a memory medium control module. A solid-state memory medium control module comprises a plurality of solid-state memory medium control channels, wherein each solid-state memory medium control channel corresponds to one solid-state memory medium. A data collection module is used for collecting data flow transmitted by the channels of the solid-state memory medium control module to the UWDI control module. Different from existing standard digital interfaces such as an ATA (advanced technology attachment) and an SCSI (small computer system interface), the UWDI has the advantages of high width, high transmission rate, simple protocol, easiness in implementation and the like.
Description
Technical field
The invention belongs to technical field of data storage, particularly a kind of solid-state memory based on the wide digital interface of carry interface.
Background technology
Along with development of semiconductor, obtained widespread use based on the solid storage device of non-volatile memory device such as SD card, mmc card, SSD etc.Simultaneously, market is also vigorous all the more for the demand of high speed, big capacity solid storage device.Adopt the solid storage device of digital interface such as SD card, mmc card, CF card etc. in the market, its transfer rate is not high, usually within 100MB/s, have the solid storage device of superior performance such as SSD, the PCIe solid-state memory card then all is to adopt high-speed serial bus, needing to carry special-purpose SATA/PCIe controller can use.Also there is not a kind of high speed solid storage device based on the pure digi-tal bus interface in the market.And at some special application field such as data collection, monitoring record etc., then very urgent again for the demand of the high speed storing equipment of pure digi-tal bus.
Summary of the invention
The present invention provides a kind of solid-state memory based on the wide digital interface of carry interface by to the deficiencies in the prior art.
The technical solution adopted in the present invention
:
The present invention includes UWDI bus, UWDI control module, data distribution module, data collection module, microprocessor, solid storage medium control module and solid storage medium.
Described UWDI control module is by the data transmission between UWDI bus realization memory device and main frame.
Described data distribution module is responsible for the data that the UWDI control module receives are distributed to the storage medium control module.
Described solid storage medium control module is made of a plurality of solid storage medium control channels, the corresponding solid storage medium of each solid storage medium control channel.
The data stream that described data collection module is sent each passage of solid storage medium control module is pooled to the UWDI control module.
Described data collection module, UWDI control module, data distribution module, solid storage medium control module are controlled by microprocessor.
The present invention has following advantage: the UWDI that the present invention proposes is a kind of high speed pure digi-tal data transmission interface, is different from standard digital interfaces such as existing ATA, SCSI, and UWDI has high-bit width, high transfer rate, and agreement is succinct, is easy to advantages such as realization.Solid-state storage control scheme based on UWDI can provide the performance index that are higher than common SSD transfer rate, because interface adopts the pure digi-tal transmission mode, need not simulate serial-parallel conversion circuit at a high speed, therefore can simplify the application complexity greatly, reduce application cost, have good ease for use and extendability.The present invention can provide the message transmission rate up to 500MB/s to 2GB/s at pure digi-tal bus interface, fills up the blank of this series products on the market.
Description of drawings
In conjunction with reaching ensuing detailed description with reference to the accompanying drawings, the present invention will be more readily understood, wherein:
Fig. 1 is the present invention program's theory diagram;
Fig. 2 shows the details block diagram of the data distribution module shown in Fig. 1;
Fig. 3 shows the sequential in bus line command cycle in the bus transfer agreement;
Fig. 4 shows the sequential of write cycle of data block in the bus transfer agreement.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the present invention is further detailed explanation below in conjunction with the drawings and specific embodiments.
Detailed description of the present invention mainly presents by program, step, logical block, process or other symbolistic descriptions, the running of the technical scheme among its direct or indirect simulation the present invention.Under those of skill in the art use herein these descriptions and the statement work essence of effectively introducing them to the others skilled in the art in the affiliated field.
Alleged herein " embodiment " or " embodiment " refers to that special characteristic, structure or the characteristic relevant with described embodiment can be contained at least one implementation of the present invention at least.Different local in this manual " in one embodiment " that occur also nonessentially all refer to same embodiment, must not be yet with other embodiment mutually exclusive separately or select embodiment.In addition, represent the sequence of modules in method, process flow diagram or the functional block diagram of one or more embodiment and revocablely refer to any particular order, also be not construed as limiting the invention.
As shown in Figure 1, the present invention program comprises UWDI bus, UWDI bus control module, data distribution module, data collection module, solid storage medium control module, microprocessor module and solid storage medium.
The invention provides the UWDI bus, main frame is communicated by letter with solid storage device by the host-host protocol of UWDI bus definition.The typical data bit wide of UWDI bus is 128bit, because the data bit width of its superelevation, bus clock only need provide very low clock frequency, just can obtain very high transfer rate.For example need the clock frequency of 50MHz can obtain the transfer rate of 800MB/s following of typical data bit wide.
The UWDI control module is by the communication protocol of UWDI bus definition, and namely the UWDI bus protocol is realized the data transmission between memory device and main frame; At up direction, described UWDI control module is responsible for package data to be sent, response protocol order; At down direction, described UWDI control module is responsible for the analysis protocol order, is unpacked the data of receiving.The described definition of UWDI bus protocol 32bit, 64bit, four kinds of data bit width patterns of 128bit, 256bit.
Described data distribution module is made of data buffer and data distributor, adopts rotary-type time division multiplexing mode, the unpacked data stream uniform distribution of UWDI control module down direction is given each passage of storage medium control module.The dispatch ports quantity of described data distributor is determined by the number of channels of solid-state memory control module; The wheel revolution of data distributor is configurable design according to length, and equipping rules is based on the integral multiple of Flash base page size, and its layoutprocedure is controlled by microprocessor.
Described data collection module is made of data buffer and data concentrator, adopts rotary-type time division multiplexing mode.
Described solid storage medium control channel meets Secure Digital Memory Card and MultiMediaCard consensus standard, but carry meets the solid storage medium of above-mentioned consensus standard.
Described microprocessor is made of processor cores, register cell, internal storage location and peripheral hardware.
For ease of describing and understanding, the embodiment of this explanation is that mmc card is example with data bit width 64bit, solid storage medium.
Described UWDI bus definition bus signals and bus transfer agreement.Under express UWDI bus signals definition.
Bus adopts master-slave mode, and all orders are initiated by main frame, the solid storage device response.The UWDI bus is divided into command cycle and data cycle, and command cycle is used for realizing functions such as read/write address setting, bus register visit, additional command, and the data cycle is used for realizing data transmission.
Described UWDI bus control module is used for handling the UWDI bus protocol.At command cycle, the UWDI bus control module is resolved UWDI bus protocol, return state; In the data cycle, the UWDI bus control module receives the packet of main frame transmission or the packet of sending to the main frame transmitting apparatus.
Described UWDI bus line command cycle detailed process is: main frame pull-up Control signal, the while total output command of data and parameter, the UWDI control module is receiving that the next Clock after the Control signal is drawn high drags down BSYn, notifies the microprocessor processes bus line command simultaneously.Again draw high BSYn after microprocessor processes is finished, command cycle is finished.Described UWDI bus line command can be data transmission, data reception, bus register visit etc., and parameter can be information such as data address, register address.Figure 3 shows that the sequential chart example of command cycle.
The described UWDI bus data cycle is subdivided into data transmitting period and data receiving cycle.
In data transmitting period, main frame pull-up DValid signal begins to send data to be transmitted simultaneously.The UWDI control module receives that the DValid signal is to begin to unpack and receive data behind the height, the data stream of notifying microprocessor processes to receive simultaneously.The data stream that receives enters the data distribution module, at first enters data buffer, cushions the back and is shunted to each port wheel commentaries on classics of solid storage medium control module with the 8KB data length by rotary-type data distribution device, referring to Fig. 2.Microprocessor sends MMC to the storage medium control module and writes instruction after receiving the things request of UWDI control module, and the data stream that enters the storage medium control module is write mmc card.The UWDI control module is receiving that the DValid signal is that next cycle behind the height drags down BSYn, and pending data receives, and after mmc card write and finishes, microprocessor was drawn high BSYn again, and data transmitting period is finished.Figure 4 shows that the sequential chart example of data transmitting period.
Also pull-up RWn signal when the similar substantially difference of the detailed process of data receiving cycle and data transmitting period is main frame pull-up DValid signal, and data bus direction is opposite with data transmitting period, just gives unnecessary details no longer one by one here.
Above the present invention has been carried out enough detailed description with certain singularity.Under those of ordinary skill in the field should be appreciated that the description among the embodiment only is exemplary, under the prerequisite that does not depart from true spirit of the present invention and scope, make change and all should belong to protection scope of the present invention.The present invention's scope required for protection is limited by described claims, rather than limited by the foregoing description among the embodiment.
Claims (8)
1. based on the solid-state memory at the wide digital interface of carry interface, comprise UWDI bus, UWDI control module, the data distribution module, the data collection module, microprocessor, solid storage medium control module and solid storage medium is characterized in that:
Described UWDI control module is by the data transmission between UWDI bus realization memory device and main frame;
Described data distribution module is responsible for the data that the UWDI control module receives are distributed to the storage medium control module;
Described solid storage medium control module is made of a plurality of solid storage medium control channels, the corresponding solid storage medium of each solid storage medium control channel;
The data stream that described data collection module is sent each passage of solid storage medium control module is pooled to the UWDI control module;
Described data collection module, UWDI control module, data distribution module, solid storage medium control module are controlled by microprocessor.
2. the described solid-state memory of claim 1 is characterized in that: the UWDI control module is by the communication protocol of UWDI bus definition, and namely the UWDI bus protocol is realized the data transmission between memory device and main frame; At up direction, described UWDI control module is responsible for package data to be sent, response protocol order; At down direction, described UWDI control module is responsible for the analysis protocol order, is unpacked the data of receiving.
3. the described solid-state memory of claim 2 is characterized in that: the described definition of UWDI bus protocol 32bit, 64bit, four kinds of data bit width patterns of 128bit, 256bit.
4. the described solid-state memory of claim 1, it is characterized in that: described data distribution module is made of data buffer and data distributor, adopt rotary-type time division multiplexing mode, the unpacked data stream uniform distribution of UWDI control module down direction is given each passage of storage medium control module.
5. the described solid-state memory of claim 4 is characterized in that: the dispatch ports quantity of described data distributor is determined by the number of channels of solid-state memory control module; The wheel revolution of data distributor is configurable design according to length, and equipping rules is based on the integral multiple of Flash base page size, and its layoutprocedure is controlled by microprocessor.
6. the described solid-state memory of claim 1, it is characterized in that: described data collection module is made of data buffer and data concentrator, adopts rotary-type time division multiplexing mode.
7. the described solid-state memory of claim 1, it is characterized in that: described solid storage medium control channel meets Secure Digital Memory Card and MultiMediaCard consensus standard, but carry meets the solid storage medium of above-mentioned consensus standard.
8. the described solid-state memory of claim 1, it is characterized in that: described microprocessor is made of processor cores, register cell, internal storage location and peripheral hardware.
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Cited By (1)
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