CN103208428B - Base plate for packaging and method for making thereof - Google Patents
Base plate for packaging and method for making thereof Download PDFInfo
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- CN103208428B CN103208428B CN201210008456.3A CN201210008456A CN103208428B CN 103208428 B CN103208428 B CN 103208428B CN 201210008456 A CN201210008456 A CN 201210008456A CN 103208428 B CN103208428 B CN 103208428B
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- insulating protective
- protective layer
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Abstract
A kind of base plate for packaging and method for making thereof, the surface that the method for making of this base plate for packaging is included in a substrate body forms the line layer with electric contact mat and external connection portion, then form the first insulating protective layer in this substrate body, and expose electric contact mat and external connection portion; In this external connection portion, be electrically connected electroplanting device, form surface-treated layer with plating on this electric contact mat; Remove this external connection portion; And form the second insulating protective layer on the exposed surface and the first insulating protective layer of this substrate body, and expose this electric contact mat.Insulating protective layer is formed by twice, to keep the planarization on this insulating protective layer surface, and the reliability of improving product.
Description
Technical field
The present invention relates to a kind of base plate for packaging and method for making thereof, espespecially a kind of base plate for packaging in order to bearing semiconductor chip and method for making thereof.
Background technology
Along with electronic product is towards multi-functional, high performance development, semiconductor package correspondence develops different encapsulation kenels, and such as Flip-Chip Using (FlipChipPackage), routing engage (WireBond) etc.In current art, the surface of semiconductor integrated circuit (IC) chip is configured with electronic pads (electronicpad), and base plate for packaging also has corresponding electric contact mat, can solder bump (chip upside-down mounting type) or gold thread (routing type) between this chip and base plate for packaging, this chip is electrically connected on this base plate for packaging.The electric contact mat of general base plate for packaging can first form surface-treated layer in case oxidation, then carry out follow-up routing or controlled collapsible chip connec-tion.
Refer to Figure 1A and Figure 1B, it is the method for making of existing base plate for packaging 1.As shown in Figure 1A, one is provided to have relative first surface 10a and the substrate body 10 of second surface 10b, first and second surperficial 10a of this substrate body 10,10b has line layer 12, and in this substrate body 10, forming the conductive through hole 120 being electrically connected this line layer 12, this line layer 12 has multiple electric contact mat 122 and an external connection portion 121 again.
Then, carry out Patternized technique, in first and second surperficial 10a of this substrate body 10,10b upper formation photoresistance (not shown), and expose outside this electric contact mat 122 and circumferential wire road surfaces thereof, then in this external connection portion 121, be electrically connected electroplanting device (not shown), to borrow the surperficial 10a of this conductive through hole 120 conducting this first and second, line layer 12 on 10b, and plating forms surface-treated layer 14 on this electric contact mat 122.
Then, in this substrate body 10 and this line layer 12, form insulating protective layer 13, and this insulating protective layer 13 is formed with multiple perforate 130, makes that this electric contact mat 122 is corresponding with external connection portion 121 exposes to respectively this perforate 130.
As shown in Figure 1B, this external connection portion 121 is removed.In subsequent encapsulating process, semiconductor chip (not shown) can be set on the insulating protective layer 13 of the wherein side of this base plate for packaging 1, and this electric contact mat 122 is electrically connected semiconductor chip with flip-chip or routing mode, then form packing colloid (not shown) with coated semiconductor chip on this insulating protective layer 13; The electric contact mat 122 of the opposite side of this base plate for packaging 1 then plants multiple soldered ball (not shown) to be electrically connected the electronic installation (not shown) as circuit board.
When carrying out implanting soldered ball or controlled collapsible chip connec-tion, usually, must be pre-formed pre-solder bump on the electric contact mat 122 (can be and plant ball pad or flip-chip weld pad) of this base plate for packaging 1, and be enough under reflow (solderreflow) temperature conditions making this pre-solder bump melting, by pre-solder bump reflow to corresponding metal coupling, thus formation scolding tin connects, to realize being coupled of base plate for packaging and other assembly, guarantee the Integrity And Reliability of the electric connection of base plate for packaging.
But; in the method for making of existing base plate for packaging 1; after removing this external connection portion 121, the surface of this insulating protective layer 13 is made to occur depression h, when in subsequent technique; when chip is located on this insulating protective layer 13; stress will concentrate on around this depression h, causes this insulating protective layer 13 place around this depression h to occur breaking, thus affects the reliability of product; time serious, product needs to cancel.
In addition, when forming packing colloid in subsequent technique, glue material easily flow in this depression h, thus the flow direction of this glue material uncontrollable, causes the structure of this packing colloid to occur anomaly.
Moreover; in the method for making of existing base plate for packaging 1; because first forming surface-treated layer 14; form insulating protective layer 13 again; so insulating protective layer 13 can cover the part material of this surface-treated layer 14, cause this insulating protective layer 13 because of with this surface-treated layer 14 in conjunction with bad and be easy to this surface-treated layer 14 place's delamination.
Therefore, how to overcome above-mentioned variety of problems of the prior art, become the problem of desiring most ardently solution at present in fact.
Summary of the invention
In view of the disappearance of above-mentioned prior art, main purpose of the present invention is to provide a kind of base plate for packaging and method for making thereof, keeps the planarization on this insulating protective layer surface, and the reliability of improving product.
The method for making of base plate for packaging provided by the present invention is for first to form insulating protective layer; form surface-treated layer again; then this external connection portion is removed; another insulating protective layer is formed again on the exposed surface and insulating protective layer of this substrate body; and this another insulating protective layer is formed should another insulating protective layer perforate of perforate of insulating protective layer, makes this electric contact mat expose to the perforate of two connections.
The present invention provides a kind of base plate for packaging according to aforesaid method for making, and wherein, the aperture of this another insulating protective layer perforate is greater than the aperture of this insulating protective layer perforate.
As from the foregoing; in base plate for packaging of the present invention and method for making thereof; after removing this external connection portion, then form another insulating protective layer, to fill and lead up this insulating protective layer depression in the surface; when in subsequent technique; when chip is located on this another insulating protective layer, stress can not concentrate on around depression originally, and this insulating protective layer thus can be avoided to occur breaking; so can improving product reliability, and product can be avoided to cancel.
In addition, when forming packing colloid in subsequent technique, glue material can not flow in this depression, thus effectively can control the flow direction of glue material, occurs anomaly to avoid the structure of packing colloid.
Moreover method for making of the present invention, first forms insulating protective layer, then forms surface-treated layer, so this insulating protective layer can not cover the part material of this surface-treated layer, the problem as insulation protection delamination layer of the prior art can be avoided.
Accompanying drawing explanation
Figure 1A to Figure 1B is the cross-sectional schematic of the method for making of existing base plate for packaging; And
Fig. 2 A to Fig. 2 F is the cross-sectional schematic of the method for making of base plate for packaging of the present invention.
Primary clustering symbol description
1,2 base plate for packaging
10,20 substrate body
10a, 20a first surface
10b, 20b second surface
12 line layers
120,220 conductive through holes
121,221 external connection portion
122 electric contact mats
13 insulating protective layers
130 perforates
14,24 surface-treated layers
200 through holes
201 the first metal layers
202 second metal levels
203 conductive layers
210 consent materials
22a first line layer
22b second line layer
222a first electric contact mat
222b second electric contact mat
23a, 23b first insulating protective layer
230a, 230b, 231b first perforate
25a, 25b second insulating protective layer
250a, 250b second perforate
D, r aperture
H caves in
S region.
Embodiment
By particular specific embodiment, embodiments of the present invention are described below, those skilled in the art can understand other advantage of the present invention and effect easily by content disclosed in the present specification.
Notice, structure, ratio, size etc. that this specification institute accompanying drawings illustrates, content all only in order to coordinate specification to disclose, for understanding and the reading of those skilled in the art, and be not used to limit the enforceable qualifications of the present invention, so the not technical essential meaning of tool, the adjustment of the modification of any structure, the change of proportionate relationship or size, do not affecting under effect that the present invention can produce and the object that can reach, still all should drop on disclosed technology contents and obtain in the scope that can contain.Meanwhile, quote in this specification as " on " and term such as " ", be also only understanding of being convenient to describe, and be not used to limit the enforceable scope of the present invention, the change of its relativeness or adjustment, under changing technology contents without essence, when being also considered as the enforceable category of the present invention.
Refer to Fig. 2 A to Fig. 2 F, it is the cross-sectional schematic of the method for making of base plate for packaging 2 of the present invention.
As shown in Figure 2 A, first, one is provided to have relative first surface 20a and the substrate body 20 of second surface 20b, first and second surperficial 20a of this substrate body 20,20b has a first metal layer 201, then form multiple through hole 200 running through this substrate body 20.
In the present embodiment, this substrate body 20 is copper clad laminate (Coppercladlaminate, CCL).
As shown in Figure 2 B, a conductive layer 203 (seedlayer) is formed on this first metal layer 201 with the hole wall of this through hole 200, using as the current conduction path needed for aftermentioned electroplating metal material, and this conductive layer 203 can be made up of electro-coppering, metal, alloy or precipitation number layer metal level or conducting polymer composite.
Then, on this conductive layer 203, electroplate formation one second metal level 202, then insert consent material 210 in this through hole 200.Of a great variety about consent material 210, such as conducting resinl, ink etc.Again, in other embodiment, also directly can plate full metal in this through hole 200, just not need to insert consent material again.
In addition, the material forming this second metal level 202 is copper.
As shown in Figure 2 C, on the first surface 20a and second surface 20b of this substrate body 20, etching forms first and second line layer 22a respectively, 22b, and in this substrate body 20, forms this first and second line layer of electric connection 22a, the conductive through hole 220 of 22b.
In the present embodiment, this first and second line layer 22a, 22b have multiple first and second electric contact mat 222a, 222b, and this second line layer 22b has an external connection portion 221, this external connection portion 221 is mainly as the current conduction path needed for follow-up electroplating metal material.
In addition, about the mode of the Patternized technique making circuit is various, the technique as shown in Fig. 2 B to Fig. 2 C is not limited to.
As shown in Figure 2 D, by the method for image transfer or spray printing pattern, in part surface and this first and second line layer 22a of this substrate body 20; 22b upper formation first insulating protective layer 23a; 23b, and this first insulating protective layer 23a, 23b are formed with multiple first perforate 230a; 230b; 231b, makes this first and second electric contact mat 222a, and 222b is corresponding with external connection portion 221 exposes to respectively this first perforate 230a; 230b, 231b.
Then, in this external connection portion 221, electroplanting device (not shown) is electrically connected, to form surface-treated layer 24 in the upper plating of this first and second electric contact mat 222a, 222b.
In the present embodiment, the material forming this surface-treated layer 24 is nickel/gold (Ni/Au), changes nickel palladium leaching gold (ElectrolessNickel/ElectrolessPalladium/ImmersionGold, ENEPIG) the wherein one of gold (DirectImmersionGold, DIG) and is directly soaked.
As shown in Figure 2 E, remove this external connection portion 221, to expose outside the subregion S of the second surface 20b of this substrate body 20.
As shown in Figure 2 F; by the method for image transfer or spray printing pattern, in exposed area S and the first insulating protective layer 23a, the 23b upper formation second insulating protective layer 25a of the second surface 20b of this substrate body 20; 25b; and this second insulating protective layer 25a, 25b are formed should multiple second perforate 250a of the first perforate 230a, 230b; 250b; make this first and second electric contact mat 222a, 222b exposes to this second perforate 250a, 250b.
In the present embodiment, the aperture d of this second perforate 250a, 250b is greater than this first perforate 230a, the aperture r of 230b, and this first insulating protective layer 23a, 23b and the second insulating protective layer 25a, 25b is as welding resisting layer.
The present invention also provides a kind of base plate for packaging 2; comprise: first and second line layer 22a on a substrate body 20 with relative first surface 20a and second surface 20b, the first surface 20a being formed at this substrate body 20 and second surface 20b; 22b, be formed at this substrate body 20 and this first and second line layer 22a; the first insulating protective layer 23a on 22b; 23b, be formed at this first and second line layer 22a; surface-treated layer 24 on 22b and be formed at this first insulating protective layer 23a; the second insulating protective layer 25a on 23b, 25b.
In described substrate body 20, there is multiple conductive through hole 220, to be electrically connected this first and second line layer 22a, 22b.
Described first and second line layer 22a, 22b have multiple first and second electric contact mat 222a, 222b.
The first described insulating protective layer 23a, 23b are formed with multiple first perforate 230a, 230b, make this first and second electric contact mat 222a, and 222b correspondence exposes to respectively this first perforate 230a, 230b.
Described surface-treated layer 24 is formed at this first and second electric contact mat 222a, on 222b.
The second described insulating protective layer 25b is also formed at the second surface 20b of this substrate body 20; and this second insulating protective layer 25a; 25b is formed should the first perforate 230a; multiple second perforate 250a of 230b; 250b; make this first and second electric contact mat 222a, 222b exposes to this second perforate 250a, 250b.The aperture d of this second perforate 250a, 250b is greater than this first perforate 230a again, the aperture r of 230b.
Base plate for packaging 2 of the present invention and method for making thereof; by formation second insulating protective layer 25b in the exposed area S of this substrate body 20; make the surface of the insulating protective layer above the second surface 20b of this substrate body 20 for smooth; with when putting chip (not shown); stress can not concentrate on the first insulating protective layer 23b around substrate body 20 exposed area S, so this second insulating protective layer 25b can not break.
In addition, when forming packing colloid in subsequent technique, because the surface of this second insulating protective layer 25a, 25b is smooth, and the flow direction of glue material can effectively be controlled, so the structure of packing colloid can be avoided to occur anomaly.
Moreover, by first forming the first insulating protective layer 23a, 23b; form surface-treated layer 24 again, so this first insulating protective layer 23a, 23b can not cover the part material of this surface-treated layer 24; thus this first insulating protective layer 23a, 23b does not have the problem that delamination occurs because adhesion is bad.
In addition, by this second perforate 250a, the aperture d of 250b is greater than this first perforate 230a, the aperture r of 230b, to increase the exposed area of perforate hole wall, thus the solder bump (not shown) in increase subsequent technique and the contact area between this perforate hole wall, to be conducive to the adhesion promoting solder bump.
Above-described embodiment in order to illustrative principle of the present invention and effect thereof, but not for limiting the present invention.Any those skilled in the art all without prejudice under spirit of the present invention and category, can modify to above-described embodiment.Therefore the scope of the present invention, should listed by claims.
Claims (9)
1. a method for making for base plate for packaging, it comprises:
On the surface of a substrate body, form line layer, and this line layer have multiple electric contact mat and external connection portion;
On the part surface and this line layer of this substrate body, form the first insulating protective layer, and this first insulating protective layer is formed with multiple first perforate, makes this electric contact mat and external connection portion expose to this first perforate;
In this external connection portion, be electrically connected electroplanting device, form surface-treated layer with plating on this electric contact mat;
Remove this external connection portion, to expose outside the part surface of this substrate body; And
On the exposed surface and the first insulating protective layer of this substrate body, form the second insulating protective layer, and this second insulating protective layer is formed with to should multiple second perforates of the first perforate, makes this electric contact mat expose to this first and second perforate.
2. the method for making of base plate for packaging according to claim 1, is characterized in that, this substrate body has relative first surface and second surface, and on this line layer first surface of being formed at this substrate body respectively and second surface.
3. the method for making of base plate for packaging according to claim 2, is characterized in that, this substrate body is formed with multiple conductive through hole simultaneously, to be electrically connected the line layer on first and second surface of this substrate body.
4. the method for making of base plate for packaging according to claim 1, is characterized in that, the aperture of this second perforate is greater than the aperture of this first perforate.
5. the method for making of base plate for packaging according to claim 1, is characterized in that, is to form this first and second insulating protective layer with the method for image transfer or spray printing pattern.
6. a base plate for packaging, it comprises:
Substrate body;
Line layer, is formed on the part surface of this substrate body, and has multiple electric contact mat;
First insulating protective layer, on the part surface being formed at this substrate body and this line layer, and this first insulating protective layer is formed with multiple first perforate on this line layer, makes this electric contact mat expose to this first perforate;
Surface-treated layer, is formed on this electric contact mat and is not formed on this first insulating protective layer; And
Second insulating protective layer; to be formed on the part surface of this substrate body and the first insulating protective layer and not to be formed on this surface-treated layer; and this second insulating protective layer is formed should multiple second perforates of the first perforate; make this electric contact mat expose to this first and second perforate, and the aperture of this second perforate is greater than the aperture of this first perforate.
7. base plate for packaging according to claim 6, is characterized in that, this substrate body has relative first surface and second surface, and on this line layer first surface of being formed at this substrate body respectively and second surface.
8. base plate for packaging according to claim 7, is characterized in that, has multiple conductive through hole in this substrate body, to be electrically connected the line layer on first and second surface of this substrate body.
9. base plate for packaging according to claim 8, is characterized in that, has consent material in this conductive through hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210008456.3A CN103208428B (en) | 2012-01-12 | 2012-01-12 | Base plate for packaging and method for making thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210008456.3A CN103208428B (en) | 2012-01-12 | 2012-01-12 | Base plate for packaging and method for making thereof |
Publications (2)
| Publication Number | Publication Date |
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| CN103208428A CN103208428A (en) | 2013-07-17 |
| CN103208428B true CN103208428B (en) | 2016-01-20 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201210008456.3A Active CN103208428B (en) | 2012-01-12 | 2012-01-12 | Base plate for packaging and method for making thereof |
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Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104201156A (en) * | 2014-08-08 | 2014-12-10 | 天水华天科技股份有限公司 | Substrate based bumped flip chip CSP (Chip Scale Package) package part, substrate and manufacturing method |
| CN106817835A (en) * | 2015-11-30 | 2017-06-09 | 碁鼎科技秦皇岛有限公司 | Circuit board and preparation method thereof |
| CN111430310A (en) * | 2020-04-02 | 2020-07-17 | 华天科技（昆山）电子有限公司 | System-in-chip integrated packaging structure, manufacturing method thereof and three-dimensional stacked device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1678167A (en) * | 2004-03-31 | 2005-10-05 | 全懋精密科技股份有限公司 | Multi-layer circuit board and mfg. method |
| TW200627560A (en) * | 2005-01-19 | 2006-08-01 | Siliconware Precision Industries Co Ltd | Semiconductor element with enhanced under bump metallurgy structure and fabrication method thereof |
-
2012
- 2012-01-12 CN CN201210008456.3A patent/CN103208428B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1678167A (en) * | 2004-03-31 | 2005-10-05 | 全懋精密科技股份有限公司 | Multi-layer circuit board and mfg. method |
| TW200627560A (en) * | 2005-01-19 | 2006-08-01 | Siliconware Precision Industries Co Ltd | Semiconductor element with enhanced under bump metallurgy structure and fabrication method thereof |
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| CN103208428A (en) | 2013-07-17 |
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