CN103206990B - Capacitive electromagnetic flowmeter - Google Patents
Capacitive electromagnetic flowmeter Download PDFInfo
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- CN103206990B CN103206990B CN201310130986.XA CN201310130986A CN103206990B CN 103206990 B CN103206990 B CN 103206990B CN 201310130986 A CN201310130986 A CN 201310130986A CN 103206990 B CN103206990 B CN 103206990B
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Abstract
The invention relates to a capacitive electromagnetic flowmeter. A sensor of the capacitive electromagnetic flowmeter comprises a high-dielectric-constant industrial ceramic liner and a non-contact plated metal detecting sheet electrode. The sensor is provided with two opposite excitation coils serially connected to excite the inside of the sensor. The metal detecting electrode and a metal shielding electrode are connected to input and output ends of an operational preamplifier respectively to allow for equipotential shielding. A timing control circuit controls a switch of a full-bridge inverter circuit and an analog switch of a flow signal processing circuit according to logic signals of exciting current so as to control the exciting current in the coils and process the flow signals. The full-bridge inverter circuit is capable of enhancing the exciting current to increase the signal-to-noise ratio of the flow signals while inhibiting differential disturbing influence. The full-bridge inverter circuit is used with the timing control circuit to centrally control the power switch of the inverter circuit and the analog switch of the flow signal processing circuit, differential disturbance in the flow signals are removed accurately, and reliable detection on fluid flow is realized finally.
Description
Technical field
The present invention relates to a kind of electromagnetic flowmeter, particularly relate to a kind of capacitive electromagnetic flow meter had compared with high s/n ratio.
Background technology
Direct supply provides square wave exciting current on coil by full bridge inverter, forms electromagnetic field, and can produce induction electromotive force at the fluid cutting magnetic line measuring Bottomhole pressure, its size is directly proportional with rate of flow of fluid.Because exciting current is alternation, the induced potential of generation is also alternation, and its frequency is identical with the frequency of exciting curent.A pair plating sheet metal electrode is located at insulating ceramics measuring tube outer wall, battery lead plate and fluid form the electric capacity using measuring tube tube wall as medium, electric capacity is utilized to be coupled on detecting electrode to alternating signal coupling principle by induced potential, by detecting the voltage difference of two pole plates, just the signal relevant to rate of flow of fluid can be obtained; The flow signal produced due to capacitive electromagnetic flow meter sensor is very weak, general in μ V level, and electrode is very little with the coupling capacitor value formed between detected fluid, be only tens of pF, signal internal resistance is made to become very large, coupling traffic signal is also very weak, and coupling signal in noise stronger and numerous and diverse; The intensity of flow signal with wherein comprise noise and the parameter such as exciting current, frequency has direct or indirect relation.
The amplitude noise of the exciting current size of field circuit, frequency and flow signal is closely related, first, capacitance type sensor obtains flow signal by capacitive coupling, and the frequency of exciting current contributes to reducing sensor internal resistance, improve signal intensity, also contribute to reducing hydrodynamic noise simultaneously; Secondly flow signal is that fluid cutting magnetic line produced, and increases exciting current and will increase excitation field, improve flow signal; Last Alternating Current Excitation magnetic field will produce induced potential in input loop, and in flow signal, finally forms differential interference and disturb in the same way, and accelerating change of current transient process is reduce to disturb comparatively effective method.When adopting square wave current excitation, the dynamic perfromance of exciting current can be described as
wherein V
efor field voltage, R
eqfor circuit equivalent resistance, L
coilfor field coil inductance.Improving field voltage is improve exciting current amplitude, improves exciting current frequency, shortens the effective ways that excitation process commutation time finally improves signal to noise ratio (S/N ratio).
As shown in Figure 1, Figure 2 or shown in Fig. 3, electromagnetic flowmeter adopt sequential control circuit 09 by optocoupler transmission logic level to full bridge driving circuit 08 for the field effect transistor in full bridge inverter provides an enough voltage, in flow signal treatment circuit, analog switch controls then to adopt logical circuit 07 and amplifying circuit 06 in addition; Tradition current source for electromagnetic flow meter 05 controls size of current, adopts Q1 ~ Q4 to control exciting current direction.Current source function is realized owing to adopting amplifier, field effect transistor and sampling resistor, the parameters such as the operating voltage of its amplifier, the power consumption of field effect transistor limit the raising of field voltage and exciting current, this circuit generally adopts the field voltage being no more than 36V, the exciting current exported is no more than 0.15A, excitation frequency is generally below 40Hz, capacitive electromagnetic flow meter exciting current can not be improved further, improve excitation frequency to disturb with reduction differential, disturb in the same way, constrain the raising of sensor signal to noise ratio (S/N ratio).
Summary of the invention
The object of the present invention is to provide a kind of impact that can overcome very noisy, improve signal to noise ratio (S/N ratio), faint flow signal is detected, and converts the voltage signal with fluctuations in discharge to, realize the capacitive electromagnetic flow meter of the measurement of fluid flow.
By the following technical solutions, this capacitive electromagnetic flow meter comprises capacitance type sensor, preposition discharge circuit, flow signal treatment circuit, full bridge inverter, full bridge driving circuit, the first exciting current feedback circuit, the second exciting current feedback circuit and sequential control circuit in the present invention;
Described capacitance type sensor comprises backing layer, described backing layer outer wall is evenly provided with the first detecting electrode, the second detecting electrode, the first field coil and the second field coil, the first described detecting electrode and the second detecting electrode are oppositely arranged, the first described field coil and the second field coil are oppositely arranged, the first described detecting electrode and the second detecting electrode outside are respectively arranged with the first metallic shield electrode and the second metallic shield electrode, the first described field coil and the series connection of the second field coil;
Described preposition discharge circuit comprises the first preamplifier and the second preamplifier, the in-phase input end of the first preamplifier is connected with the first detecting electrode, and the inverting input of the first preamplifier is connected with the first guarded electrode respectively with output terminal; The in-phase input end of the second described preamplifier is connected with the second detecting electrode, the inverting input of the second described preamplifier and output terminal respectively with secondary shielding Electrode connection;
Described flow signal treatment circuit comprises first instrument amplifier, first operational amplifier, second operational amplifier, first resistance, second resistance, 3rd variable resistor, 4th resistance, 5th resistance, second electric capacity, 3rd electric capacity, 4th electric capacity, first analog switch, second analog switch, the in-phase input end of described first instrument amplifier is connected with the output terminal of the first preamplifier, the inverting input of described first instrument amplifier is connected with the output terminal of the second preamplifier, the output terminal of first instrument amplifier is connected with one end of the second electric capacity, the other end of the second electric capacity is connected one end of the first analog switch common port and the second resistance respectively with one end of the first resistance, the other end ground connection of the first resistance, the other end of the second resistance and the 3rd variable resistor, the output terminal of the first operational amplifier is connected to after 4th resistant series, the normally closed contact ground connection of the first described analog switch, the normally opened contact of the first analog switch connects the in-phase input end of the first operational amplifier, described the 3rd variable-resistance adjustable end connects the inverting input of the first operational amplifier, the output terminal of the first described operational amplifier connects the common port of the second analog switch, the normally closed contact of the second described analog switch is by the 3rd capacity earth, the normally opened contact of the second analog switch connects one end of the 5th resistance, the other end of the 5th resistance connects one end of the 4th electric capacity and the in-phase input end of the second operational amplifier respectively, the other end ground connection of the 4th electric capacity, the inverting input of the second described operational amplifier is connected with output terminal,
Described full bridge inverter comprises the first field effect transistor, the second field effect transistor, the 3rd field effect transistor, the 4th field effect transistor, sampling resistor, the first electric capacity and direct supply, the drain electrode of the first described field effect transistor is connected with the first field coil respectively with the source electrode of the 3rd field effect transistor, the drain electrode of the second described field effect transistor is connected with one end of sampling resistor respectively with the source electrode of the 4th field effect transistor, the other end of described sampling resistor and the second field coil common ground, the positive pole of described direct supply connects one end of the source electrode of the first field effect transistor, the source electrode of the second field effect transistor and the first electric capacity respectively, and the negative pole of described direct supply connects the drain electrode of the 3rd field effect transistor, the drain electrode of the 4th field effect transistor and the other end of the first electric capacity respectively, the grid of the first described field effect transistor, the grid of the second field effect transistor, the grid of the 3rd field effect transistor, the grid of the 4th field effect transistor connects full bridge driving circuit respectively, the drive singal that sequential control circuit exports is amplified to the voltage in full bridge inverter required for each field effect transistor by described full bridge driving circuit, and the voltage transitions provided by direct supply is alternating rectangular current, and input to sensor excitation coil, the direct supply of described full bridge inverter alternately carries out positive current direction excitation and negative current direction excitation to the field coil of capacitance type sensor according to predetermined excitation frequency,
The first described exciting current feedback circuit comprises the first operational amplification circuit and the first antilogical hysteresis circuitry, the first described operational amplification circuit comprises the 3rd operational amplifier, 6th resistance, 7th resistance, 8th resistance and the 9th resistance, one end of the 6th described resistance connects one end of sampling resistor, the other end and one end of the 9th resistance of 6th resistance are connected the inverting input of the 3rd operational amplifier respectively, one end of the 7th described resistance connects the other end of sampling resistor, the other end and one end of the 8th resistance of 7th resistance are connected the in-phase input end of the 3rd operational amplifier respectively, 8th resistance other end ground connection, the other end of the 9th described resistance is connected with the output terminal of the 3rd operational amplifier, the first described antilogical hysteresis circuitry comprises four-operational amplifier, the tenth resistance, the 11 resistance, the 12 resistance, one end of the tenth described resistance connects reference power supply, the other end of the tenth resistance, one end of the 11 resistance and one end of the 12 resistance are connected to the in-phase input end of four-operational amplifier respectively, the other end ground connection of the 11 described resistance, the other end of the 12 described resistance connects the output terminal of four-operational amplifier, and the inverting input of described four-operational amplifier connects the output terminal of the 3rd operational amplifier,
The second described exciting current feedback circuit comprises the second operational amplification circuit and the second antilogical hysteresis circuitry, the second described operational amplification circuit comprises the 5th operational amplifier, 13 resistance, 14 resistance, 15 resistance and the 16 resistance, one end of the 13 described resistance connects one end of sampling resistor, the other end and one end of the 16 resistance of 13 resistance are connected the inverting input of the 5th operational amplifier respectively, one end of the 14 described resistance connects the other end of sampling resistor, the other end and one end of the 15 resistance of 14 resistance are connected the in-phase input end of the 5th operational amplifier respectively, 15 resistance other end ground connection, the other end of the 16 described resistance is connected with the output terminal of the 5th operational amplifier, the second described antilogical hysteresis circuitry comprises the 6th operational amplifier, 17 resistance, 18 resistance, 19 resistance, one end of the 17 described resistance connects reference power supply, the other end of the 17 resistance, one end of 18 resistance and one end of the 19 resistance are connected to the in-phase input end of the 6th operational amplifier respectively, the other end ground connection of the 18 described resistance, the other end of the 19 described resistance connects the output terminal of the 6th operational amplifier, the inverting input of the 6th described operational amplifier connects the output terminal of the 5th operational amplifier,
Described sequential control circuit comprises CPLD and crystal oscillator, described CPLD is connected with crystal oscillator, described crystal oscillator provides clock reference for programmable logic device (PLD), described CPLD forms drive singal by computing and delay, and by optocoupler output logic level to full bridge driving circuit, described sequential control circuit judges the current status in field coil according to the first exciting current feedback circuit and the second exciting current feedback circuit, and control the on off state of each field effect transistor in full bridge inverter, the control pin of described CPLD connects the first analog switch and the second analog switch respectively, described sequential control circuit calculates and controls each analog switch control signal in flow signal processing circuit.
The path order of the exciting current process of described direct supply is the first field effect transistor, the first field coil, the second field coil, sampling resistor and the 4th field effect transistor, and this path is positive current direction excitation path; The path order of the exciting current process of described direct supply is the second field effect transistor, sampling resistor, the second field coil, the first field coil and the 3rd field effect transistor, and this path is negative current direction excitation path.
When the exciting current of direct supply needs to carry out excitation by positive current direction excitation path to field coil, and the exciting current direction in current circuit is along positive current direction excitation path, and described exciting current feedback circuit output voltage value is less than forward predetermined excitation rising saltus step threshold voltage, described sequential control circuit is after predetermined delay sequential, control the first field effect transistor and the 4th field effect transistor is conducting state, second field effect transistor and the 3rd field effect transistor are cut-off state, now full bridge inverter enters the first forward constant current state.
When the exciting current of direct supply needs to carry out excitation by positive current direction excitation path to field coil, and the exciting current direction in current circuit is along positive current direction excitation path, and described exciting current feedback circuit output voltage value is greater than forward predetermined excitation decline saltus step threshold voltage, described sequential control circuit is after predetermined delay sequential, control the 3rd field effect transistor and the 4th field effect transistor is conducting state, first field effect transistor and the second field effect transistor are cut-off state, now full bridge inverter enters the second forward constant current state.
When full bridge inverter enters the second forward constant current state, described sequential control circuit is after the first predetermined delay sequential, control the first analog switch common port be connected with normally opened contact and disconnect with normally closed contact, flow signal enters the first operational amplifier, described sequential control circuit is after the second predetermined delay sequential, control the first analog switch common port disconnect with normally opened contact and be connected with normally closed contact, wherein before the second predetermined delay sequential, conducting or the cut-off state of each described field effect transistor do not change.
When the exciting current of direct supply needs to carry out excitation by positive current direction excitation path to field coil, and the exciting current direction in current circuit along negative current direction excitation path time, described sequential control circuit is after predetermined delay sequential, control the first field effect transistor and the 4th field effect transistor is conducting state, second field effect transistor and the 3rd field effect transistor are cut-off state, and now full bridge inverter enters forward commutation states.
When the exciting current of direct supply needs to carry out excitation by positive current direction excitation path to field coil, and the exciting current direction in current circuit along negative current direction excitation path time, described sequential control circuit is after predetermined delay sequential, controlling the 4th field effect transistor is conducting state, first field effect transistor, the second field effect transistor and the 3rd field effect transistor are cut-off state, and now full bridge inverter enters forward dead band.
When full bridge inverter enters forward commutation states, described sequential control circuit is after the 3rd predetermined delay sequential, control the second analog switch common port be connected with normally opened contact and disconnect with normally closed contact, flow signal is made to enter the second operational amplifier by the first operational amplifier, described sequential control circuit is after the 4th predetermined delay sequential, control the second analog switch common port disconnect with normally opened contact and be connected with normally closed contact, wherein before the 4th predetermined delay sequential, conducting or the cut-off state of each described field effect transistor do not change.
When the exciting current of direct supply needs to carry out excitation by positive current direction excitation path to field coil, and the exciting current direction in current circuit along positive current direction excitation path time, described sequential control circuit is after predetermined delay sequential, control the second field effect transistor and the 3rd field effect transistor is conducting state, first field effect transistor and the 4th field effect transistor are cut-off state, and now full bridge inverter enters negative sense commutation states.
When the exciting current of direct supply needs to carry out excitation by positive current direction excitation path to field coil, and the exciting current direction in current circuit along positive current direction excitation path time, described sequential control circuit is after predetermined delay sequential, controlling the 3rd field effect transistor is conducting state, first field effect transistor, the second field effect transistor and the 4th field effect transistor are cut-off state, and now full bridge inverter enters negative sense dead band.
When the exciting current of direct supply needs to carry out excitation by negative current direction excitation path to field coil, and the exciting current direction in current circuit is along negative current direction excitation path, and described exciting current feedback circuit output voltage value is less than negative sense predetermined excitation rising saltus step threshold voltage, described sequential control circuit is after predetermined delay sequential, control the second field effect transistor and the 3rd field effect transistor is conducting state, first field effect transistor and the 4th field effect transistor are cut-off state, now full bridge inverter enters the first negative sense constant current state.
When the exciting current of direct supply needs to carry out excitation by negative current direction excitation path to field coil, and the exciting current direction in current circuit is along negative current direction excitation path, and described exciting current feedback circuit output voltage value is less than negative sense predetermined excitation decline saltus step threshold voltage, described sequential control circuit is after predetermined delay sequential, control the 3rd field effect transistor and the 4th field effect transistor is conducting state, first field effect transistor and the second field effect transistor are cut-off state, now full bridge inverter enters the second negative sense constant current state.
In the present invention, first detecting electrode of described capacitance type sensor and the second detecting electrode are drawn by the concentric cable with screen layer respectively, the screen layer of described concentric cable respectively with the first guarded electrode, secondary shielding Electrode connection, the field coil shape of described capacitance type sensor is saddle-shape, arrange iron core respectively at saddle-shape field coil center, the surface that iron core connects with lining is arc.
The present invention adopts above technical scheme, the full bridge PWM inverter of current-mode is adopted to carry out excitation, exciting current is controlled by duty cycle of switching, owing to eliminating current source, not only can improve field voltage further, and differential interference and the action time to signal processing circuit disturbed in the same way can be effectively reduced; When not increasing commutation time, exciting current can be increased further; Circuit structure of the present invention effectively improves excitation frequency, and can ensure that differential interference has enough die-away times, guaranteed flow signal has enough sampling times; Adopt full bridge PWM excitation can effectively reduce field effect transistor in switch state process power attenuation, because switching control frequency is higher, the analog switch of signal circuit need realize filtering by CPLD; In the present invention, sequential control circuit adopts the unified control of CPLD, relative in prior art use chip-count significantly to reduce, not only save PCB layout space, and the reliability of its sequential control determines by CPLD, much larger than the sequential control circuit using discrete element device to build; In the present invention, analog switch drive singal is directly provided by CPLD, and its circuit delay is determined by CPLD, relatively stable, and the phase control of analog switch is more reliable; Because flow signal is enhanced, excitation part eliminates current source simultaneously, the prototype part alternative condition of preposition amplifier and signal processing circuit broadens, the imported low-noise operational amplifier of the JFET of National and NXP can be adopted to build in raising flow signal, in employing the present invention after technology, electromagnetic flowmeter is increased significantly in cost savings.
Accompanying drawing explanation
Below in conjunction with the drawings and specific embodiments, the present invention is described in further details:
Fig. 1 is the electrical block diagram of a kind of electromagnetic flowmeter in prior art;
Fig. 2 is that the sequential control circuit of a kind of electromagnetic flowmeter in prior art exports control full bridge inverter time diagram;
Fig. 3 is that the logical circuit of a kind of electromagnetic flowmeter in prior art is to flow signal processing circuit analog switch Control timing sequence schematic diagram;
Fig. 4 is the electrical block diagram of a kind of capacitive electromagnetic flow meter of the present invention;
Fig. 5 is capacitive sensor structure figure in the present invention;
Fig. 6 is the first exciting current feedback electrical block diagram in the present invention;
Fig. 7 is the second exciting current feedback electrical block diagram in the present invention;
Fig. 8 is antilogical hysteresis circuitry input and output schematic diagram of the present invention;
Fig. 9 is full bridge inverter excitation process forward current path schematic diagram;
Figure 10 is full bridge inverter excitation process negative current path schematic diagram;
Figure 11 is that sequential control circuit exports control full bridge inverter time diagram;
Figure 12 is that sequential control circuit of the present invention is to flow signal processing circuit first analog switch Control timing sequence schematic diagram;
Figure 13 is that sequential control circuit of the present invention is to flow signal processing circuit second analog switch Control timing sequence schematic diagram.
Embodiment
As shown in Fig. 4 or Fig. 5, this capacitive electromagnetic flow meter it comprise capacitance type sensor 1, preposition discharge circuit 11, flow signal treatment circuit 10, full bridge inverter 6, full bridge driving circuit 8, exciting current feedback circuit 7, shown exciting current feedback circuit 7 comprises the first exciting current feedback circuit 7A, the second exciting current feedback circuit 7B and sequential control circuit 9;
Described capacitance type sensor comprises backing layer 1A, described backing layer outer wall is evenly provided with the first detecting electrode 2A, second detecting electrode 2B, first field coil 4A and the second field coil 4B, the first described detecting electrode 2A and the second detecting electrode 2B is oppositely arranged, the first described field coil 4A and the second field coil 4B is oppositely arranged, the first described detecting electrode 2A and the second detecting electrode 2B outside are respectively arranged with the first metallic shield electrode 3A and the second metallic shield electrode 3B, the first described field coil 4A and the second field coil 4B connects, the first described detecting electrode 2A and the second detecting electrode 2B is drawn by the concentric cable with screen layer respectively, the screen layer of described concentric cable respectively with the first guarded electrode 3A, secondary shielding electrode 3B connects, described sensor adopts high-purity alpha-alumina or other high-k industrial ceramics as backing layer 1A, described detecting electrode and guarded electrode all adopt the high conductivity metal such as silver or copper material, detecting electrode adopts contactless plating sheet, described field coil shape is saddle-shape, at saddle-shape field coil center, iron core 5A is set respectively, 5B, the surface that iron core connects with lining is arc.
Described preposition discharge circuit 11 comprises the first preamplifier 11A and the second preamplifier 11B, the in-phase input end of the first preamplifier 11A is connected with the first detecting electrode 2A, and the inverting input of the first preamplifier 11A is connected with the first guarded electrode 3A respectively with output terminal; The in-phase input end of the second described preamplifier 11B is connected with the second detecting electrode 2B, and the inverting input of the second described preamplifier 11B is connected with secondary shielding electrode 3B respectively with output terminal;
Described flow signal treatment circuit 10 comprises first instrument amplifier A
1, the first operational amplifier A
2, the second operational amplifier A
3, the first resistance R
1, the second resistance R
2, the 3rd variable resistor R
3, the 4th resistance R
4, the 5th resistance R
5, the second electric capacity C
2, the 3rd electric capacity C
3, the 4th electric capacity C
4, the first analog switch S1, the second analog switch S2, described first instrument amplifier A
1in-phase input end be connected with the output terminal of the first preamplifier 11A, described first instrument amplifier A
1inverting input be connected with the output terminal of the second preamplifier 11B, first instrument amplifier A
1output terminal and the second electric capacity C
2one end connect, the second electric capacity C
2the other end be connected the first analog switch S1 common port and the second resistance R respectively with one end of the first resistance R1
2one end, the first resistance R
1other end ground connection, the second resistance R
2the other end and the 3rd variable resistor R
3, the 4th resistance R
4the first operational amplifier A is connected to after series connection
2output terminal, the normally closed contact ground connection of the first described analog switch S1, the normally opened contact of the first analog switch S1 connects the first operational amplifier A
2in-phase input end, the 3rd described variable resistor R
3adjustable end connect the first operational amplifier A
2inverting input, the first described operational amplifier A
2output terminal connect the common port of the second analog switch S2, the normally closed contact of the second described analog switch S2 is by the 3rd electric capacity C
3ground connection, the normally opened contact of the second analog switch S2 connects the 5th resistance R
5one end, the 5th resistance R
5the other end connect the 4th electric capacity C respectively
4one end and the second operational amplifier A
3in-phase input end, the 4th electric capacity C
4other end ground connection, the second described operational amplifier A
3inverting input be connected with output terminal;
Described full bridge inverter 6 comprises the first field effect transistor Q1, the second field effect transistor Q2, the 3rd field effect transistor Q3, the 4th field effect transistor Q4, sampling resistor R
sen, the first electric capacity C
1and direct supply V
e; The drain electrode of the first described field effect transistor Q1 is connected with the first field coil 4A respectively with the source electrode of the 3rd field effect transistor Q3, the drain electrode of the second described field effect transistor Q2 and the source electrode of the 4th field effect transistor Q4 respectively with sampling resistor R
senone end connect, described sampling resistor R
senthe other end and the second field coil 4B common ground; Described direct supply V
epositive pole connect the source electrode of the first field effect transistor Q1, the source electrode of the second field effect transistor Q2 and the first electric capacity C respectively
1one end, described direct supply V
enegative pole connect the drain electrode of the 3rd field effect transistor Q3, the drain electrode of the 4th field effect transistor Q4 and the first electric capacity C respectively
1the other end; The grid of the first described field effect transistor Q1, the grid of the second field effect transistor Q2, the grid of the 3rd field effect transistor Q3, the grid of the 4th field effect transistor Q4 connect full bridge driving circuit 8 respectively, the drive singal that sequential control circuit 9 exports is amplified to the voltage in full bridge inverter 6 required for each field effect transistor by described full bridge driving circuit 8, and by direct supply V
ethe voltage transitions provided is alternating rectangular current, and inputs to sensor 1 field coil, the direct supply V of described full bridge inverter 6
ealternately positive current direction excitation and negative current direction excitation are carried out to the field coil of capacitance type sensor 1 according to predetermined excitation frequency;
As is seen in fig. 6 or fig. 7, the first described exciting current feedback circuit 7A comprises the first operational amplification circuit and the first antilogical hysteresis circuitry, and the first described operational amplification circuit comprises the 3rd operational amplifier A
4, the 6th resistance R
6, the 7th resistance R
7, the 8th resistance R
8with the 9th resistance R
9, the 6th described resistance R
6one end connect sampling resistor R
senone end, the 6th resistance R
6the other end and the 9th resistance R
9one end connect the 3rd operational amplifier A respectively
4inverting input, the 7th described resistance R
7one end connect sampling resistor R
senthe other end, the 7th resistance R
7the other end and the 8th resistance R
8one end connect the 3rd operational amplifier A respectively
4in-phase input end, the 8th resistance R
8other end ground connection, the 9th described resistance R
9the other end and the 3rd operational amplifier A
4output terminal connect, the first described operational amplification circuit is to current sampling resistor R
senboth sides voltage U
cur+with U
cur-carry out mutual deviation computing and amplify 10 times, the 3rd operational amplifier A
4the voltage that output terminal exports is 10 × (U
cur--U
cur+); The first described antilogical hysteresis circuitry comprises four-operational amplifier A
5, the tenth resistance R
10, the 11 resistance R
11, the 12 resistance R
12, the tenth described resistance R
10one end connect reference power supply V
ref, the tenth resistance R
10the other end, the 11 resistance R
11one end and the 12 resistance R
12one end be connected to four-operational amplifier A respectively
5in-phase input end, the 11 described resistance R
11other end ground connection, the 12 described resistance R
12the other end connect four-operational amplifier A
5output terminal, described four-operational amplifier A
5inverting input connect the 3rd operational amplifier A
4output terminal, as shown in Figure 8, assuming that logic conduction level V
hfor " 1 ", logic cut-off level V
lfor " 0 ", as four-operational amplifier A
5output voltage logic is V
h, the 3rd operational amplifier A
4output voltage values is according to coordinate axis V
inv is arrived toward large change from little
tHFtime, four-operational amplifier A
5output voltage is from V
hsaltus step is V
l; As four-operational amplifier A
5output voltage logic is V
l, the 3rd operational amplifier A
4output voltage values is according to coordinate axis V
inv is arrived toward little change from large
tHRtime, four-operational amplifier A
5output voltage is from V
lsaltus step is V
h;
The second described exciting current feedback circuit 7B comprises the second operational amplification circuit and the second antilogical hysteresis circuitry, and the second described operational amplification circuit comprises the 5th operational amplifier A
6, the 13 resistance R
13, the 14 resistance R
14, the 15 resistance R
15with the 16 resistance R
16, the 13 described resistance R
13one end connect sampling resistor R
senone end, the 13 resistance R
13the other end and the 16 resistance R
16one end connect the 5th operational amplifier A respectively
6inverting input, the 14 described resistance R
14one end connect sampling resistor R
senthe other end, the 14 resistance R
14the other end and the 15 resistance R
15one end connect the 5th operational amplifier A respectively
6in-phase input end, the 15 resistance R
15other end ground connection, the 16 described resistance R
16the other end and the 5th operational amplifier A
6output terminal connect, the second described operational amplification circuit is to current sampling resistor R
senboth sides voltage U
cur+with U
cur-carry out mutual deviation computing and amplify 10 times, the 5th operational amplifier A
6the voltage that output terminal exports is 10 × (U
cur--U
cur+); The second described antilogical hysteresis circuitry comprises the 6th operational amplifier A
7, the 17 resistance R
17, the 18 resistance R
18, the 19 resistance R
19, the 17 described resistance R
17one end connect reference power supply V
ref, the 17 resistance R
17the other end, the 18 resistance R
18one end and the 19 resistance R
19one end be connected to the 6th operational amplifier A respectively
7in-phase input end, the 18 described resistance R
18other end ground connection, the 19 described resistance R
19the other end connect the 6th operational amplifier A
7output terminal, the 6th described operational amplifier A
7inverting input connect the 5th operational amplifier A
6output terminal, as shown in Figure 8, in the second exciting current feedback circuit, in like manner suppose logic conduction level V
hfor " 1 ", logic cut-off level V
lfor " 0 ", when the 6th operational amplifier A
7output voltage logic is V
h, the 5th operational amplifier A
6output voltage values is according to coordinate axis V
inv is arrived toward large change from little
tHFtime, the 6th operational amplifier A
7output voltage is from V
hsaltus step is V
l; When the 5th operational amplifier A
6output voltage logic is V
l, the 5th operational amplifier A
6output voltage values is according to coordinate axis V
inv is arrived toward little change from large
tHRtime, the 6th operational amplifier A
7output voltage is from V
lsaltus step is V
h;
Described sequential control circuit 9 comprises CPLD 9A and crystal oscillator 9B, described CPLD 9A is connected with crystal oscillator 9B, described crystal oscillator 9B provides clock reference for programmable logic device (PLD) 9A, described CPLD 9A forms drive singal by computing and delay, and by optocoupler output logic level to full bridge driving circuit 8, described sequential control circuit 9 judges the current status in field coil according to the first exciting current feedback circuit 7A and the second exciting current feedback circuit 7B, and control the on off state of each field effect transistor in full bridge inverter 6, the control pin of described CPLD 9A connects the first analog switch S1 and the second analog switch S2 respectively, described sequential control circuit 9 calculates and controls each analog switch control signal in flow signal processing circuit 10, described CPLD 9A adopts CPLD.
As shown in Fig. 9, Figure 10 or Figure 11, described direct supply V
eexciting current process path order be the first field effect transistor Q1, the first field coil 4A, the second field coil 4B, sampling resistor R
senwith the 4th field effect transistor Q4, this path is positive current direction excitation path; Described direct supply V
eexciting current process path order be the second field effect transistor Q2, sampling resistor R
sen, the second field coil 4B, the first field coil 4A and the 3rd field effect transistor Q3, this path is negative current direction excitation path.
As direct supply V
eexciting current need to carry out excitation by positive current direction excitation path to field coil, and the exciting current direction in current circuit is along positive current direction excitation path, and described sampling resistor R
senupper current value is less than forward predetermined excitation rising saltus step threshold voltage V
tHRdescribed sequential control circuit 9 is after predetermined delay sequential, control the first field effect transistor Q1 and the 4th field effect transistor Q4 is conducting state, second field effect transistor Q2 and the 3rd field effect transistor Q3 is cut-off state, and now full bridge inverter 6 enters the first forward constant current state.
As direct supply V
eexciting current need to carry out excitation by positive current direction excitation path to field coil, and the exciting current direction in current circuit is along positive current direction excitation path, and described sampling resistor R
senupper current value is greater than forward predetermined excitation decline saltus step threshold voltage V
tHFdescribed sequential control circuit 9 is after predetermined delay sequential, control the 3rd field effect transistor Q3 and the 4th field effect transistor Q4 is conducting state, first field effect transistor Q1 and the second field effect transistor Q2 is cut-off state, and now full bridge inverter 6 enters the second forward constant current state.
As shown in figure 12, when full bridge inverter enters the second forward constant current state, described sequential control circuit 9 is after the first predetermined delay sequential, and control the first analog switch S1 common port and be connected with normally opened contact and disconnect with normally closed contact, flow signal enters the first operational amplifier A
2described sequential control circuit 9 is after the second predetermined delay sequential, control the first analog switch S1 common port disconnect with normally opened contact and be connected with normally closed contact, wherein before the second predetermined delay sequential, conducting or the cut-off state of each described field effect transistor do not change.
As direct supply V
eexciting current need to carry out excitation by positive current direction excitation path to field coil, and the exciting current direction in current circuit along negative current direction excitation path time, described sequential control circuit 9 is after predetermined delay sequential, control the first field effect transistor Q1 and the 4th field effect transistor Q4 is conducting state, second field effect transistor Q2 and the 3rd field effect transistor Q3 is cut-off state, and now full bridge inverter 6 enters forward commutation states.
As direct supply V
eexciting current need to carry out excitation by positive current direction excitation path to field coil, and the exciting current direction in current circuit along negative current direction excitation path time, described sequential control circuit 9 is after predetermined delay sequential, controlling the 4th field effect transistor Q4 is conducting state, first field effect transistor Q1, the second field effect transistor Q2 and the 3rd field effect transistor Q3 are cut-off state, and now full bridge inverter 6 enters forward dead band.
As shown in figure 13, when full bridge inverter enters forward commutation states, described sequential control circuit 9, after the 3rd predetermined delay sequential, controls the second analog switch S2 common port and is connected with normally opened contact and disconnects with normally closed contact, make flow signal by the first operational amplifier A
2enter the second operational amplifier A
3described sequential control circuit 9 is after the 4th predetermined delay sequential, control the second analog switch S2 common port disconnect with normally opened contact and be connected with normally closed contact, wherein before the 4th predetermined delay sequential, conducting or the cut-off state of each described field effect transistor do not change.
As direct supply V
eexciting current need to carry out excitation by positive current direction excitation path to field coil, and the exciting current direction in current circuit along positive current direction excitation path time, described sequential control circuit 9 is after predetermined delay sequential, control the second field effect transistor Q2 and the 3rd field effect transistor Q3 is conducting state, first field effect transistor Q1 and the 4th field effect transistor Q4 is cut-off state, and now full bridge inverter 6 enters negative sense commutation states.
As direct supply V
eexciting current need to carry out excitation by positive current direction excitation path to field coil, and the exciting current direction in current circuit along positive current direction excitation path time, described sequential control circuit 9 is after predetermined delay sequential, controlling the 3rd field effect transistor Q3 is conducting state, first field effect transistor Q1, the second field effect transistor Q2 and the 4th field effect transistor Q4 are cut-off state, and now full bridge inverter 6 enters negative sense dead band.
As direct supply V
eexciting current need to carry out excitation by negative current direction excitation path to field coil, and the exciting current direction in current circuit is along negative current direction excitation path, and described sampling resistor R
senupper current value is less than negative sense predetermined excitation rising saltus step threshold voltage-V
tHRdescribed sequential control circuit 9 is after predetermined delay sequential, control the second field effect transistor Q2 and the 3rd field effect transistor Q3 is conducting state, first field effect transistor Q1 and the 4th field effect transistor Q4 is cut-off state, and now full bridge inverter 6 enters the first negative sense constant current state.
As direct supply V
eexciting current need to carry out excitation by negative current direction excitation path to field coil, and the exciting current direction in current circuit is along negative current direction excitation path, and described sampling resistor R
senupper current value is less than negative sense predetermined excitation decline saltus step threshold voltage-V
tHFdescribed sequential control circuit 9 is after predetermined delay sequential, control the 3rd field effect transistor Q3 and the 4th field effect transistor Q4 is conducting state, first field effect transistor Q1 and the second field effect transistor Q2 is cut-off state, and now full bridge inverter 6 enters the second negative sense constant current state; Described full bridge inverter on off state, as shown in following form:
Claims (10)
1. a capacitive electromagnetic flow meter, is characterized in that: it comprises capacitance type sensor, preposition discharge circuit, flow signal treatment circuit, full bridge inverter, full bridge driving circuit, the first exciting current feedback circuit, the second exciting current feedback circuit and sequential control circuit;
Described capacitance type sensor comprises backing layer, described backing layer outer wall is evenly provided with the first detecting electrode, the second detecting electrode, the first field coil and the second field coil, the first described detecting electrode and the second detecting electrode are oppositely arranged, the first described field coil and the second field coil are oppositely arranged, the first described detecting electrode and the second detecting electrode outside are respectively arranged with the first metallic shield electrode and the second metallic shield electrode, the first described field coil and the series connection of the second field coil;
Described preposition discharge circuit comprises the first preamplifier and the second preamplifier, the in-phase input end of the first preamplifier is connected with the first detecting electrode, and the inverting input of the first preamplifier is connected with the first guarded electrode respectively with output terminal; The in-phase input end of the second described preamplifier is connected with the second detecting electrode, the inverting input of the second described preamplifier and output terminal respectively with secondary shielding Electrode connection;
Described flow signal treatment circuit comprises first instrument amplifier, first operational amplifier, second operational amplifier, first resistance, second resistance, 3rd resistance, 4th resistance, 5th resistance, second electric capacity, 3rd electric capacity, 4th electric capacity, first analog switch, second analog switch, the in-phase input end of described first instrument amplifier is connected with the output terminal of the first preamplifier, the inverting input of described first instrument amplifier is connected with the output terminal of the second preamplifier, the output terminal of first instrument amplifier is connected with one end of the second electric capacity, the other end of the second electric capacity is connected one end of the first analog switch common port and the second resistance respectively with one end of the first resistance, the other end ground connection of the first resistance, the other end of the second resistance and the 3rd resistance, the output terminal of the first operational amplifier is connected to after 4th resistant series, the normally closed contact ground connection of the first described analog switch, the normally opened contact of the first analog switch connects the in-phase input end of the first operational amplifier, the adjustable end of the 3rd described resistance connects the inverting input of the first operational amplifier, the output terminal of the first described operational amplifier connects the common port of the second analog switch, the normally closed contact of the second described analog switch is by the 3rd capacity earth, the normally opened contact of the second analog switch connects one end of the 5th resistance, the other end of the 5th resistance connects one end of the 4th electric capacity and the in-phase input end of the second operational amplifier respectively, the other end ground connection of the 4th electric capacity, the inverting input of the second described operational amplifier is connected with output terminal,
Described full bridge inverter comprises the first field effect transistor, the second field effect transistor, the 3rd field effect transistor, the 4th field effect transistor, sampling resistor, the first electric capacity and direct supply, the drain electrode of the first described field effect transistor is connected with the first field coil respectively with the source electrode of the 3rd field effect transistor, the drain electrode of the second described field effect transistor is connected with one end of sampling resistor respectively with the source electrode of the 4th field effect transistor, the other end of described sampling resistor and the second field coil common ground, the positive pole of described direct supply connects one end of the source electrode of the first field effect transistor, the source electrode of the second field effect transistor and the first electric capacity respectively, and the negative pole of described direct supply connects the drain electrode of the 3rd field effect transistor, the drain electrode of the 4th field effect transistor and the other end of the first electric capacity respectively, the grid of the first described field effect transistor, the grid of the second field effect transistor, the grid of the 3rd field effect transistor, the grid of the 4th field effect transistor connects full bridge driving circuit respectively, the drive singal that sequential control circuit exports is amplified to the driving voltage in full bridge inverter required for each field effect transistor gate by described full bridge driving circuit, and the voltage transitions provided by direct supply is alternating rectangular current, and input to sensor excitation coil, the direct supply of described full bridge inverter alternately carries out positive current direction excitation and negative current direction excitation to the field coil of capacitance type sensor according to predetermined excitation frequency,
The first described exciting current feedback circuit comprises the first operational amplification circuit and the first antilogical hysteresis circuitry, the first described operational amplification circuit comprises the 3rd operational amplifier, 6th resistance, 7th resistance, 8th resistance and the 9th resistance, one end of the 6th described resistance connects one end of sampling resistor, the other end and one end of the 9th resistance of 6th resistance are connected the inverting input of the 3rd operational amplifier respectively, one end of the 7th described resistance connects the other end of sampling resistor, the other end and one end of the 8th resistance of 7th resistance are connected the in-phase input end of the 3rd operational amplifier respectively, 8th resistance other end ground connection, the other end of the 9th described resistance is connected with the output terminal of the 3rd operational amplifier, the first described antilogical hysteresis circuitry comprises four-operational amplifier, the tenth resistance, the 11 resistance, the 12 resistance, one end of the tenth described resistance connects reference power supply, the other end of the tenth resistance, one end of the 11 resistance and one end of the 12 resistance are connected to the in-phase input end of four-operational amplifier respectively, the other end ground connection of the 11 described resistance, the other end of the 12 described resistance connects the output terminal of four-operational amplifier, and the inverting input of described four-operational amplifier connects the output terminal of the 3rd operational amplifier,
The second described exciting current feedback circuit comprises the second operational amplification circuit and the second antilogical hysteresis circuitry, the second described operational amplification circuit comprises the 5th operational amplifier, 13 resistance, 14 resistance, 15 resistance and the 16 resistance, one end of the 13 described resistance connects one end of sampling resistor, the other end and one end of the 16 resistance of 13 resistance are connected the inverting input of the 5th operational amplifier respectively, one end of the 14 described resistance connects the other end of sampling resistor, the other end and one end of the 15 resistance of 14 resistance are connected the in-phase input end of the 5th operational amplifier respectively, 15 resistance other end ground connection, the other end of the 16 described resistance is connected with the output terminal of the 5th operational amplifier, the second described antilogical hysteresis circuitry comprises the 6th operational amplifier, 17 resistance, 18 resistance, 19 resistance, one end of the 17 described resistance connects reference power supply, the other end of the 17 resistance, one end of 18 resistance and one end of the 19 resistance are connected to the in-phase input end of the 6th operational amplifier respectively, the other end ground connection of the 18 described resistance, the other end of the 19 described resistance connects the output terminal of the 6th operational amplifier, the inverting input of the 6th described operational amplifier connects the output terminal of the 5th operational amplifier,
Described sequential control circuit comprises CPLD and crystal oscillator, described CPLD is connected with crystal oscillator, described crystal oscillator provides clock reference for programmable logic device (PLD), described CPLD forms drive singal by computing and delay, and by optocoupler output logic level to full bridge driving circuit, described sequential control circuit judges the current status in field coil according to the first exciting current feedback circuit and the second exciting current feedback circuit, and control the on off state of each field effect transistor in full bridge inverter, the control pin of described CPLD connects the first analog switch and the second analog switch respectively, described sequential control circuit calculates and controls each analog switch control signal in flow signal processing circuit.
2. a kind of capacitive electromagnetic flow meter according to claim 1, it is characterized in that: the path order of the exciting current process of described direct supply is the first field effect transistor, the first field coil, the second field coil, sampling resistor and the 4th field effect transistor, and this path is positive current direction excitation path; The path order of the exciting current process of described direct supply is the second field effect transistor, sampling resistor, the second field coil, the first field coil and the 3rd field effect transistor, and this path is negative current direction excitation path.
3. a kind of capacitive electromagnetic flow meter according to claim 2, it is characterized in that: when the exciting current of direct supply needs to carry out excitation by positive current direction excitation path to field coil, and the exciting current direction in current circuit is along positive current direction excitation path, and described exciting current feedback circuit output voltage value is less than forward predetermined excitation rising saltus step threshold voltage, described sequential control circuit is after predetermined delay sequential, control the first field effect transistor and the 4th field effect transistor is conducting state, second field effect transistor and the 3rd field effect transistor are cut-off state, now full bridge inverter enters the first forward constant current state.
4. a kind of capacitive electromagnetic flow meter according to claim 2, it is characterized in that: when the exciting current of direct supply needs to carry out excitation by positive current direction excitation path to field coil, and the exciting current direction in current circuit is along positive current direction excitation path, and described exciting current feedback circuit output voltage value is greater than forward predetermined excitation decline saltus step threshold voltage, described sequential control circuit is after predetermined delay sequential, control the 3rd field effect transistor and the 4th field effect transistor is conducting state, first field effect transistor and the second field effect transistor are cut-off state, now full bridge inverter enters the second forward constant current state.
5. a kind of capacitive electromagnetic flow meter according to claim 4, it is characterized in that: when full bridge inverter enters the second forward constant current state, described sequential control circuit is after the first predetermined delay sequential, control the first analog switch common port be connected with normally opened contact and disconnect with normally closed contact, flow signal enters the first operational amplifier, described sequential control circuit is after the second predetermined delay sequential, control the first analog switch common port disconnect with normally opened contact and be connected with normally closed contact, wherein before the second predetermined delay sequential, conducting or the cut-off state of each described field effect transistor do not change.
6. a kind of capacitive electromagnetic flow meter according to claim 2, it is characterized in that: when the exciting current of direct supply needs to carry out excitation by positive current direction excitation path to field coil, and the exciting current direction in current circuit along negative current direction excitation path time, described sequential control circuit is after predetermined delay sequential, control the first field effect transistor and the 4th field effect transistor is conducting state, second field effect transistor and the 3rd field effect transistor are cut-off state, and now full bridge inverter enters forward commutation states.
7. a kind of capacitive electromagnetic flow meter according to claim 6, it is characterized in that: when full bridge inverter enters forward commutation states, described sequential control circuit is after the 3rd predetermined delay sequential, control the second analog switch common port be connected with normally opened contact and disconnect with normally closed contact, flow signal is made to enter the second operational amplifier by the first operational amplifier, described sequential control circuit is after the 4th predetermined delay sequential, control the second analog switch common port disconnect with normally opened contact and be connected with normally closed contact, wherein before the 4th predetermined delay sequential, conducting or the cut-off state of each described field effect transistor do not change.
8. a kind of capacitive electromagnetic flow meter according to claim 2, it is characterized in that: when the exciting current of direct supply needs to carry out excitation by positive current direction excitation path to field coil, and the exciting current direction in current circuit along positive current direction excitation path time, described sequential control circuit is after predetermined delay sequential, control the second field effect transistor and the 3rd field effect transistor is conducting state, first field effect transistor and the 4th field effect transistor are cut-off state, and now full bridge inverter enters negative sense commutation states.
9. a kind of capacitive electromagnetic flow meter according to claim 2, it is characterized in that: when the exciting current of direct supply needs to carry out excitation by negative current direction excitation path to field coil, and the exciting current direction in current circuit is along negative current direction excitation path, and described exciting current feedback circuit output voltage value is less than negative sense predetermined excitation rising saltus step threshold voltage, described sequential control circuit is after predetermined delay sequential, control the second field effect transistor and the 3rd field effect transistor is conducting state, first field effect transistor and the 4th field effect transistor are cut-off state, now full bridge inverter enters the first negative sense constant current state.
10. a kind of capacitive electromagnetic flow meter according to claim 2, it is characterized in that: when the exciting current of direct supply needs to carry out excitation by negative current direction excitation path to field coil, and the exciting current direction in current circuit is along negative current direction excitation path, and described exciting current feedback circuit output voltage value is less than negative sense predetermined excitation decline saltus step threshold voltage, described sequential control circuit is after predetermined delay sequential, control the 3rd field effect transistor and the 4th field effect transistor is conducting state, first field effect transistor and the second field effect transistor are cut-off state, now full bridge inverter enters the second negative sense constant current state.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP4296627A1 (en) * | 2022-06-20 | 2023-12-27 | Krohne Messtechnik GmbH | Magnetic field generator for a magnetic inductive flowmeter, method for operating same, magnetic inductive flowmeter and method for operating same |
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| CN103595319A (en) * | 2013-11-08 | 2014-02-19 | 上海大学 | Quick constant-current excitation device of excitation coil and control method of quick constant-current excitation device |
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| JP6851785B2 (en) * | 2016-11-09 | 2021-03-31 | アズビル株式会社 | Electromagnetic flow meter |
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| CN111982215A (en) * | 2020-08-31 | 2020-11-24 | 维沃移动通信有限公司 | Flow detection device and detection method |
| CN113063468A (en) * | 2020-11-26 | 2021-07-02 | 杭州绿鲸科技有限公司 | Low-power-consumption nonmagnetic device for metering fluid flow and implementation method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2127978B (en) * | 1982-09-30 | 1987-06-03 | Tokyo Shibaura Electric Co | Electromagnetic flow meter |
| JPH07225143A (en) * | 1994-02-14 | 1995-08-22 | Yokogawa Electric Corp | Electromagnetic flowmeter |
| JPH08327419A (en) * | 1995-06-02 | 1996-12-13 | Hitachi Ltd | Measuring system using electromagnetic flowmeter |
| JP2003014512A (en) * | 2001-06-29 | 2003-01-15 | Yokogawa Electric Corp | Electromagnetic flowmeter |
| CN101162163A (en) * | 2007-11-20 | 2008-04-16 | 浙江大学 | Capacitor type electromagnetic flow meter |
-
2013
- 2013-04-15 CN CN201310130986.XA patent/CN103206990B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2127978B (en) * | 1982-09-30 | 1987-06-03 | Tokyo Shibaura Electric Co | Electromagnetic flow meter |
| JPH07225143A (en) * | 1994-02-14 | 1995-08-22 | Yokogawa Electric Corp | Electromagnetic flowmeter |
| JPH08327419A (en) * | 1995-06-02 | 1996-12-13 | Hitachi Ltd | Measuring system using electromagnetic flowmeter |
| JP2003014512A (en) * | 2001-06-29 | 2003-01-15 | Yokogawa Electric Corp | Electromagnetic flowmeter |
| CN101162163A (en) * | 2007-11-20 | 2008-04-16 | 浙江大学 | Capacitor type electromagnetic flow meter |
Non-Patent Citations (1)
| Title |
|---|
| 电容式电磁流量计信号处理新方法研究;卢国锋等;《传感技术学报》;20080930;第21卷(第9期);第1551-1554页 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP4296627A1 (en) * | 2022-06-20 | 2023-12-27 | Krohne Messtechnik GmbH | Magnetic field generator for a magnetic inductive flowmeter, method for operating same, magnetic inductive flowmeter and method for operating same |
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