CN103186159A - Master-slave type leading load compensation voltage stabilizer - Google Patents
Master-slave type leading load compensation voltage stabilizer Download PDFInfo
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- CN103186159A CN103186159A CN2011104497541A CN201110449754A CN103186159A CN 103186159 A CN103186159 A CN 103186159A CN 2011104497541 A CN2011104497541 A CN 2011104497541A CN 201110449754 A CN201110449754 A CN 201110449754A CN 103186159 A CN103186159 A CN 103186159A
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Abstract
The invention provides a master-slave type leading load compensation voltage stabilizer which is applied to a circuit of an internal memory buffer; the master-slave type leading load compensation voltage stabilizer comprises a voltage stabilization unit, a master-slave type output stage, a master control unit and an output stage control unit, wherein the voltage stabilization unit is provided with an input end used for receiving reference voltage and feedback voltage, and an output end used for generating regulation voltage; the master-slave type output stage comprises a master output stage and a plurality of slave output stages; the master control unit is used for monitoring the working condition of a circuit load in the internal memory buffer and providing the working information of the circuit load in advance under the condition that the working condition of the circuit load is changed; and the output stage control unit is connected with the master control unit and is used for generating enable signals which respectively correspond to the plurality of slave output stages so as to open and close the plurality of slave output stages according to the working information of the circuit load that is provided in advance, so that the output supply voltage is maintained to be stable. Compared with the prior art, the opening number of the output stages can be controlled in a self-adaptive way according to the working condition of the circuit load, so that the output supply voltage is maintained to be stable, and the performances and the work stability of the circuit load are improved.
Description
Technical field
The present invention relates to a kind of voltage stabilizing technique, particularly a kind of master-slave mode leading load compensation voltage stabilizing device that is applied to the core buffer circuit.
Background technology
Development along with electronics technology, comprised that in an electronic system functional circuit that all size do not wait (for example, rectification, filtering, transformation, voltage stabilizing, signal conversion or signal amplification etc.) form, in order to make the normal operation of electronic system energy, need realize by power management, and the power management fundamental purpose is, under the different operating state of electronic system, controls and keep the normal supply of the interior suitably electric current of electronic system and voltage at any time.
And electric power management circuit can be divided into several types such as power regulator (regulator), battery charge/measurement, hot plug, voltage monitoring, wherein power regulator is mainly used in when power source voltage and load current change, output voltage that still can the supplies electrons system stability, yet when power regulator is applied in little electric current and the output of accurate reference voltage, be subjected to the influence of load effect (loading effect) easily and its output accuracy is descended, for high-quality designer trends, this is one of problem to be solved.
Core buffer is applied in the memory subsystem of computing machine.The reading and writing data channel of internal memory shares a bus, has paroxysmal characteristics.Thereby the loading condition of internal circuit also has paroxysmal characteristics.Send because reading and writing order meeting shifts to an earlier date a period of time, the master controller of core buffer can be known the variation of circuit activity in advance, i.e. the variation of loading condition makes voltage stabilizer make respective handling.
Fig. 1 has shown the functional block diagram of closed loop voltage stabilizer in the prior art.As shown in Figure 1, described closed loop voltage stabilizer comprises: according to reference voltage V
REFAnd voltage stabilizer output feedback V
FEEDBACKProduce output voltage V
GATEAmplifier 11, and the output stage 12 that is driven by amplifier, and by output stage 12 in order to driving circuit load 10.Output stage produces stable output voltage V
REG, for circuit load 10 provides power supply.In actual applications, the working current of circuit load may be with frequency of operation, loading condition, variation of ambient temperature.
In Fig. 1, the closed loop voltage stabilizer has negative feedback, and direct current output impedance is lower, but under different conditions of work, loop stability be cannot say for sure to demonstrate,prove.
Fig. 2 has shown the functional block diagram of hypotactic open loop voltage stabilizer in the prior art.As shown in Figure 2, described hypotactic open loop voltage stabilizer comprises one according to reference voltage V
REFAnd voltage stabilizer output feedback V
FEEDBACKProduce output voltage V
GATEAmplifier 21, the main output stage 22 that is driven by amplifier 21 and from output stage 23, and respectively by main output stage 22 and from output stage 23 in order to driving circuit load 24,25.Main output stage 22 and produce stable output voltage V from output stage 23
REG1, V
REG2, for circuit load 24,25 provides power supply.In actual applications, the working current of circuit load may be with frequency of operation, loading condition, variation of ambient temperature.
In Fig. 2, the loop condition of work of hypotactic open loop voltage stabilizer is constant, stability can guarantee, thereby use more extensive, but its output impedance is higher, its output voltage will change with the working current of circuit load and change, and the instability of supply voltage can cause the decline of circuit load performance and reliability.
Summary of the invention
The object of the present invention is to provide a kind of master-slave mode leading load compensation voltage stabilizing device that is applied to the core buffer circuit, be used for to solve because the continuous variation of the working current of core buffer circuit load, make that supply voltage is unstable and cause the following degradation problem of circuit load performance and reliability.
The invention provides a kind of master-slave mode leading load compensation voltage stabilizing device that is applied to the core buffer circuit, it is characterized in that, comprise: voltage regulation unit has the input end that receives reference voltage and feedback voltage and the output terminal of adjusting voltage according to described reference voltage and the generation of described feedback voltage of reception; The master-slave mode output stage, comprise the main output stage that is connected respectively with the output terminal of described voltage regulation unit and a plurality of from output stage, described main output stage output feedback voltage, described main output stage is exported described feedback voltage, and described a plurality of one or more outputs from output stage offer the supply voltage of circuit load in the described core buffer; Main control unit is used for the working condition of the described core buffer circuit load of monitoring, and provides the job information of described circuit load under the situation that the working condition of described circuit load changes in advance; The output stage control module that is connected with described main control unit, the job information that is used for the described circuit load that provides in advance according to described main control unit produce corresponding to a plurality of described from output stage so that a plurality ofly describedly carry out the enable signal that opens and closes from output stage, guarantee that the supply voltage of exporting keeps stable.
Alternatively, between described main control unit and described output stage control module, also comprise control information delay cell, be sent to described output stage control module again after the job information that is used for described circuit load that described main control unit is provided in advance postpones to handle.
Alternatively, described voltage regulation unit comprises operational amplifier.
Alternatively, described main output stage comprises nmos pass transistor, and the grid of described nmos pass transistor connects the output terminal of described voltage regulation unit, the source electrode output feedback voltage of described nmos pass transistor.
Alternatively, describedly comprise nmos pass transistor from output stage, the grid of described nmos pass transistor connects the output terminal of described voltage regulation unit, the source electrode output supply voltage of described nmos pass transistor.
Alternatively, described from also comprising between the output stage for control the described gauge tap that opens and closes of carrying out from output stage according to enable signal at described output stage control module and each.
Alternatively, described gauge tap comprises the PMOS transistor, described PMOS transistor drain connects described output stage control module to receive described enable signal, and the transistorized source electrode of described PMOS connects power supply, and described PMOS transistor drain connects described from output stage.
Alternatively, the job information of described circuit load comprises the electric current change information of circuit load.
Alternatively, the job information that described output stage control module is used for the described circuit load that provides in advance according to described main control unit produce corresponding to a plurality of described from output stage so that a plurality of described enable signal that opens and closes of carrying out from output stage, guarantee that the supply voltage of exporting keeps stable, comprise: when the working current of circuit load is constant, describedly opens number from output stage and remain unchanged; When the working current of circuit load becomes big, produce and open the more enable signal from output stage of more number, make to descend the described corresponding increase of number of opening from output stage with the supply voltage that prevents from exporting; When the working current of circuit load diminishes, produce the enable signal from output stage close some, make the described corresponding minimizing of number of opening from output stage, rise with the supply voltage that prevents from exporting.
The master-slave mode leading load compensation voltage stabilizing device that is applied to the core buffer circuit provided by the invention, working condition that can the real-time monitoring circuit load, provide the job information of circuit load in advance, according to the job information of described circuit load produce corresponding to a plurality of described from output stage so that a plurality of described enable signal that opens and closes of carrying out from output stage, thereby the described number of realize to make opening from output stage is the changing condition with the circuit load electric current to be complementary, guarantee that the supply voltage of exporting keeps stable, improves circuit load performance and functional reliability.
Description of drawings
Fig. 1 is the functional block diagram of closed loop voltage stabilizer in the prior art.
Fig. 2 has shown the functional block diagram of hypotactic open loop voltage stabilizer in the prior art.
The functional block diagram of Fig. 3 master-slave mode leading load compensation voltage stabilizing device of the present invention for the present invention has shown.
Fig. 4 is from formula leading load compensation voltage stabilizing device functional block diagram in one embodiment among Fig. 3.
Fig. 5 is applied to core buffer data path work schedule synoptic diagram for master-slave mode leading load compensation voltage stabilizing device of the present invention.
Fig. 6 is the circuit diagram of master-slave mode leading load compensation voltage stabilizing device of the present invention in a kind of specific implementation.
Embodiment
In view of in the prior art, the loop condition of work of hypotactic open loop voltage stabilizer is constant, stability can guarantee, thereby use more extensive, but its output impedance is higher, its output voltage will change with the working current of circuit load and change, and the instability of supply voltage can cause the decline of circuit load performance and reliability.
Therefore, the present inventor improves prior art, the working condition of energy real-time monitoring circuit load, provide the job information of circuit load in advance, according to the job information of described circuit load produce corresponding to a plurality of described from output stage so that a plurality of described enable signal that opens and closes of carrying out from output stage, thereby the described number of realize to make opening from output stage is the changing condition with the circuit load electric current to be complementary, guarantee that the supply voltage of exporting keeps stable, improves circuit load performance and functional reliability.
Below by specific instantiation explanation embodiments of the present invention, those skilled in the art can understand other advantages of the present invention and effect easily by the disclosed content of this instructions.The present invention can also be implemented or be used by other different embodiment, and the every details in this instructions also can be based on different viewpoints and application, carries out various modifications or change under the spirit of the present invention not deviating from.
Need to prove, the diagram that provides in the present embodiment only illustrates basic conception of the present invention in a schematic way, satisfy only show in graphic with the present invention in relevant assembly but not component count, shape and size drafting when implementing according to reality, kenel, quantity and the ratio of each assembly can be a kind of random change during its actual enforcement, and its assembly layout kenel also may be more complicated.
See also Fig. 3, the functional block diagram of its master-slave mode leading load compensation voltage stabilizing device of the present invention for the present invention has shown.As shown in Figure 3, master-slave mode leading load compensation voltage stabilizing device of the present invention comprises voltage regulation unit 31, has main output stage 32 and a plurality of master-slave mode output stage from output stage 33, main control unit 34, control information delay cell 35 and output stage control module 36.
Below above-mentioned each unit is described in detail.
The master-slave mode output stage is connected with voltage regulation unit 31.In the present embodiment, particularly, the master-slave mode output stage comprises main output stage 32 and a plurality of from output stage 33, and wherein, the input end of main output stage 32 is connected with the output terminal of voltage regulation unit 31, is used for receiving the adjustment voltage V of voltage regulation unit 31
GATE, the output terminal output feedback voltage V of main output stage 32
FEEDBACKBe connected with the output terminal of voltage regulation unit 31 from the input end of output stage 33, be used for receiving the adjustment voltage V of voltage regulation unit 31
GATE, export the supply voltage that offers circuit load 40 core buffer from the output terminal of output stage 33.In addition, here, do not limit from the number of output stage 33, can adjust according to circuit load 40 and the working condition thereof of the core buffer in the practical application.
Output stage control module 36, be connected with main control unit 34, the job information that its role is to the described circuit load 40 that provides in advance according to main control unit 34 produces corresponding to a plurality of enable signals from output stage 33, utilize a plurality of switchings from output stage of enable signal control, feasible adapting from the number of output stage and the electric current of circuit load 40 of opening guarantees that the supply voltage of exporting keeps stable.
In addition, also comprise control information delay cell 35 between main control unit 34 and output stage control module 36, the job information that is mainly used in described circuit load that main control unit 34 is provided in advance postpones to handle.Like this, the job information of the described circuit load that main control unit 34 provides in advance utilizes the job information of 35 pairs of described circuit loads of control information delay cell to postpone to handle, and afterwards, is sent to output stage control module 36 again,
Master-slave mode leading load compensation voltage stabilizing device of the present invention, especially, provide a kind of like this voltage stabilizing mechanism, can be according to current variation in the job information of circuit load, adjust in the stable-pressure device unlatching number from output stage adaptively, keep stable with the supply voltage of guaranteeing to export.
Please continue to consult Fig. 4 and Fig. 5, wherein, Fig. 4 has shown among Fig. 3 from formula leading load compensation voltage stabilizing device functional block diagram in one embodiment, and Fig. 5 has shown that master-slave mode leading load compensation voltage stabilizing device of the present invention is applied to core buffer data path work schedule synoptic diagram.
As shown in Figure 4, in the present embodiment, alternatively, voltage regulation unit 31 comprises operational amplifier.Comprise in the circuit load 40 for the structure that receives, drives host data and reception, driving internal storage data, because described structure and support device thereof are prior art well-known to those skilled in the art, so repeat no more.
In conjunction with Fig. 3 and Fig. 4, when the master-slave mode leading load compensation voltage stabilizing device in the application present embodiment, the working condition of main control unit 34 real-time monitoring circuit loads, and under the situation that the working condition of circuit load 40 changes, provide the job information of circuit load 40 in advance (here, be changed to example with electric current), the job information of circuit load 40 is sent to output stage control module 36 after handling through the delay of control information delay cell 35, output stage control module 36 produces corresponding enable signal with definite unlatching number from output stage 33 and guarantees that the supply voltage of exporting keeps stable according to the job information of circuit load 40, that is: when the working current of circuit load 40 is constant, keeps opening numbers from output stage 33 and remain unchanged; When the working current of circuit load 40 becomes big (in the time of for example will carrying out read operation or write operation), produce and open the more enable signal from output stage of more number, make from the corresponding increase of number of output stage 33 unlatchings, with the supply voltage V that prevents from exporting
REGDescend; When the working current of circuit load 40 diminishes (when for example read operation or write operation close to an end), produce the enable signal from output stage 33 of closing some, make from the corresponding minimizing of number of output stage 33 unlatchings, with the supply voltage V that prevents from exporting
REGRise.
Fig. 5 has shown that specifically (core buffer reads DATA# 0 from main frame to internal memory write operation of core buffer experience, send DATA# 0 to internal memory immediately) the then work schedule signal of an internal memory read operation (core buffer reads DATA# 1 from internal memory, sends DATA# 1 to main frame immediately).Now reading DATA# 0 with core buffer from main frame is that example describes: main control unit 34 at first notifies the Memory Controller Hub load circuit to receive host data DATA# 0, load circuit is carried out corresponding actions subsequently, load current thereby increase to I1 until this release by I0, control information delay cell 35 postpones the order of the reception host data that main control unit 34 sends to be sent to output stage control module 36 after the t0, in the appropriate moment fan-out capability is increased to I1 by I0 with the control output stage, to reduce output supply voltage V
REGFluctuation.Other each action (for example comprising: send DATA# 0, read DATA# 1, send DATA# 1 to main frame from internal memory to internal memory) is similar from the operating process that main frame reads DATA# 0 with aforesaid core buffer, does not repeat them here.
Please consult Fig. 6 separately, it has shown the circuit diagram of master-slave mode leading load compensation voltage stabilizing device of the present invention in a kind of specific implementation.
In this specific implementation, what described voltage regulation unit adopted is operational amplifier; Described main output stage and described what adopt from output stage is nmos pass transistor; In described output stage control module and each as from also comprising a PMOS transistor as gauge tap between the NMOS pipe of output stage.Particularly, the NMOS as main output stage manages N
mGrid be connected with output terminal as the operational amplifier of voltage regulation unit, NMOS manages N
mSource electrode output feedback voltage, NMOS manages N
mDrain electrode and PMOS pipe P as switch control
mDrain electrode connect, PMOS manages P
mGrounded-grid; As the NMOS pipe N from output stage
0, N
1, N
2..., N
nGrid be connected with output terminal as the operational amplifier of voltage regulation unit, NMOS manages N
0, N
1, N
2..., N
nSource electrode link to each other with the output supply voltage each NMOS pipe N
i(the corresponding PMOS transistor P as gauge tap with it of 0≤i≤n)
i(drain electrode of 0≤i≤n) connects, each PMOS transistor P
i(source electrode of 0≤i≤n) is connected with output stage control module 36 for receiving enable signal en_i (0≤i≤n), all PMOS transistor P
i(source electrode and the PMOS transistor P of 0≤i≤n)
mSource electrode link to each other and be connected to power supply.
When the master-slave mode leading load compensation voltage stabilizing device in this concrete application of application, described main control unit is monitored the working condition of load in real time, provide the changing condition of the electric current of described circuit load in advance, changing condition with described electric current after the delay of the described control information delay cell of process is handled is sent to described output stage control module, described output stage control module produces corresponding enable signal to determine described unlatching number from output stage and to guarantee that the supply voltage of exporting keeps stable according to the changing condition of the electric current of circuit load, that is: when the working current of circuit load is constant, the output stage control module is not operated or is made current enable signal remain unchanged, and keeps opening number from output stage 33 and remains unchanged; When the working current of circuit load becomes big (in the time of for example will carrying out read operation or write operation), the more enable signal from output stage of more number (be about to the original of some and be converted to high level for low level enable signal), feasible more PMOS transistor P as gauge tap are opened in generation
i(0≤i≤n) open makes as the NMOS pipe N from output stage
i(0≤i≤n) the corresponding increase of number of unlatching is with the supply voltage V that prevents from exporting
REGDescend; When the working current of circuit load diminishes (when for example read operation or write operation close to an end), the enable signal from output stage 33 (what be about to some originally was converted to low level for the enable signal of high level) of some is closed in generation, make from the corresponding minimizing of number of output stage 33 unlatchings, with the supply voltage V that prevents from exporting
REGRise.
In sum, the master-slave mode leading load compensation voltage stabilizing device that is applied to the core buffer circuit provided by the invention, working condition that can the real-time monitoring circuit load, provide the job information of circuit load in advance, according to the job information of described circuit load produce corresponding to a plurality of described from output stage so that a plurality of described enable signal that opens and closes of carrying out from output stage, thereby the described number of realize to make opening from output stage is the changing condition with the circuit load electric current to be complementary, guarantee that the supply voltage of exporting keeps stable, improves circuit load circuit performance and functional reliability.
Above-described embodiment just lists expressivity principle of the present invention and effect is described, but not is used for restriction the present invention.Any personnel that are familiar with this technology all can make amendment to above-described embodiment under spirit of the present invention and scope.Therefore, the scope of the present invention should be listed as claims.
Claims (9)
1. a master-slave mode leading load compensation voltage stabilizing device that is applied to the core buffer circuit is characterized in that, comprising:
Voltage regulation unit has the input end that receives reference voltage and feedback voltage and the output terminal of adjusting voltage according to described reference voltage and the generation of described feedback voltage of reception;
The master-slave mode output stage, comprise the main output stage that is connected respectively with the output terminal of described voltage regulation unit and a plurality of from output stage, described main output stage output feedback voltage, described main output stage is exported described feedback voltage, and described a plurality of one or more outputs from output stage offer the supply voltage of circuit load in the described core buffer;
Main control unit is used for the working condition of the described core buffer circuit load of monitoring, and provides the job information of described circuit load under the situation that the working condition of described circuit load changes in advance;
The output stage control module that is connected with described main control unit, the job information that is used for the described circuit load that provides in advance according to described main control unit produce corresponding to a plurality of described from output stage so that a plurality ofly describedly carry out the enable signal that opens and closes from output stage, guarantee that the supply voltage of exporting keeps stable.
2. master-slave mode leading load compensation voltage stabilizing device according to claim 1, it is characterized in that, between described main control unit and described output stage control module, also comprise control information delay cell, be sent to described output stage control module again after the job information that is used for described circuit load that described main control unit is provided in advance postpones to handle.
3. master-slave mode leading load compensation voltage stabilizing device according to claim 1 is characterized in that described voltage regulation unit comprises operational amplifier.
4. according to claim 1 or 3 described master-slave mode leading load compensation voltage stabilizing devices, it is characterized in that, described main output stage comprises nmos pass transistor, and the grid of described nmos pass transistor connects the output terminal of described voltage regulation unit, the source electrode output feedback voltage of described nmos pass transistor.
5. master-slave mode leading load compensation voltage stabilizing device according to claim 4, it is characterized in that, describedly comprise nmos pass transistor from output stage, the grid of described nmos pass transistor connects the output terminal of described voltage regulation unit, the source electrode output supply voltage of described nmos pass transistor.
6. master-slave mode leading load compensation voltage stabilizing device according to claim 1 or 5, it is characterized in that, described from also comprising between the output stage for control the described gauge tap that opens and closes of carrying out from output stage according to enable signal at described output stage control module and each.
7. master-slave mode leading load compensation voltage stabilizing device according to claim 6, it is characterized in that, described gauge tap comprises the PMOS transistor, described PMOS transistor drain connects described output stage control module to receive described enable signal, the transistorized source electrode of described PMOS connects power supply, and described PMOS transistor drain connects described from output stage.
8. master-slave mode leading load compensation voltage stabilizing device according to claim 1 is characterized in that the job information of described circuit load comprises the electric current change information of circuit load.
9. master-slave mode leading load compensation voltage stabilizing device according to claim 8, it is characterized in that, the job information that described output stage control module is used for the described circuit load that provides in advance according to described main control unit produce corresponding to a plurality of described from output stage so that a plurality of described enable signal that opens and closes of carrying out from output stage, guarantee that the supply voltage of exporting keeps stable, comprise: when the working current of circuit load is constant, describedly opens number from output stage and remain unchanged; When the working current of circuit load becomes big, produce and open the more enable signal from output stage of more number, make to descend the described corresponding increase of number of opening from output stage with the supply voltage that prevents from exporting; When the working current of circuit load diminishes, produce the enable signal from output stage close some, make the described corresponding minimizing of number of opening from output stage, rise with the supply voltage that prevents from exporting.
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| CN105425882A (en) * | 2015-12-17 | 2016-03-23 | 中颖电子股份有限公司 | Method for improving transient response of voltage stabilizer and voltage stabilizer thereof |
| TWI573115B (en) * | 2016-03-11 | 2017-03-01 | 奕力科技股份有限公司 | Buffer circuit having an enhanced slew-rate and source driving circuit including the same |
| CN108170195A (en) * | 2016-12-07 | 2018-06-15 | 矽统科技股份有限公司 | Source follower |
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| CN103186159B (en) | 2014-09-24 |
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Address after: A6, No. 900 Yishan Road, Xuhui District, Shanghai, 2003 Patentee after: Lanqi Technology Co., Ltd. Address before: Room 406A, 4th floor, 32 Guiping Road, Xuhui District, Shanghai, 2003 Patentee before: Acrospeed, Inc. |