CN103177942A

CN103177942A - Doping method for PMOS (p-channel metal oxide semiconductor) tube

Info

Publication number: CN103177942A
Application number: CN2013100648378A
Authority: CN
Inventors: 吕燕翔; 居勤坤; 史仁龙; 万传友; 彭芳美; 周国忠
Original assignee: LIYANG HONGXIANG MACHINERY MANUFACTURING Co Ltd
Current assignee: LIYANG HONGXIANG MACHINERY MANUFACTURING Co Ltd
Priority date: 2013-03-01
Filing date: 2013-03-01
Publication date: 2013-06-26
Anticipated expiration: 2033-03-01
Also published as: CN103177942B

Abstract

The invention discloses a doping method for a PMOS (p-channel metal oxide semiconductor) tube. A first ion implantation step and a second ion implantation step are performed alternatively, and a rigid mask layer is used for shielding, so that doping of a substrate can be completed without rotations of the substrate.

Description

A kind of doping method of PMOS pipe

Technical field

The invention belongs to semiconductor integrated circuit and make the field, relate in particular to a kind of doping method of PMOS pipe.

Background technology

In the semiconductor integrated circuit field, the PMOS transistor is one of base unit of various circuit.Along with the development of information technology, more and more higher for the processing speed requirement of information data, require also more and more higher to the transistorized frequency response characteristic of the PMOS that wherein adopts.Yet how the transistorized parasitic capacitance of PMOS reduces these parasitic capacitances to the impact of PMOS operational amplifier along with increasing negative effect is played in the rising of operating frequency, has become the key that improves PMOS transistor frequency response characteristic.

Please refer to Fig. 1, it is to make the transistorized doping method of PMOS in prior art, the steps include: to form the N-type trap on P type substrate 100, form gate oxide 103 and hard mask layers 104 on the surface of this N-type trap, adopt Implantation (200 in Fig. 1) technique that the N-type trap is adulterated, to form source region 101 and the drain region 102 of P type.

In this existing doping method, in theory, when carrying out Implantation, should adjust in advance the ion beam emitter, and make ion beam that the ion beam emitter launches perpendicular to substrate surface.Due to the mode that adopts vertical Implantation, therefore, its parasitic capacitance can't effectively reduce.

Chinese patent application 2009101958587 discloses a kind of doping method, the method forms grid structure on Semiconductor substrate, and after grid structure both sides formation side wall layer, adjust the angle of ion beam, and making the vertical direction of ion beam and substrate surface keep a fixed angle, half of the ion implantation dosage that employing is default carried out light dope or heavy doping to the substrate of grid both sides; Then, with wafer Rotate 180 degree in the horizontal direction, half that adopts default ion implantation dosage carried out light dope or heavy doping to the substrate of grid both sides again, forms lightly doped drain and light dope source electrode, or drain electrode and source electrode.Although this method can reach the effect that reduces parasitic capacitance, but this method is in the doping process, after it carries out the doping of a half-value dose at first at a certain angle, also need wafer is carried out the doping of second half dosage after the Rotate 180 degree in the horizontal direction again, therefore, this method must be through the process of " half-value dose doping-doping stops-Rotate 180 degree-half-value dose doping again " in the doping process, and the efficient of the method for this twice doping can not be satisfactory.

Summary of the invention:

The technical problem to be solved in the present invention is to provide and a kind ofly can effectively reduces parasitic capacitance, the doping method that can raise the efficiency again.

The doping method of the PMOS pipe that the present invention proposes comprises the steps:

1. the method by Impurity Diffusion forms the N-type trap on the P type semiconductor substrate;

2. after forming gate oxide on the surface of N-type trap, deposit hard mask layers on gate oxide;

3. the Implantation for the first time in drain region: the N-type trap is adulterated from the horizontal by the angle of α with ion beam, impurity is p type impurity, and dopant dose is 1/2 of the total dopant dose in drain region; Wherein, the height of hard mask layers is: when carrying out the Implantation for the first time in drain region, by blocking of this hard mask layers, ion beam only can adulterate to the drain region, and the source region is without Implantation;

4. the Implantation for the first time in source region: with ion beam from the horizontal by (90 °+α) angle is adulterated to the N-type trap, and impurity is p type impurity, and dopant dose is 1/2 of the total dopant dose in source region; Wherein, the height of hard mask layers is: when carrying out the Implantation for the first time in source region, by blocking of this hard mask layers, ion beam only can adulterate to the source region, and the drain region is without Implantation;

5. the Implantation for the second time in drain region: repeating step 3, until the doping of all dosage is completed in the drain region.

6. the Implantation for the second time in source region: repeating step 4, until the doping of all dosage is completed in the source region.

7. PMOS pipe after completing doping is annealed, to activate impurity.

Description of drawings:

Fig. 1 is the doping method schematic diagram of existing PMOS pipe.

Fig. 2 is the schematic diagram of the doping method of the PMOS pipe that proposes of the present invention.

Embodiment:

Below by embodiment, the doping method that the present invention proposes is elaborated.

Embodiment

As shown in Figure 2, the doping method of the present invention's proposition comprises the steps:

1. the method by Impurity Diffusion forms the N-type trap on P type semiconductor substrate 100,

2. after this form gate oxide 103, deposit hard mask layers 105 on gate oxide 103 on the surface of this N-type trap;

3. the Implantation for the first time in drain region 102: the N-type trap is adulterated from the horizontal by the angle of α with ion beam 200, impurity is p type impurity, and dopant dose is 1/2 of drain region 102 total dopant doses; Wherein, the height of hard mask layers 105 is: when carrying out the Implantation for the first time in drain region 102, by blocking of this hard mask layers 105, ion beam 200 only can adulterate to drain region 102, and source region 101 is without Implantation; Namely as shown in Figure 2, when carrying out the Implantation for the first time in drain region 102, due to blocking of hard mask layers 105, ion beam 200 ' (its direction is parallel with ion beam 200) can't carry out Implantation to source region 101;

4. the Implantation for the first time in source region 101: with ion beam 201 from the horizontal by (90 °+α) angle is adulterated to the N-type trap, and impurity is p type impurity, and dopant dose is 1/2 of source region 101 total dopant doses; Wherein, the height of hard mask layers 105 is: when carrying out the Implantation for the first time in source region 101, by blocking of this hard mask layers 105, ion beam 201 only can adulterate to source region 101, and drain region 102 is without Implantation; Namely as shown in Figure 2, when carrying out the Implantation for the first time in source region 101, due to blocking of hard mask layers 105, ion beam 201 ' (its direction is parallel with ion beam 201) can't carry out Implantation to drain region 102;

5. the Implantation for the second time in drain region 102: repeating step 3, until the doping of all dosage is completed in drain region 102.

6. the Implantation for the second time in source region 101: repeating step 4, until the doping of all dosage is completed in source region 101

7. after P type semiconductor substrate 100 being completed doping, this P type semiconductor substrate is annealed, to activate impurity.Wherein, when the N-type trap being carried out source region 101 and drain region 102 doping, the kind of ion selects P type ion to inject, as boron ion or indium ion; If adopt the boron ion, its Implantation Energy is 4～10Kev, and implantation dosage is 5 * 10 ¹⁵～1 * 10 ¹⁶/ cm ²If employing indium ion, its Implantation Energy are 20～40Kev, implantation dosage is 1 * 10 ¹⁵～1 * 10 ¹⁶/ cm ²

The step of wherein, the PMOS pipe being annealed can adopt the method for annealing of ability routine.

The doping method that the present invention proposes, by adopting source region and drain region Implantation to hocket, and by the blocking of hard mask layers, thereby complete doping to source region and drain region in the situation that need not to rotate substrate, so its step that need not to rotate, its efficient is more excellent.

Above execution mode is described in detail the present invention, but above-mentioned execution mode is not in order to limit scope of the present invention, and protection scope of the present invention is defined by the appended claims.

Claims

1. the doping method of a PMOS pipe comprises the steps:

(1). the method by Impurity Diffusion on the P type semiconductor substrate forms the N-type trap;

(2). after forming gate oxide on the surface of N-type trap, deposit hard mask layers on gate oxide;

(3). the Implantation for the first time in drain region: the N-type trap is adulterated from the horizontal by the angle of α with ion beam, impurity is p type impurity, and dopant dose is 1/2 of the total dopant dose in drain region; Wherein, the height of hard mask layers is: when carrying out the Implantation for the first time in drain region, by blocking of this hard mask layers, ion beam only can adulterate to the drain region, and the source region is without Implantation;

(4). the Implantation for the first time in source region: with ion beam from the horizontal by (90 °+α) angle is adulterated to the N-type trap, and impurity is p type impurity, and dopant dose is 1/2 of the total dopant dose in source region; Wherein, the height of hard mask layers is: when carrying out the Implantation for the first time in source region, by blocking of this hard mask layers, ion beam only can adulterate to the source region, and the drain region is without Implantation;

(5). the Implantation for the second time in drain region: repeating step (3), until the doping of all dosage is completed in the drain region;

(6). the Implantation for the second time in source region: repeating step (4), until the doping of all dosage is completed in the source region;

(7). the PMOS pipe of completing after doping is annealed, to activate impurity.

2. the doping method of PMOS pipe as claimed in claim 1 is characterized in that:

Wherein said when the N-type trap is carried out 102 doping of source region 101 and drain region, the kind of ion selects P type ion to inject, as boron ion or indium ion; If adopt the boron ion, its Implantation Energy is 4～10Kev, and implantation dosage is 5 * 10 ¹⁵～1 * 10 ¹⁶/ cm ²If employing indium ion, its Implantation Energy are 20～40Kev, implantation dosage is 1 * 10 ¹⁵～1 * 10 ¹⁶/ cm ²