CN103166750B - Synchronizing clock time source collocation method and device - Google Patents
Synchronizing clock time source collocation method and device Download PDFInfo
- Publication number
- CN103166750B CN103166750B CN201110417111.9A CN201110417111A CN103166750B CN 103166750 B CN103166750 B CN 103166750B CN 201110417111 A CN201110417111 A CN 201110417111A CN 103166750 B CN103166750 B CN 103166750B
- Authority
- CN
- China
- Prior art keywords
- network element
- clock
- time
- clock time
- network
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0658—Clock or time synchronisation among packet nodes
- H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
- H04J3/0667—Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0641—Change of the master or reference, e.g. take-over or failure of the master
Abstract
The invention discloses synchronizing clock time source collocation method and device, this method includes：According to the network planning of clock time network, first node network element, end-node network element and the intermediate node network element in clock time network are determined；It is determined that from first node network element to the clock time relays link of end-node network element；Determine that the synchronizing clock time source of the first node network element in clock time relays link, end-node network element and intermediate node network element configures；Configured according to synchronizing clock time source, generation clock time network configuration topological sum clock time network dynamic operation topology；Based on the time network dynamic operation topology in clock time network dynamic operation topology, 1588 thing error detection links are determined.The present invention can avoid complexity and the mispairing of single network element configuration, easily and efficiently carry out clock time network configuration, Dynamic Maintenance clock time network.
Description
Technical field
The present invention relates to the communications field, in particular to a kind of synchronizing clock time source collocation method and device.
Background technology
With the high speed development of Network Information, the network size of large number quipments composition is increasing, also becomes increasingly complex,
Corresponding to the network size of node network elements up to a hundred, the synchronizing clock time source configuration of single network element can not meet engineer applied,
Especially when network is extremely complex, simple efficient clock time configuration requirement is stronger.
In correlation technique, in the network operation, general user's work order network element carries out synchronizing clock time source and matched somebody with somebody point by point
Put, because clock relays link network element number is limited, therefore just need conscientiously to plan clock time network, be also required to spy during configuration
Do not pay attention to.For the network of hundreds and thousands of network elements, synchronizing clock time source configuration it is pretty troublesome, it is easy to occur mispairing, clock into
Phenomena such as ring.
The content of the invention
Configured for synchronizing clock time source in correlation technique, general user's work order network element is configured point by point, very
The problem of easily causing mispairing, clock cyclization and propose the present invention, therefore, it is a primary object of the present invention to provide a kind of clock
Time synchronized source collocation method and device, to solve the above problems.
The invention provides a kind of synchronizing clock time source collocation method.This method includes：According to clock time network
The network planning, determine first node network element, end-node network element and intermediate node network element in clock time network；It is determined that saved from head
Clock time relays link of the point network element to end-node network element；Determine first node network element in clock time relays link, minor details
The configuration of the synchronizing clock time source of point network element and intermediate node network element；Configured according to synchronizing clock time source, when generating clock
Between network configuration topological sum clock time network dynamic operation topology；Based on the time in clock time network dynamic operation topology
Network dynamic operation topology, determines 1588 thing error detection links.
Preferably, in the network planning according to clock time network, first node network element in clock time network, end are determined
After node network element and intermediate node network element, in addition to：Determine first node network element, end-node network element and intermediate node network element
Clock time node type, wherein clock time node type, which includes clock type and time type, clock type, includes：
SSM modes, internal clock crystal oscillator grade, whether enable clock protection；Time type includes：Timing node type, time algorithm, report
Literary forwarding rate, local zone time precision.
Preferably, it is determined that the clock time relays link from first node network element to end-node network element includes：According to setting in advance
The priority of fixed clock time relays link, it is determined that a plurality of clock time transfer chain from first node network element to end-node network element
Road and its priority.
Preferably, the priority of clock time relays link set in advance is webmaster priority, wherein webmaster priority
Less than SSM credit rating priority.
Preferably, first node network element, end-node network element and the intermediate node network element in clock time relays link are determined
Synchronizing clock time source configuration include：Determine that the intermediate node network element conduct in clock time relays link must be through network element；Really
Surely must through network element synchronizing clock time source configure.
The time network dynamic operation topology being preferably based in clock time network dynamic operation topology, determines 1588
Thing error detection link includes：Determine 1588 thing error detection network elements in time network dynamic operation topology.
Preferably, after generation clock time network dynamic operation topology, in addition to：Determine in clock time network
1588 thing error detection network elements；According to the path between 1588 thing error detection network elements, 1588 thing error detections are determined
Link.
Preferably, clock time relays link includes one below：Clock relays link, 1588 Time Transmission links,
1588 thing error detection links.
Preferably, clock synchronisation source includes one below：When internal clock, external clock, gps clock, 1588 clocks, circuit are taken out
Clock, branch road take out clock etc..
Preferably, time synchronized source includes one below：If 1588 times were ETH1588, pass through two layers of mode of unicast
Configuring virtual LAN VLAN switching domains realize that 1588 paths configure between all network elements in time path, and determine must be through
The port type of network element 1588；If 1588 times were IP1588, pass through all network elements of the three layers of mode of unicast in time path
Upper configuration of IP is route to realize that 1588 paths configure, and determination must be through the port type of network element 1588.
The invention provides a kind of synchronizing clock time source configuration device.The device includes：First determining module, for root
According to the network planning of clock time network, first node network element, end-node network element and the middle node in clock time network are determined
Point network element；Second determining module, for determining the clock time relays link from first node network element to end-node network element；3rd is true
Cover half block, for determine the first node network element in clock time relays link, end-node network element and intermediate node network element when
Clock time synchronisation source configures；Generation module, for being configured according to synchronizing clock time source, generation clock time network configuration topology
Topology is run with clock time network dynamic；4th determining module, for based in clock time network dynamic operation topology
Time network dynamic operation topology, determines 1588 thing error detection links.
By the present invention, according to the network planning, it is same that clock time is carried out to all node network elements in clock time network
The end-to-end configuration in step source, configuration is simple and clear, can avoid mispairing and clock cyclization.
Brief description of the drawings
Accompanying drawing described herein is used for providing a further understanding of the present invention, forms the part of the application, this hair
Bright schematic description and description is used to explain the present invention, does not form inappropriate limitation of the present invention.In the accompanying drawings：
Fig. 1 is the flow chart of synchronizing clock time source collocation method according to embodiments of the present invention；
Fig. 2 is frequency clock according to the preferred embodiment of the invention synchronously/1588 end-to-end synchronisation source configuration of time synchronized
Schematic diagram；
Fig. 3 is the schematic diagram of 1588 thing error detection link configuration according to the preferred embodiment of the invention；
Fig. 4 is the structured flowchart of synchronizing clock time source configuration device according to embodiments of the present invention；
Fig. 5 is the structured flowchart one of synchronizing clock time source according to the preferred embodiment of the invention configuration device；
Fig. 6 is the structured flowchart two of synchronizing clock time source according to the preferred embodiment of the invention configuration device；
Fig. 7 is the structured flowchart three of synchronizing clock time source according to the preferred embodiment of the invention configuration device.
Embodiment
It should be noted that in the case where not conflicting, the feature in embodiment and embodiment in the application can phase
Mutually combination.Describe the present invention in detail below with reference to the accompanying drawings and in conjunction with the embodiments.
The invention provides a kind of synchronizing clock time source collocation method.When Fig. 1 is clock according to embodiments of the present invention
Between synchronisation source collocation method flow chart, as shown in figure 1, including steps S102 to step S110.
Step S102, according to the network planning of clock time network, determine first node network element in clock time network, end
Node network element and intermediate node network element.
Step S104, it is determined that from first node network element to the clock time relays link of end-node network element.
Step S106, determine first node network element, end-node network element and intermediate node net in clock time relays link
The synchronizing clock time source configuration of member.
Step S108, configured according to synchronizing clock time source, generate clock time network configuration topological sum clock time net
Network dynamic operation topology.
Step S110, based on the time network dynamic operation topology in clock time network dynamic operation topology, it is determined that
1588 thing error detection links.
In correlation technique, the general user's work order network element in synchronizing clock time source is configured point by point, it is easy to is caused
Mispairing, clock cyclization.In the embodiment of the present invention, according to the network planning, all node network elements in clock time network are carried out
The end-to-end configuration in synchronizing clock time source, configuration is simple and clear, can avoid mispairing and clock cyclization.
Preferably, in the network planning according to clock time network, first node network element in clock time network, end are determined
After node network element and intermediate node network element, in addition to：Determine first node network element, end-node network element and intermediate node network element
Clock time node type, wherein clock time node type, which includes clock type and time type, clock type, includes：
SSM modes, internal clock crystal oscillator grade, clock protection whether is enabled, time type includes：Timing node type, time algorithm, report
Literary forwarding rate, local zone time precision.
Preferably, it is determined that the clock time relays link from first node network element to end-node network element includes：According to setting in advance
The priority of fixed clock time relays link, it is determined that a plurality of clock time transfer chain from first node network element to end-node network element
Road and its priority.
Preferably, the priority of clock time relays link set in advance is webmaster priority, wherein webmaster priority
Less than SSM credit rating priority.
Preferably, first node network element, end-node network element and the intermediate node network element in clock time relays link are determined
Synchronizing clock time source configuration include：Determine that the intermediate node network element conduct in clock time relays link must be through network element；Really
Surely must through network element synchronizing clock time source configure.
The time network dynamic operation topology being preferably based in clock time network dynamic operation topology, determines 1588
Thing error detection link includes：Determine 1588 thing error detection network elements in time network dynamic operation topology.
Preferably, clock time relays link includes one below：Clock relays link, 1588 Time Transmission links,
1588 thing error detection links.
Preferably, clock synchronisation source includes one below：When internal clock, external clock, gps clock, 1588 clocks, circuit are taken out
Clock etc..
Preferably, time synchronized source includes one below：If 1588 times were ETH1588, pass through two layers of mode of unicast
Between all network elements in time path configuring virtual LAN VLAN switching domains come realize 1588 paths configure, and determine 1588
Time port type；If 1588 times were IP1588, matched somebody with somebody by three layers of mode of unicast on all network elements in time path
IP routes are put to realize that 1588 paths configure, and determine 1588 time port types.
It is described in greater detail respectively with reference to example.
Example one：End-to-end configuration the whole network clock synchronization source path configuration.
Planned according to clock network, when determining first node network element, end-node network element, intermediate node network element, and specifying the whole network
Clock parameter, including but not limited to：SSM modes, internal clock crystal oscillator grade, whether enable clock protection etc..When determining in network
Clock relays link, by network topological diagram, carry out end-to-end configuration the whole network network element clock synchronisation source, specify must through intermediate NE,
The clock synchronisation source configuration of intermediate node network element is completed, it includes the steps.
Webmaster starts end-to-end clock synchronisation source configuration；
Global configuration clock algorithm parameter, include but is not limited to：SSM byte modes (ITU-T standard, it is self-defined, without using
SSM), internal clock crystal oscillator grade, whether enable clock protection etc.
Planned according to clock network, determine first node network element, end-node network element, intermediate node network element.
Clock relays link in network is determined, by network topological diagram, it is synchronous to carry out end-to-end configuration the whole network network element clock
Source, the clock synchronisation source configuration that intermediate node network element through intermediate NE, must be completed is specified, it includes the steps.
By network topological diagram, end-to-end clock synchronisation source configuration is carried out, specifies clock relays link, must be through mid-level net
Member, complete the clock synchronisation source configuration of intermediate node network element；
A plurality of clock relays link must be may specify, and set webmaster priority through network element by specifying；Webmaster priority is less than
SSM credit ratings, using SSM credit ratings as first.
The whole network network element line clock source mode is configured, multidirectional circuit is can configure and takes out clock, can also be configured internal clock, outer
Clock, gps clock, 1588 clocks etc., webmaster priority is set；When must be through network element due to specifying, that is, clock route be specified,
Therefore configuration intermediate node network element can be omitted and take out line clock.According to must be through network element, intermediate node network element, which automatically configures, takes out circuit
Clock.
According to clock configuring condition, clock Configuration network topological diagram is generated；
According to clock lock situation, clock operational network topological diagram is generated；Alerted according to path link, monitoring clock locking
Direction, dynamic tracking clock operational network topology.
Example two：End-to-end 1588 time synchronized source configuration.
Planned according to 1588 time networks, multiple Grandmaster network elements are specified, by different Grandmaster network elements shapes
Into 1588 times end-to-end configuration first and last network element, by network topological diagram, end-to-end 1588 time port configuration is carried out, is specified
Must through network element, must through link (port), complete network in whole node network elements 1588 time ports configuration, it include as follows
Step.
Webmaster starts end-to-end 1588 time configuration.
Global configuration time field parameter, include but is not limited to：Time-domain, domain Time delay measurement mechanism, 1588 protocol massages hair
Send parameter, Time synchronization algorithm etc. parameter.
Planned according to 1588 time networks, multiple Grandmaster network elements are specified, by different Grandmaster network elements shapes
Into 1588 times end-to-end configuration first and last network element, 1588 Time Transmission path first and last node network elements are specified.
By network topological diagram, end-to-end 1588 time path configuration is carried out, specifying must be through network element (with binding next-hop IP
Location), must be through link (binding vlan domain).
If 1588 time is ETH1588, methods described is by two layers of mode of unicast in the time path
Between all network elements configuring virtual LAN VLAN switching domains come realize 1588 paths configure；If 1588 time is
IP15888, then methods described by three layers of mode of unicast on all network elements in the time path configuration of IP route and carry out reality
Existing 1588 paths configuration.
First and last node, 1588 time types of intermediate node network element are configured, are included but is not limited to：Timing node type, when
Between grade parameters, 1588 protocol package sending modes (over ETH or over UDP), mode of operation etc..
According to 1588 time path configuring conditions, 1588 Time Transmission Configuration network topological diagrams are generated.
According to 1588 time running situations, the true operational network topological diagram of 1588 Time Transmissions is generated.
According to chain circuit alarming, supervised path change, dynamic tracks 1588 time networks topology.
Example three：End-to-end 1588 time error monitoring path configuration.
The whole network must be set up 1588 time nets, 1588 time path configuration successfuls first.1588 Time Transmissions are truly run
Network topological diagram, end-to-end 1588 thing error detection link configuration is carried out, specify monitoring path first and last node, while specify must
Through network element, must be through link (port), it includes the steps.
On the basis of the true operational network topological diagram of 1588 Time Transmissions has generated, when webmaster starts end-to-end 1588
Between error-detecting link configuration.
Specify 1588 thing error detection links, first and last node network element.
Specify must through network element (binding next-hop ip address), must be through link (binding vlan domain).
If 1588 time is ETH1588, methods described is by two layers of mode of unicast in the time path
Between all network elements configuring virtual LAN VLAN switching domains come realize 1588 paths configure；If 1588 time is
IP15888, then methods described by three layers of mode of unicast on all network elements in the time path configuration of IP route and carry out reality
Existing 1588 paths configuration.
Generate 1588 thing error detection path lines figures.
From the foregoing, it will be observed that the configuration of end-to-end synchronizing clock time source, including frequency clock synchronously end-to-end configuration, 1588 times
Synchronous end-to-end configuration, the configuration of 1588 thing error detection end-to-end links, can carry out end-to-end path by network topology
Configuration, specify first and last node network element, must through network element, the configuration of the whole network clock time end-to-end path must be reached through link.Eliminate
The artificial single single network element of network element carries out the complexity of clock time configuration, suitable for the bigger network of scale.Basis simultaneously
Clock time topology dynamic change, the failure in path can be found in time, beneficial to maintenance.
The implementation process of the embodiment of the present invention is described in detail below in conjunction with example.
Preferred embodiment one
This preferred embodiment one describes frequency clock synchronization, the process of the end-to-end configuration of 1588 time synchronizeds.
Fig. 2 is frequency clock according to the preferred embodiment of the invention synchronously/1588 time synchronized end-to-end path configuration
Schematic diagram, as shown in Fig. 2 according to network topological diagram, network element 1, network element 2, network element 3, network element 4, network element 5, network element 6 form looped network.
Configuration network global clock parameter, include but is not limited to：SSM byte modes, clock ID protections etc..SSM bytes
Mode includes but is not limited to：ITU-T standard, self-defined mode, without using SSM.
According to the network planning, first node network element, end-node network element are determined, specifies first and last network element external clock or internal clock reference
Source.First node network element 1, end-node network element 4.
Mulitpath must be may specify through network element by specifying, and set webmaster priority, and wherein webmaster priority is less than SSM matter
Grade is measured, such as is specified：
Network element 1--- network element 2--- network element 3--- network elements 4, priority 1；
Network element 1--- network element 3--- network elements 4, priority 2；
Network element 1--- network element 6--- network element 5--- network elements 4, priority 3.
First and last node network element clock source is configured, webmaster priority, such as internal clock, external clock, gps clock, 1588 are set
Clock etc..
Configuration the whole network node network element circuit takes out clock synchronisation source, can configure multidirectional circuit and takes out clock synchronisation source, also may be used
Internal clock, external clock, gps clock, 1588 clocks etc. are configured, webmaster priority is set；When must be through network element due to specifying, that is, specify
Clock transfer route, therefore configuration intermediate node network element can be omitted and take out line clock.According to must be through network element, the whole network node network element
Automatically configure and take out line clock.
After the completion of configuration, clock synchronisation source configuration topological diagram is automatically generated.
If enabling SSM modes, according to SSM credit ratings, the high line clock of automatic lock mass, it is true to generate clock
Real-time clock (RTC) synchronisation source operational network topological diagram.
Such as network element 1--- network element 2--- network element 3--- network elements 4, priority 1, but reach network element 4 and jumped by 2；
Network element 1--- network element 3--- network elements 4, priority 2, but network element 4 is reached, only jumped by 1.
Then the line clock SSM mass of priority 2 is higher than, the line clock of priority 1, so network element 4 will lock preferentially
The line clock of level 2.
Preferred embodiment two
This preferred embodiment two describes the process of 1588 time ports configuration.
As shown in Fig. 2 according to network topological diagram, network element 1, network element 2, network element 3, network element 4, network element 5, network element 6.Webmaster starts
End-to-end 1588 time port configuration.
Setup time field parameter first, include but is not limited to：Time-domain, domain Time delay measurement mechanism, 1588 protocol massages hair
Send parameter, Time synchronization algorithm etc. parameter.
Specify 1588 Time Transmission path first and last node network elements, such as first node network element 1, end-node network element 4.
First and last node, 1588 time types of intermediate node network element are configured, are included but is not limited to：Timing node type, when
Between grade parameters, 1588 protocol package sending modes (over ETH or over UDP), mode of operation etc..
Specify must through network element (binding next-hop ip address), mulitpath must be may specify through link (binding vlan domain), and
Webmaster priority is set, such as specified：
Network element 1--- network element 2--- network element 3--- network elements 4, priority 1；
Network element 1--- network element 3--- network elements 4, priority 2；
Network element 1--- network element 6--- network element 5--- network elements 4, priority 3.
Automatically generate 1588 Time Transmission Configuration network topological diagrams.
According to actual conditions, the true operational network topological diagram of 1588 Time Transmissions is generated；Supervised path changes, according to link
Alarm, dynamic track 1588 time networks topology.
Preferred embodiment three
This preferred embodiment three describes the process of 1588 thing error detection end-to-end paths configuration.
Fig. 3 is the schematic diagram of the end-to-end configuration of 1588 thing error detection according to the preferred embodiment of the invention, such as Fig. 3 institutes
Show, on the basis of 1588 time topological diagrams have generated, configure 1588 thing error detection paths between non-adjacent network element, supervise
1588 time errors between survey grid member 6---- network elements 8.
1588 time dynamic operation topological diagrams have generated.
Webmaster starts end-to-end 1588 time error monitoring configuration, and selected first and last node network element is：Network element 6, network element 8.
Specify must through network element, must be through link：Network element 6---- link 1------ network element 3----- link 2---- network elements
5--- link 3---- network element 10--- link 4--- network elements 8.
Because network element and IP address are bound, given link be may specify must through port, and port and vlan domain binding.
By specify must through network element, must be through link, you can specify a unique 1588 time error monitoring path.
After the completion of the configuration of path, you can detection is transmitted between the Passive ports of first and last node network element, Master ports
Message, detect 1588 time errors.
It should be noted that can be in such as one group of computer executable instructions the flow of accompanying drawing illustrates the step of
Performed in computer system, although also, show logical order in flow charts, in some cases, can be with not
The order being same as herein performs shown or described step.
The embodiments of the invention provide a kind of synchronizing clock time source configuration device, the synchronizing clock time source configuration device
It can be used for realizing above-mentioned synchronizing clock time source collocation method.Fig. 4 is synchronizing clock time source according to embodiments of the present invention
The structured flowchart of configuration device, as shown in figure 4, including the first determining module 42, the second determining module 44 and the 3rd determining module
46.It is described in greater detail below.
First determining module 42, for the network planning according to clock time network, determine the head in clock time network
Node network element, end-node network element and intermediate node network element；Second determining module 44, the first determining module 42 is connected to, is used for
It is determined that during the clock for the end-node network element that the first node network element determined from the first determining module 42 determines to the first determining module 42
Between relays link；3rd determining module 46, be connected to the second determining module 44, for determine the second determining module 44 determine when
The synchronizing clock time source configuration of first node network element, end-node network element and intermediate node network element in clock time relays link；
Generation module 48, the 3rd determining module 46 is connected to, the synchronizing clock time source for being determined according to the 3rd determining module 46 is matched somebody with somebody
Put, generation clock time network configuration topological sum clock time network dynamic operation topology；4th determining module 410, is connected to
Generation module 48, the clock time network dynamic for being generated based on generation module 48 run the time network dynamic in topology
Operation topology, determines 1588 thing error detection links.
Fig. 5 is the structured flowchart one of synchronizing clock time source according to the preferred embodiment of the invention configuration device, such as Fig. 5 institutes
Show, said apparatus also includes：5th determining module 412, for determining first node network element, end-node network element and intermediate node net
The clock time node type of member, wherein clock time node type, which include clock type and time type, clock type, to be included：
SSM modes, internal clock crystal oscillator grade, clock protection whether is enabled, time type includes：Timing node type, time algorithm,
Message forwarding rate, local zone time precision.
Fig. 6 is the structured flowchart two of synchronizing clock time source according to the preferred embodiment of the invention configuration device, such as Fig. 6 institutes
Show, the second determining module 44 includes：Determination sub-module 442, for according to the preferential of clock time relays link set in advance
Level, it is determined that a plurality of clock time relays link and its priority from first node network element to end-node network element.
Fig. 7 is the structured flowchart three of synchronizing clock time source according to the preferred embodiment of the invention configuration device, such as Fig. 7 institutes
Show, above-mentioned clock time path configuration device also includes：Setup module 414, for presetting clock time relays link
Priority is that webmaster priority is less than SSM credit rating priority.
It should be noted that the synchronizing clock time source configuration device described in device embodiment corresponds to above-mentioned method
Embodiment, its concrete implementation process had carried out detailed description in embodiment of the method, will not be repeated here.
In summary, according to the abovementioned embodiments of the present invention, there is provided a kind of synchronizing clock time source collocation method and dress
Put.By the present invention, clock time path is configured according to the network planning, mispairing and clock cyclization can be avoided, it is convenient
The failure in clock time path is found in time.
Obviously, those skilled in the art should be understood that above-mentioned each module of the invention or each step can be with general
Computing device realize that they can be concentrated on single computing device, or be distributed in multiple computing devices and formed
Network on, alternatively, they can be realized with the program code that computing device can perform, it is thus possible to they are stored
Performed in the storage device by computing device, either they are fabricated to respectively each integrated circuit modules or by they
In multiple modules or step be fabricated to single integrated circuit module to realize.So, the present invention is not restricted to any specific
Hardware and software combines.
The preferred embodiments of the present invention are the foregoing is only, are not intended to limit the invention, for the skill of this area
For art personnel, the present invention can have various modifications and variations.Within the spirit and principles of the invention, that is made any repaiies
Change, equivalent substitution, improvement etc., should be included in the scope of the protection.
Claims (10)
- A kind of 1. synchronizing clock time source collocation method, it is characterised in that including：According to the network planning of clock time network, first node network element, the end-node network element in the clock time network are determined And intermediate node network element；It is determined that from the first node network element to the clock time relays link of the end-node network element；Determine the first node network element, the end-node network element and the intermediate node in the clock time relays link The synchronizing clock time source configuration of network element；Configured according to synchronizing clock time source, the network dynamic operation of generation clock time network configuration topological sum clock time is opened up Flutter；Based on the time network dynamic operation topology in clock time network dynamic operation topology, 1588 time errors are determined Detect link.
- 2. according to the method for claim 1, it is characterised in that in the network planning according to clock time network, determine institute After stating first node network element in clock time network, end-node network element and intermediate node network element, in addition to：Determine the head The clock time node type of node network element, the end-node network element and the intermediate node network element, wherein during the clock Segmentum intercalaris vertex type includes clock type and time type, and the clock type includes：SSM modes, internal clock crystal oscillator grade, whether Enable clock protection；The time type includes：Timing node type, time algorithm, message forwarding rate, local zone time essence Degree.
- 3. according to the method for claim 1, it is characterised in that it is determined that from the first node network element to the end-node network element Clock time relays link include：According to the priority of clock time relays link set in advance, it is determined that being saved from the head A plurality of clock time relays link and its priority of the point network element to the end-node network element.
- 4. according to the method for claim 3, it is characterised in that the clock time relays link set in advance it is preferential Level is webmaster priority, and the webmaster priority is less than SSM credit rating priority.
- 5. according to the method for claim 1, it is characterised in that determine the first section in the clock time relays link The synchronizing clock time source configuration of point network element, the end-node network element and the intermediate node network element includes：Determine that the intermediate node network element conduct in the clock time relays link must be through network element；It is determined that the synchronizing clock time source configuration that must be through network element.
- 6. according to the method for claim 1, it is characterised in that based in clock time network dynamic operation topology Time network dynamic operation topology, determine that 1588 thing error detection links include：Determine 1588 thing error detection network elements in the time network dynamic operation topology；According to the path between the 1588 thing error detection network element, 1588 thing error detection links are determined.
- 7. method according to any one of claim 1 to 6, it is characterised in that the clock time relays link includes One below：Clock relays link, 1588 Time Transmission links, 1588 thing error detection links.
- 8. method according to any one of claim 1 to 6, it is characterised in that the clock synchronisation source include it is following it One：Internal clock, external clock, gps clock, 1588 clocks, circuit take out clock, branch road takes out clock.
- 9. method according to any one of claim 1 to 6, it is characterised in that the time synchronized source include it is following it One：If 1588 time is ETH1588, by matching somebody with somebody between all network elements of the two layers of mode of unicast in the time path Virtual LAN VLAN switching domain is put to realize that 1588 paths configure, and determination must be through the port type of network element 1588；If 1588 time is IP1588, configured by three layers of mode of unicast on all network elements in the time path IP is route to realize that 1588 paths configure, and determination must be through the port type of network element 1588.
- A kind of 10. synchronizing clock time source configuration device, it is characterised in that including：First determining module, for the network planning according to clock time network, determine the first section in the clock time network Point network element, end-node network element and intermediate node network element；Second determining module, for determining from the first node network element to the clock time relays link of the end-node network element；3rd determining module, for determining the first node network element in the clock time relays link, the end-node net The synchronizing clock time source configuration of first and described intermediate node network element；Generation module, for being configured according to synchronizing clock time source, generate clock time network configuration topological sum clock time net Network dynamic operation topology；4th determining module, for being opened up based on the time network dynamic operation in clock time network dynamic operation topology Flutter, determine 1588 thing error detection links.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110417111.9A CN103166750B (en) | 2011-12-14 | 2011-12-14 | Synchronizing clock time source collocation method and device |
| PCT/CN2012/075578 WO2013086833A1 (en) | 2011-12-14 | 2012-05-16 | Clock time synchronization source configuration method and device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110417111.9A CN103166750B (en) | 2011-12-14 | 2011-12-14 | Synchronizing clock time source collocation method and device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103166750A CN103166750A (en) | 2013-06-19 |
| CN103166750B true CN103166750B (en) | 2018-03-09 |
Family
ID=48589505
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110417111.9A Active CN103166750B (en) | 2011-12-14 | 2011-12-14 | Synchronizing clock time source collocation method and device |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN103166750B (en) |
| WO (1) | WO2013086833A1 (en) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105099647A (en) * | 2014-05-16 | 2015-11-25 | 中兴通讯股份有限公司 | Synchronous method, controller, synchronous node and synchronous network |
| CN105323086B (en) * | 2014-07-11 | 2020-03-10 | 中兴通讯股份有限公司 | Method, device and system for indicating synchronous time source selection |
| CN104750166B (en) * | 2015-03-30 | 2018-06-19 | 福州瑞芯微电子股份有限公司 | A kind of sharing method and device of dynamic clock topological structure |
| CN104750167B (en) * | 2015-03-30 | 2018-07-24 | 福州瑞芯微电子股份有限公司 | A kind of configuration method and device of dynamic clock topological structure |
| CN106160907B (en) * | 2015-04-08 | 2019-07-05 | 中兴通讯股份有限公司 | A kind of configuration method and device of synchronous net |
| CN106357501B (en) * | 2015-07-16 | 2020-07-14 | 中国移动通信集团公司 | Intelligent clock planning configuration method and device and centralized controller |
| CN105356990B (en) * | 2015-10-30 | 2019-03-08 | 国网冀北电力有限公司信息通信分公司 | Method for synchronizing time |
| CN107294757A (en) * | 2016-04-13 | 2017-10-24 | 中兴通讯股份有限公司 | A kind of network element timing parameter collocation method, device and communication system |
| CN106130682B (en) * | 2016-06-14 | 2018-05-08 | 河海大学 | The clock chain circuit planing method of plesiochronous network |
| CN106453098A (en) * | 2016-12-05 | 2017-02-22 | 深圳市国电科技通信有限公司 | Automatic superimposed data collection algorithm based on network topology |
| CN106559345A (en) * | 2016-12-05 | 2017-04-05 | 深圳市国电科技通信有限公司 | Ranked data gathering algorithm based on network topology |
| CN113904993B (en) * | 2021-10-27 | 2023-06-27 | 西安微电子技术研究所 | Multi-priority time-triggered Ethernet clock synchronous control method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1617509A (en) * | 2003-11-15 | 2005-05-18 | 华为技术有限公司 | Managig method for network clock |
| CN101641889A (en) * | 2007-03-20 | 2010-02-03 | 马维尔国际贸易有限公司 | Synchronous network device |
| CN101882990A (en) * | 2010-06-24 | 2010-11-10 | 中兴通讯股份有限公司 | Method for selecting master clock based on PTP (Picture Transfer Protocol) and link quality, slave clock and system |
| CN102208958A (en) * | 2011-07-04 | 2011-10-05 | 瑞斯康达科技发展股份有限公司 | Clock synchronization method for synchronous Ethernets, as well as synchronous information sending/receiving method, device and apparatus |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1302629C (en) * | 2003-12-18 | 2007-02-28 | 华为技术有限公司 | Clock synchronization method and equipment in multi-signal multiplexing processing procedure |
| US20060203851A1 (en) * | 2005-03-14 | 2006-09-14 | Eidson John C | Applications of multiple time synchronization domains |
| US8125930B2 (en) * | 2006-12-13 | 2012-02-28 | Rockstar Bidco Lp | Protocol for clock distribution and loop resolution |
| CN102082652B (en) * | 2009-11-26 | 2013-11-06 | 华为技术有限公司 | Method, device and system for acquiring network clock topological structure |
| CN201789508U (en) * | 2010-08-10 | 2011-04-06 | 华为技术有限公司 | 1588V2 protocol processing system |
-
2011
- 2011-12-14 CN CN201110417111.9A patent/CN103166750B/en active Active
-
2012
- 2012-05-16 WO PCT/CN2012/075578 patent/WO2013086833A1/en active Application Filing
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1617509A (en) * | 2003-11-15 | 2005-05-18 | 华为技术有限公司 | Managig method for network clock |
| CN101641889A (en) * | 2007-03-20 | 2010-02-03 | 马维尔国际贸易有限公司 | Synchronous network device |
| CN101882990A (en) * | 2010-06-24 | 2010-11-10 | 中兴通讯股份有限公司 | Method for selecting master clock based on PTP (Picture Transfer Protocol) and link quality, slave clock and system |
| CN102208958A (en) * | 2011-07-04 | 2011-10-05 | 瑞斯康达科技发展股份有限公司 | Clock synchronization method for synchronous Ethernets, as well as synchronous information sending/receiving method, device and apparatus |
Non-Patent Citations (1)
| Title |
|---|
| 《IEEE1588时间同步协议分析与实现》;常夏勤;《中国优秀硕士学位论文全文数据库信息科技辑 》;20111015(第10期);全文 * |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2013086833A1 (en) | 2013-06-20 |
| CN103166750A (en) | 2013-06-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103166750B (en) | Synchronizing clock time source collocation method and device | |
| CN103634091B (en) | A kind of clock synchronization system of more synchronization fields, method and cross-domain equipment | |
| CN103248445B (en) | A kind of clock synchronizing method and device | |
| CN104145435B (en) | Distributed using the frequency of Precision Time Protocol | |
| US11522627B2 (en) | TSN enabled controller | |
| CN106451763B (en) | A kind of intelligent substation station level bus network system without global synchronization system | |
| CN103684648B (en) | A kind of ring network node clock effectiveness judgment method and device | |
| CN104365043A (en) | Ring based precise time data network clock phase adjustments | |
| JP2014512126A (en) | Method, apparatus and system for time distribution in a communication network | |
| CN103856360A (en) | Method and device for synchronization link fault detection | |
| CN105978652B (en) | Equipment, system and method at synchronous pair of Redundant Ethernet | |
| CN113347065A (en) | Flow scheduling test device and method in time-sensitive network | |
| CN104092528B (en) | A kind of clock synchronizing method and device | |
| CN106656387A (en) | Method, node and system for detecting clock synchronization path | |
| CN103959688A (en) | Multiple clock domain clock synchronization method, wire card and Ethernet equipment | |
| WO2013152569A1 (en) | Planning method for node clock synchronization in mesh network | |
| CN103888309B (en) | Synchronous regime monitoring method and device | |
| Pahlevan et al. | Simulation framework for clock synchronization in time sensitive networking | |
| CN106067848A (en) | Microgrid inverter phase-shifting carrier wave synchronizes system and phase-shifting carrier wave synchronous method | |
| CN103428009B (en) | Realize Operation, Administration and Maintenance (OAM) method and device of packet synchronization net | |
| Sanchez-Garrido et al. | Digital electrical substation communications based on deterministic time-sensitive networking over Ethernet | |
| CN106130710A (en) | A kind of clock synchronizing method and system | |
| CN205610654U (en) | Clock device based on SDH network E1 passageway fault monitoring | |
| CN103051439B (en) | A kind of method and device of selection clock source | |
| Zarick et al. | Transparent clocks vs. enterprise ethernet switches |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |