CN103165520A - Manufacturing method of semiconductor device - Google Patents
Manufacturing method of semiconductor device Download PDFInfo
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- CN103165520A CN103165520A CN2011104139522A CN201110413952A CN103165520A CN 103165520 A CN103165520 A CN 103165520A CN 2011104139522 A CN2011104139522 A CN 2011104139522A CN 201110413952 A CN201110413952 A CN 201110413952A CN 103165520 A CN103165520 A CN 103165520A
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- dielectric layer
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Abstract
The invention discloses a manufacturing method of a semiconductor device. The manufacturing method of the semiconductor device comprises that a substrate is provided; a low K dielectric layer is formed on the substrate; an adhesion layer is deposited on the low K dielectric layer through a plasma strengthening chemical vapor deposition technology; a masking layer including masking images is formed on the adhesion layer; the adhesion layer and the low K dielectric layer are etched by using the masking layer including the masking images to form a groove; and the groove is cleaned. Because the adhesion layer with good compactness is deposited on the low K dielectric layer through the plasma strengthening chemical vapor deposition technology, adhesive ability between the low K dielectric layer and a masking layer subsequently formed is improved. Meanwhile in the wet cleaning technology of a subsequent groove, the corrosion rate of the adhesion layer by chemical solution in the groove wet cleaning technology and the corrosion rate of the low K dielectric layer by the chemical solution in the groove wet cleaning technology are similar, and therefore undercut phenomenon is avoided and the yield of semiconductor device manufacturing is improved.
Description
Technical field
The present invention relates to technical field of semiconductors, concrete, the present invention relates to a kind of manufacture method of semiconductor device.
Background technology
Along with the development of semiconductor technology, integrated circuit is towards the future development of high integration.The requirement of high integration makes the live width of semiconductor device more and more less, and the reducing of live width had higher requirement to the formation technique of integrated circuit.
Semiconductor device is formed by multiple layer metal layer, multilayer dielectricity layer usually, described multiple layer metal layer is realized electrical connection between metal level by being arranged at connector in dielectric layer, along with reducing of live width, now dielectric layer adopts dielectric constant less than the dielectric material of 3 low-k (K) more.
Prior art also can form hard mask layer on low K dielectric layer after forming low K dielectric layer, described hard mask layer is formed at the top of described low K dielectric layer, prevents that low K dielectric layer and chemical solution from reacting.
Particularly, show the side schematic view of semiconductor device one embodiment of prior art method, semi-conductor device manufacturing method formation referring to figs. 1 to Fig. 4.
As shown in Figure 1, provide the substrate (not shown), form successively copper barrier layer 11, low K dielectric layer 12 on substrate.
As shown in Figure 2, by oxygen plasma, the surface of low K dielectric layer 12 is bombarded, removed the impurity on low K dielectric layer 12 surfaces, thereby make low K dielectric layer 12 surfaces comparatively clean and tidy, improved the adhesiveness between the hard mask layer of low K dielectric layer 12 and follow-up formation.
As shown in Figure 3, form hard mask layer 14 on the surface of low K dielectric layer 12, the material of described hard mask layer 14 is the silica that forms take tetraethoxysilane (TEOS) as reactant.
As shown in Figure 4, the hydrofluoric acid by dilution cleans semiconductor structure.
Yet in described cleaning step, the end of low K dielectric layer 12 and hard mask layer 14 interfaces can form a breach 15, is called undercutting (undercut) phenomenon.
The formation of described undercutting easily affects the performance of semiconductor device, reduces the yield of semiconductor device.
The technology that more prevents the semiconductor making method of undercut phenomenon can be the Chinese patent of CN100353530C with reference to notification number.
Summary of the invention
The technical problem that the present invention solves is to provide a kind of manufacture method that prevents the semiconductor device of undercut phenomenon.
In order to address the above problem, the invention provides a kind of manufacture method of semiconductor device, comprising: substrate is provided, forms low K dielectric layer on described substrate; By plasma reinforced chemical vapour deposition technique deposition of adhesion on described low K dielectric layer; Form the mask layer that contains mask graph on described adhesion layer; Take the mask layer that contains mask graph as mask, described adhesion layer and low K dielectric layer are carried out etching, form groove; Described groove is cleaned.
Optionally, the thickness of described adhesion layer 20～
Scope in.
Optionally, described adhesion layer is silica.
Optionally, the described adhesion layer of deposition adopts O
2, SiH
4And He, O
2Flow in 50～1000sccm scope, SiH
4Flow in 50～1000sccm scope, the flow of He is in 50～1000sccm scope, reaction chamber temperature is in 300～400 ℃ of scopes, reative cell pressure is in 1～7Torr scope, radio frequency source power is in 450～550W scope.
The step of optionally, described groove being cleaned comprises: by hydrofluoric acid solution, groove is cleaned.
Optionally, in described hydrofluoric acid solution the volume ratio of water and hydrofluoric acid in 300: 1～1000: 1 scopes.
Optionally, the described substrate that provides comprises in the step that forms low K dielectric layer on described substrate: after substrate is being provided, before forming low K dielectric layer, form the barrier layer on substrate.
Optionally, described barrier layer is copper barrier layer or aluminium barrier layer.
Optionally, described barrier layer is copper barrier layer, and described copper barrier layer is silicon nitride.
Optionally, comprise in the step that forms the mask layer that contains mask graph on described adhesion layer: form mask layer on described adhesion layer; Form photoresist layer on described mask layer; Graphical described photoresist forms photoetching offset plate figure; The described mask layer take described photoetching offset plate figure as mask graphization forms mask graph.
compared with prior art, the present invention has the following advantages: the present invention is good by the adhesion layer compactness that plasma reinforced chemical vapour deposition technique deposits on low K dielectric layer, effectively improved the adhesiveness between the mask layer of low K dielectric layer and follow-up formation, owing to needn't be again bombarding to improve adhesiveness between low K dielectric layer and follow-up hard mask layer by the low K dielectric layer surface being carried out oxygen plasma, making groove wash chemical solution in technique approaches the corrosion rate of adhesion layer and low K dielectric layer, prevent undercut phenomenon, improve the yield of manufacturing semiconductor device.
Description of drawings
Fig. 1 to Fig. 4 is the side schematic view of semiconductor device one embodiment of prior art method, semi-conductor device manufacturing method formation;
Fig. 5 is the schematic flow sheet of method, semi-conductor device manufacturing method one execution mode of the present invention;
Fig. 6 to Figure 10 is the side schematic view of semiconductor device one embodiment of method, semi-conductor device manufacturing method formation of the present invention.
Embodiment
A lot of details have been set forth in the following description so that fully understand the present invention.But the present invention can implement much to be different from alternate manner described here, and those skilled in the art can be in the situation that do similar popularization without prejudice to intension of the present invention, so the present invention is not subjected to the restriction of following public concrete enforcement.
Secondly, the present invention utilizes schematic diagram to be described in detail, and when the embodiment of the present invention was described in detail in detail, for ease of explanation, described schematic diagram was example, and it should not limit the scope of protection of the invention at this.
Common low K dielectric layer comprises by Si (silicon), C (carbon), O (oxygen), four kinds of former molecular SiCOH media of H (hydrogen).Applicant of the present invention finds when by oxygen plasma, the low K dielectric layer surface being bombarded, be positioned at the low K dielectric layer surface the SiCOH medium can and oxygen react, particularly, C in the SiCOH medium and oxygen react and break away from from low K dielectric layer is surperficial, thereby at low K dielectric layer surface formation SiOH medium.
And in cleaning process, due to cleaning solution to the corrosion rate of the SiOH medium that do not contain the C atom much larger than its corrosion rate to SiCOH, and cleaning solution to the corrosion rate of SiOH medium much larger than its corrosion rate to the silica hard mask layer, therefore the SiOH medium of low K dielectric layer and silica hard mask layer interface end is corroded soon, thereby form breach between low K dielectric layer surface and silica hard mask layer, and then caused undercut phenomenon.
In order to solve the problem of prior art, the invention provides a kind of manufacture method of semiconductor device, comprising: substrate is provided, forms low K dielectric layer on described substrate; By plasma reinforced chemical vapour deposition technique deposition of adhesion on described low K dielectric layer; Form the mask layer that contains mask graph on described adhesion layer; Take the mask layer that contains mask graph as mask, described adhesion layer and low K dielectric layer are carried out etching, form groove; Described groove is cleaned.
The manufacture method of semiconductor device of the present invention is by improving the adhesiveness of the mask layer of low K dielectric layer and follow-up formation at the good adhesion layer of low K dielectric layer surface deposition compactness.In addition, owing to needn't be again bombarding to improve adhesiveness between low K dielectric layer and follow-up hard mask layer by the low K dielectric layer surface being carried out oxygen plasma, follow-up groove washed process, washing solution approaches the adhesion layer of the manufacture method deposition of utilizing semiconductor device of the present invention and the corrosion rate that is positioned at the low K dielectric layer under adhesion layer, prevent undercut phenomenon, improved the yield of manufacturing semiconductor device.
With reference to figure 5, show the schematic flow sheet of method, semi-conductor device manufacturing method one execution mode of the present invention.Described manufacture method roughly comprises the following steps:
Step S1 provides substrate, forms successively metal barrier, low K dielectric layer on described substrate;
Step S2 is by plasma reinforced chemical vapour deposition technique deposition of adhesion on described low K dielectric layer;
Step S3 forms the mask layer that contains mask graph on described adhesion layer;
Step S4 carries out etching take the mask layer that contains mask graph as mask to described adhesion layer, low K dielectric layer and metal barrier, forms groove;
Step S5 cleans described groove.
Below in conjunction with the drawings and specific embodiments, technical scheme of the present invention is described further.
Fig. 6 to Figure 10 is the side schematic view of semiconductor device one embodiment of method, semi-conductor device manufacturing method formation of the present invention.
As shown in Figure 6, execution in step S1 provides substrate 20, and described substrate 20 can be silicon or SiGe, can comprise the devices such as metal-oxide-semiconductor in described substrate 20, can also comprise the plain conductor that is electrically connected to for realizing.
Form successively metal barrier 21 and low K dielectric layer 22 on described substrate 20.Described metal barrier 21 is used for preventing the metal diffusion, for example, described metal barrier 21 can be copper barrier layer or aluminium barrier layer, need to prove, in the present embodiment, described metal barrier 21 is copper barrier layer, is used for preventing being positioned at the diffusion of the copper plain conductor of metal barrier 21 tops, the material of described copper barrier layer can be silicon nitride, the thickness of described copper barrier layer 150～
Scope in.But the present invention is not restricted to this.
Described low K dielectric layer 22 is comprised of Si, C, O, four kinds of atoms of H, is the SiCOH dielectric layer.Particularly, can form described SiCOH dielectric layer by the method for chemical vapour deposition (CVD) (CVD, Chemical Vapor Deposition), the thickness of described low K dielectric layer 22 1200～
In scope.
As shown in Figure 7, execution in step S2 is by plasma reinforced chemical vapour deposition technique deposition of adhesion 23 on described low K dielectric layer 22.
Concrete, described adhesion layer 23 is silica, during by plasma reinforced chemical vapour deposition (PECVD, Plasma Enhanced Chemical Vapor Deposition) the described silica of process deposits adhesion layer 23, adopts oxygen (O
2), silane (SiH
4) and helium (He), wherein, the flow of reaction indoor oxygen is in 50～1000sccm scope, the flow of silane is in 50～1000sccm scope, the flow of helium is in 50～1000sccm scope, reaction chamber temperature is in 300～400 ℃ of scopes, and reative cell pressure is in 1～7Torr scope, and radio frequency source power is in 450～550W scope.The thickness of described adhesion layer 23 20～
Scope in.Because adhesion layer 23 compactness that the method by plasma reinforced chemical vapour deposition deposits are good, can effectively improve the adhesiveness of the mask layer of low K dielectric layer 22 and follow-up formation on described low K dielectric layer 22.
In addition, in process by plasma reinforced chemical vapour deposition technique deposition of adhesion 23 on described low K dielectric layer 22, because the continuous adhesion layer 23 of deposition has covered described low K dielectric layer 22 surfaces, avoid oxygen plasma precursor reactant in low K dielectric layer 22 surface carbon atoms and reative cell and break away from from low K dielectric layer 22 is surperficial, and at low K dielectric layer 22 surfaces formation SiOH media, prevent the cleaning solution reaction in low K dielectric layer 22 and follow-up cleaning and form breach between low K dielectric layer 22 surfaces and adhesion layer 23.
To shown in Figure 9, execution in step S3 forms the mask layer 24 that contains mask graph on described adhesion layer 23 as Fig. 8.Comprise in the step that forms the mask layer 24 that contains mask graph on described adhesion layer 23: form mask layer 24 on described adhesion layer 23; Form photoresist layer on described mask layer 24; Graphical described photoresist layer forms photoetching offset plate figure 25; The described mask layer 24 take described photoetching offset plate figure 25 as mask graphization forms mask graph.
Concrete, as shown in Figure 8, by the graphical described photoresist layer of photoetching process, form photoetching offset plate figure 25; As shown in Figure 9, take photoetching offset plate figure 25 as mask, by the described mask layer 24 of dry etching figureization, form mask graph.Described photoetching process and dry etching are not done at this and are given unnecessary details as those skilled in the art's known technology.
As shown in figure 10, execution in step S4 carries out etching take the mask layer 24 that contains mask graph as mask to described adhesion layer 23, low K dielectric layer 22 and metal barrier 21, forms groove 26.
In other embodiments, in forming the process of groove 26, at first, take the mask layer 24 that contains mask graph as mask, described adhesion layer 23 and low K dielectric layer 22 are carried out etching; Then, remove described mask layer 24 by dry etching; At last, remove described metal barrier 21, form groove 26.Described mask layer 24 is titanium nitride, and the etching gas when removing titanium nitride mask layer 24 by dry etching is chlorine.
At last, execution in step S5 cleans described groove 26.
Because hydrofluoric acid solution is more approaching to the corrosion rate of SiCOH dielectric layer 22 and silica adhesion layer 23, therefore can not form breach at the interface place of low K dielectric layer 22 and described adhesion layer 23, just can not cause undercut phenomenon yet.
Particularly, in described hydrofluoric acid solution the volume ratio of water and hydrofluoric acid in 300: 1～1000: 1 scopes.
Need to prove, above-described embodiment with hydrofluoric acid solution as washing solution, but the present invention is not restricted to this, can also be to wash solution such as other of phosphoric acid solution etc.
To sum up, the manufacture method of semiconductor device of the present invention is improved the adhesiveness of the mask layer of low K dielectric layer and follow-up formation at the good adhesion layer of low K dielectric layer surface deposition compactness by plasma reinforced chemical vapour deposition technique.In addition, follow-up groove washed process, wash solution the adhesion layer of the manufacture method deposition of utilizing semiconductor device of the present invention and the corrosion rate that is positioned at the low K dielectric layer under adhesion layer are approached, prevent undercut phenomenon, improved the yield of manufacturing semiconductor device.
Although the present invention with preferred embodiment openly as above; but it is not to limit the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can utilize method and the technology contents of above-mentioned announcement to make possible change and modification to technical solution of the present invention; therefore; every content that does not break away from technical solution of the present invention; to any simple modification, equivalent variations and modification that above embodiment does, all belong to the protection range of technical solution of the present invention according to technical spirit of the present invention.
Claims (10)
1. the manufacture method of a semiconductor device, is characterized in that, comprising:
Substrate is provided, forms low K dielectric layer on described substrate;
Form adhesion layer by plasma reinforced chemical vapour deposition technique on described low K dielectric layer;
Form the mask layer that contains mask graph on described adhesion layer;
Take the mask layer that contains mask graph as mask, described adhesion layer and low K dielectric layer are carried out etching, form groove;
Described groove is cleaned.
2. the manufacture method of semiconductor device as claimed in claim 1, is characterized in that, the thickness of described adhesion layer 20～
Scope in.
3. the manufacture method of semiconductor device as claimed in claim 1, is characterized in that, described adhesion layer is silica.
4. the manufacture method of semiconductor device as claimed in claim 3, is characterized in that, deposits described adhesion layer and adopt O
2, SiH
4And He, O
2Flow in 50～1000sccm scope, SiH
4Flow in 50～1000sccm scope, the flow of He is in 50～1000sccm scope, reaction chamber temperature is in 300～400 ℃ of scopes, reative cell pressure is in 1～7Torr scope, radio frequency source power is in 450～550W scope.
5. the manufacture method of semiconductor device as claimed in claim 1, is characterized in that, the step that described groove is cleaned comprises: by hydrofluoric acid solution, groove is cleaned.
6. the manufacture method of semiconductor device as claimed in claim 5, is characterized in that, in described hydrofluoric acid solution, the volume ratio of water and hydrofluoric acid is in 300: 1～1000: 1 scopes.
7. the manufacture method of semiconductor device as claimed in claim 1, is characterized in that, the described substrate that provides comprises in the step that forms low K dielectric layer on described substrate: after substrate is being provided, before forming low K dielectric layer, form the barrier layer on substrate.
8. the manufacture method of semiconductor device as claimed in claim 7, is characterized in that, described barrier layer is copper barrier layer or aluminium barrier layer.
9. the manufacture method of semiconductor device as claimed in claim 8, is characterized in that, described barrier layer is copper barrier layer, and described copper barrier layer is silicon nitride.
10. the manufacture method of semiconductor device as claimed in claim 1, is characterized in that, the step that forms the mask layer that contains mask graph on described adhesion layer comprises:
Form mask layer on described adhesion layer;
Form photoresist layer on described mask layer;
Graphical described photoresist forms photoetching offset plate figure;
The described mask layer take described photoetching offset plate figure as mask graphization forms mask graph.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011104139522A CN103165520A (en) | 2011-12-13 | 2011-12-13 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011104139522A CN103165520A (en) | 2011-12-13 | 2011-12-13 | Manufacturing method of semiconductor device |
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| Publication Number | Publication Date |
|---|---|
| CN103165520A true CN103165520A (en) | 2013-06-19 |
Family
ID=48588497
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|---|---|---|---|
| CN2011104139522A Pending CN103165520A (en) | 2011-12-13 | 2011-12-13 | Manufacturing method of semiconductor device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105226049A (en) * | 2014-06-26 | 2016-01-06 | 中芯国际集成电路制造(上海)有限公司 | For the mask assembly of interconnect layer structure and the manufacture method of interconnection layer |
| CN110911281A (en) * | 2019-11-29 | 2020-03-24 | 中芯集成电路制造(绍兴)有限公司 | Semiconductor device having trench type gate and method of manufacturing the same |
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| US20060255466A1 (en) * | 2003-01-29 | 2006-11-16 | Sadayuki Ohnishi | Carbon containing silicon oxide film having high ashing tolerance and adhesion |
| CN101030566A (en) * | 2006-03-01 | 2007-09-05 | 台湾积体电路制造股份有限公司 | Semiconductor structure and forming method thereof |
| US20070218214A1 (en) * | 2006-03-14 | 2007-09-20 | Kuo-Chih Lai | Method of improving adhesion property of dielectric layer and interconnect process |
| US20110183526A1 (en) * | 2010-01-26 | 2011-07-28 | Renesas Electronics Corporation | Method of manufacturing a semiconductor device |
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2011
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Patent Citations (5)
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| US20060255466A1 (en) * | 2003-01-29 | 2006-11-16 | Sadayuki Ohnishi | Carbon containing silicon oxide film having high ashing tolerance and adhesion |
| US20060211240A1 (en) * | 2005-03-18 | 2006-09-21 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of enhancing adhesion between dielectric layers |
| CN101030566A (en) * | 2006-03-01 | 2007-09-05 | 台湾积体电路制造股份有限公司 | Semiconductor structure and forming method thereof |
| US20070218214A1 (en) * | 2006-03-14 | 2007-09-20 | Kuo-Chih Lai | Method of improving adhesion property of dielectric layer and interconnect process |
| US20110183526A1 (en) * | 2010-01-26 | 2011-07-28 | Renesas Electronics Corporation | Method of manufacturing a semiconductor device |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105226049A (en) * | 2014-06-26 | 2016-01-06 | 中芯国际集成电路制造(上海)有限公司 | For the mask assembly of interconnect layer structure and the manufacture method of interconnection layer |
| CN105226049B (en) * | 2014-06-26 | 2019-02-26 | 中芯国际集成电路制造(上海)有限公司 | The production method of mask assembly and interconnection layer for interconnection layer structure |
| CN110911281A (en) * | 2019-11-29 | 2020-03-24 | 中芯集成电路制造(绍兴)有限公司 | Semiconductor device having trench type gate and method of manufacturing the same |
| CN110911281B (en) * | 2019-11-29 | 2022-07-29 | 绍兴中芯集成电路制造股份有限公司 | Semiconductor device having trench type gate and method of manufacturing the same |
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Application publication date: 20130619 |