CN103165059B - Display drive method, driver module and display device - Google Patents
Display drive method, driver module and display device Download PDFInfo
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- CN103165059B CN103165059B CN201110408172.9A CN201110408172A CN103165059B CN 103165059 B CN103165059 B CN 103165059B CN 201110408172 A CN201110408172 A CN 201110408172A CN 103165059 B CN103165059 B CN 103165059B
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Abstract
A kind of display drive method comprises the following steps: determine one of scanning-line signal first object level voltage and one second target level voltage; According to the resistance capacitance load of sweep trace, to determine one first switching time and one second switching time; At least one first preliminary filling level voltage and at least one second preliminary filling level voltage is determined according to first object level voltage, the second target level voltage, the first switching time and the second switching time; And export the first preliminary filling level voltage, first object level voltage, the second preliminary filling level voltage and the second target level voltage driven one display panel, wherein the first preliminary filling level voltage switches to first object level voltage after the first switching time, and the second preliminary filling level voltage switches to the second target level voltage after the second switching time.
Description
[technical field]
The present invention about a kind of display drive method, driver module and display device, especially in regard to the display drive method of a kind of active matrix (activematrix), driver module and display device.
[background technology]
The advantages such as flat display apparatus (flatdisplayapparatus) is low with its power consumption, thermal value is few, lightweight and non-radiation type, be used in electronic product miscellaneous, and little by little replace traditional cathode-ray tube (CRT) (cathoderaytube, CRT) display device.
Flat display apparatus generally can divide into passive matrix type (passivematrix) and active matrix (activematrix) etc. two kinds according to its type of drive.But passive matrix type display device is limited to drive pattern, therefore have the life-span shorter with cannot the shortcoming such as large area.Although and active matrix display device cost costly and the shortcoming such as processing procedure is more complicated, be applicable to the true color display of large scale, high-resolution high information capacity, therefore, become the main flow of flat display apparatus.
Please refer to shown in Figure 1A, it is a kind of schematic diagram of existing active matrix display device 1.
Display device 1 comprises display panel 11 and a driver module 12.Wherein, driver module 12 has scan driving circuit 121 and a data drive circuit 122.Scan drive circuit 121 is by multi-strip scanning line S
mbe electrically connected with display panel 11, and data drive circuit 122 is by a plurality of data lines D
nbe electrically connected with display panel 11.In addition, display panel 11 has multiple picture element (Figure 1A does not show), and described data line D
nand described sweep trace S
mdescribed picture element array is formed in being crisscross arranged.Sweep trace S is made when scan drive circuit 121 exports one scan signal
mduring conducting, a data-signal of every for correspondence a line picture element is passed through data line D by data drive circuit 122
nbe sent to the pixel electrode of picture element, to make display panel 11 display frame.
Wherein, sweep trace S
mthe ON time (i.e. sweep time) of the sweep signal exported is mainly by sweep trace S
mquantity and display frequency decide.Such as, but please refer to shown in Figure 1B, due to the stray capacitance of display panel 11 picture element array, is data line D
ncross-line (crossover), switching transistor stray capacitance (such as Cgd, Cgs, Csd etc.), and the loaded impedance of picture element may cause a desirable sweep signal waveform A (bold portion) to postpone and distortion forms another waveform B (dotted portion).The problem that the phenomenon of this kind of signal delay and distortion especially causes when the display device of large scale, high resolving power and solid (3D) may be more serious, such as, may cause the missampling of picture element (samplingerror) and display panel 11 cannot normally be shown.
Therefore, how to provide a kind of display drive method, driver module and display device, the signal delay of sweep trace can be improved, and there is the effect reducing power attenuation and reduce picture element switch module stress effect, become one of important topic.
[summary of the invention]
Because above-mentioned problem, object of the present invention for providing a kind of signal delay improving sweep trace, and has the display drive method, driver module and the display device that reduce power attenuation and reduce picture element switch module stress effect.
For reaching above-mentioned purpose, according to a kind of display drive method of the present invention by least one scanning line driving one display panel.Display drive method comprises the following steps: determine one of scanning-line signal first object level voltage and one second target level voltage; According to the resistance capacitance load of sweep trace, to determine one first switching time and one second switching time; At least one first preliminary filling level voltage and at least one second preliminary filling level voltage is determined according to first object level voltage, the second target level voltage, the first switching time and the second switching time; And export the first preliminary filling level voltage, first object level voltage, the second preliminary filling level voltage and the second target level voltage driven display panel, wherein the first preliminary filling level voltage switches to first object level voltage after the first switching time, and the second preliminary filling level voltage switches to the second target level voltage after the second switching time.
In one embodiment, the gray scale voltage of first object level voltage and the second target level voltage foundation display panel picture data decides, and at least high than the most high gray voltage critical voltage of first object level, at least low than the minimum gray scale voltage critical voltage of the second target level.
In one embodiment, the first preliminary filling level voltage is higher than first object level voltage, and the second preliminary filling level voltage is lower than the second target level voltage.
In one embodiment, the resistance capacitance load according to sweep trace produces the time constant of sweep trace, to determine the first switching time and the second switching time.
In one embodiment, when a time point, export one of them of the first preliminary filling level voltage, first object level voltage, the second preliminary filling level voltage and the second target level voltage.
For reaching above-mentioned purpose, according to a kind of driver module of the present invention by least one scanning line driving one display panel.Driver module comprises scan driving circuit, a testing circuit and one scan signal generating circuit.Scan drive circuit exports one scan drive singal and drives display panel, scanning drive signal has at least one first preliminary filling level voltage and a first object level voltage, and the first preliminary filling level voltage switches to first object level voltage after one first switching time.Testing circuit, measures the resistance capacitance load of sweep trace, to determine for the first switching time.Generation circuit of scanning signals, is electrically connected with scan drive circuit and testing circuit, and gated sweep driving circuit exports scanning drive signal, and generation circuit of scanning signals is according to first object level voltage and determine the first preliminary filling level voltage the first switching time.
In one embodiment, first object level voltage decides according to the gray scale voltage of display panel picture data, and at least high than the most high gray voltage critical voltage of first object level.
In one embodiment, the resistance capacitance load of testing circuit foundation sweep trace produces the time constant of sweep trace, to select for the first switching time.
In one embodiment, scanning drive signal has more at least one second preliminary filling level voltage and one second target level voltage, and the second preliminary filling level voltage switches to the second target level voltage after one second switching time.
In one embodiment, generation circuit of scanning signals is according to the second target level voltage and determine the second preliminary filling level voltage the second switching time.
In one embodiment, at least low than the gray scale voltage of the minimum level critical voltage of the second target level, and most high gray voltage is data voltage the highest in a display frame, minimum gray scale voltage is data voltage minimum in display frame.
In one embodiment, the first preliminary filling level voltage is higher than first object level voltage, and the second preliminary filling level voltage is lower than the second target level voltage.
For reaching above-mentioned purpose, comprise a display panel and a driver module according to a kind of display device of the present invention.Driver module is by least one scanning line driving display panel, and driver module has scan driving circuit, a testing circuit and one scan signal generating circuit.Scan drive circuit exports one scan drive singal and drives display panel, scanning drive signal has at least one first preliminary filling level voltage and a first object level voltage, and the first preliminary filling level voltage switches to first object level voltage after one first switching time.Testing circuit measures the resistance capacitance load of sweep trace, to determine for the first switching time.Generation circuit of scanning signals and scan drive circuit and testing circuit are electrically connected, and gated sweep driving circuit exports scanning drive signal, and generation circuit of scanning signals is according to first object level voltage and determine the first preliminary filling level voltage the first switching time.
In one embodiment, first object level voltage decides according to driving the gray scale voltage of display panel picture data, and at least high than the gray scale voltage of the most high levle critical voltage of first object level.
In one embodiment, the resistance capacitance load of testing circuit foundation sweep trace produces the time constant of sweep trace, to select for the first switching time.
In one embodiment, scanning drive signal has more at least one second preliminary filling level voltage and one second target level voltage, and the second preliminary filling level voltage switches to the second target level voltage after one second switching time.
In one embodiment, generation circuit of scanning signals is according to the second target level voltage and determine the second preliminary filling level voltage the second switching time.
In one embodiment, at least low than the minimum gray scale voltage critical voltage of the second target level, and most high gray voltage is data voltage the highest in a display frame, minimum gray scale voltage is data voltage minimum in display frame.
In one embodiment, scan drive circuit, in time putting sometime, exports one of them of the first preliminary filling level voltage, first object level voltage, the second preliminary filling level voltage and the second target level voltage.
In one embodiment, the first preliminary filling level voltage is higher than first object level voltage, and the second preliminary filling level voltage is lower than the second target level voltage.
From the above, the resistance capacitance load of display drive method of the present invention, driver module and display device foundation sweep trace, to determine one first switching time and one second switching time.In addition, according to first object level voltage, the second target level voltage, the first switching time and the second switching time determining one first preliminary filling level voltage and one second preliminary filling level voltage.In addition, export the first preliminary filling level voltage, first object level voltage, the second preliminary filling level voltage and the second target level voltage to drive display panel, wherein, first preliminary filling level voltage switches to first object level voltage after the first switching time, and the second preliminary filling level voltage switches to the second target level voltage after the second switching time.By this, sweep signal can be made to reach target level voltage rapidly, therefore, can load charge-discharge time of accelerated scan line, to improve the signal delay of sweep trace.In addition, do not need to use fixing and high-tension scanning drive signal to drive the picture element of display panel, therefore, can reduce the power attenuation of display device yet and reduce the stress effect of picture element switching transistor.
[accompanying drawing explanation]
Figure 1A is a kind of schematic diagram of existing active matrix display device;
Figure 1B is the waveform schematic diagram of one scan signal;
Fig. 2 is the function block schematic diagram of a kind of display device of present pre-ferred embodiments;
Fig. 3 is the drive singal schematic diagram of the display panel of Fig. 2;
Fig. 4 A is the circuit diagram of the resistance capacitance load of the testing circuit measurement scan line of Fig. 2;
Fig. 4 B is the waveform schematic diagram of a test signal;
Fig. 4 C is the charging curve schematic diagram of resistance capacitance;
Fig. 5 A is the function block schematic diagram of scan drive circuit and generation circuit of scanning signals;
Fig. 5 B is the partial circuit schematic diagram of Fig. 5 A; And
Fig. 6 is the schematic flow sheet of inventive display driving method.
[primary clustering symbol description]
1,4: display device
11,3: display panel
12: driver module
121,122,21: scan drive circuit
2: driver module
211: voltage position quasi displacement circuit
212: shift scratch circuit
213: output buffer
22: testing circuit
23: generation circuit of scanning signals
24: data drive circuit
A, B: waveform
C: electric capacity
DD: data drive signal
D
n: data line
P1: the first preliminary filling level voltage
P2: the second preliminary filling level voltage
R: resistance
S01 to S04: step
SD: scanning drive signal
S
m: sweep trace
T1: the first switching time
T2: the second switching time
T1: first object level voltage
T2: the second target level voltage
Ts: test signal
Ts1, ts2, Th, St: time
V
f, V
i, V (ts1), V (ts2): voltage
W1 ~ W4: switch
τ: time constant
[embodiment]
Hereinafter with reference to correlative type, illustrate that wherein identical assembly is illustrated with identical reference marks according to a kind of display drive method of present pre-ferred embodiments, driver module and display device.
Below, first describe display device 4 of the present invention and driver module 2 in detail, after, then display drive method of the present invention is described.
Please refer to shown in Fig. 2 and Fig. 3, wherein, Fig. 2 is the function block schematic diagram of a kind of display device 4 of present pre-ferred embodiments, and Fig. 3 is the drive singal schematic diagram of the display panel 3 of Fig. 2.
Display device 4 of the present invention comprises driver module 2 and a display panel 3.What first illustrate is, display device 4 is an active matrix (activematrix) display device, it can be active matrix type liquid crystal display device (AM-LCD) or is active matrix organic light-emitting display device (AM-OLED), is not limited in this.In addition, the present invention can be applicable to the display device etc. of high resolving power and 3D, such as, can be the display device of full HD (fullhighdefinition, FHD) and 4K2K (3840 × 2160).
Display panel 3 has at least one picture element, and driver module 2 drives display panel 3 by least one sweep trace and at least one data line.In the present embodiment, display device 4 is to have multiple picture element (Fig. 2 does not show), multi-strip scanning line S
mand a plurality of data lines D
nfor example.Wherein, described sweep trace S
mand described data line D
nsystem forms described picture element array in being crisscross arranged.And display panel 3 is by described sweep trace S
mand described data line D
nbe electrically connected with driver module 2.
Driver module 2 comprises scan driving circuit 21, testing circuit 22 and one scan signal generating circuit 23.In addition, driver module 2 more can comprise a data drive circuit 24.Wherein, scan drive circuit 21 is by described sweep trace S
mbe electrically connected with display panel 3, and data drive circuit 24 is by described data line D
nbe electrically connected with display panel 3.Referring to Fig. 2 and Fig. 3, sweep trace S can be made respectively when scan drive circuit 21 exports one scan drive singal SD
mconducting, and a data drive signal DD of every for correspondence a line picture element is passed through described data line D by data drive circuit 24
nbe sent to picture element, to make display panel 3 display frame.
Scanning drive signal SD can have an at least one first preliminary filling level voltage P1 and first object level voltage T1, and the first preliminary filling level voltage P1 is higher than first object level voltage T1, and the first preliminary filling level voltage P1 can switch to first object level voltage T1 through one first switching time after t1.In addition, scanning drive signal SD more can have at least one second preliminary filling level voltage P2 and one second target level voltage T2, second preliminary filling level voltage P2 is lower than the second target level voltage T2, and the second preliminary filling level voltage P2 switches to the second target level voltage T2 through one second switching time after t2.Wherein, first object level voltage T1 can be the high levle voltage of scanning drive signal SD, and the second target level voltage T2 can be the low level voltage of scanning drive signal SD.In the present embodiment, as shown in Figure 3, scanning drive signal SD is for one first preliminary filling level voltage P1 and one second preliminary filling level voltage P2.But, in other embodiments, scanning drive signal SD also can have more than one first preliminary filling level voltage P1 and the second preliminary filling level voltage P2.
Below, how detailed description is determined the first preliminary filling level voltage P1, the second preliminary filling level voltage P2, first object level voltage T1, the second target level voltage T2, first switching time t1 and second switching time t2.
First object level voltage T1 and the second target level voltage T2 decides according to driving the gray scale voltage of display panel 3 picture element.In other words, the gray scale voltage value according to the data drive signal DD driving display panel 3 decides first object level voltage T1 and the second target level voltage T2.Wherein, first object level voltage T1 can at least high than the gray scale voltage of a most high levle critical voltage (thresholdvoltage), and the second target level voltage T2 can at least low than the gray scale voltage of a minimum level critical voltage.And the gray scale voltage of most high levle is data voltage the highest in a display frame, the gray scale voltage of minimum level is data voltage minimum in a display frame.
In details of the words, first object level voltage T1 and the second target level voltage T2 is variable, and its voltage can decide according to the data drive signal DD of the every a line picture element of correspondence, also can decide according to the gray scale voltage of a certain region picture element or whole picture element.For example, suppose in a time point, drive the first row of certain a line picture element, secondary series, 3rd row high and minimum gray scale voltage to the data drive signal DD of the n-th row is 5V and-3V, then drive the first object level voltage T1 of the scanning drive signal SD of the sweep trace of this row picture element can select more than at least one critical voltage value higher than maximum gray voltage (the highest data voltage), and the second target level voltage T2 can select more than at least one critical voltage value lower than minimum gray voltage (minimum data voltage), such as first object level voltage T1 can select 7V, and the second target level voltage T2 can select-5V.User can select different first object level voltage T1 and the second target level voltage T2 according to its design requirement.In addition, because the maximum gray voltage of the data drive signal DD driving the picture element of different scanning line may be identical or not identical, therefore, the first object level voltage T1 of the scanning drive signal SD of different scanning line and the second target level voltage T2 also may be identical or not identical.Owing to not needing to use picture element that is fixing and the scanning drive signal SD of high voltage driving display panel 3, therefore, the power attenuation of display device 4 can be reduced and reduce the stress effect (stresseffect) of picture element switching transistor.
Then, please refer to shown in Fig. 4 A, it is the circuit diagram that testing circuit 22 measures the resistance capacitance load (RCloading) of scan line.
Testing circuit 22 can measure the resistance capacitance load of sweep trace, with determine first switching time t1 and second switching time t2.Wherein, testing circuit 22 produces the timeconstantτ of sweep trace according to resistance capacitance load, with select first switching time t1 and second switching time t2.In this, timeconstantτ is the equivalent resistance of sweep trace and the product (τ=R × C) of equivalent capacity.
Circuit due to sweep trace can be considered the combination of an an equivalent resistance R and equivalent capacity C, in addition, the load (picture element of display panel 3) that every scan line in display device 4 connects is all identical, therefore testing circuit 22 can measure the load of the resistance capacitance of arbitrary sweep trace.Wherein, testing circuit 22 can produce at least one test signal Ts and input scan line, to carry out the measurement of timeconstantτ to sweep trace.As shown in Figure 4 B, test signal Ts such as can be a square wave, and its high levle voltage is V
f(such as 20V), low level voltage is V
i(such as 0V).
In other words, in order to determine first switching time t1 and second switching time t2, testing circuit 22 is when at least one time, and the time ts1 of such as Fig. 4 B or time ts2 sends a test signal Ts to sweep trace.When test signal Ts inputs sweep trace, a voltage V (ts1) (voltage differences at electric capacity C two ends) can be measured in one end of electric capacity C when time ts1, and during time ts2, measure a voltage V (ts2).
Please refer to shown in Fig. 4 C, it is the charging curve schematic diagram of resistance capacitance.Wherein, the longitudinal axis of Fig. 4 C is RC charge percentage, and the right side of transverse axis is time (microsecond, μ s), and the left side of transverse axis is the multiple of RC.In addition, the solid line on the left of Fig. 4 C represents a desirable RC charging curve, and its equation can be V (t)=V
i+ Δ V (1-e
(-t/ τ)), Δ V=V
f-V
i=20V, τ=RC, and the dotted line on the right side of Fig. 4 C is different RC load curve 1 and 2.
For example, suppose that the RC load of sweep trace is the dotted line-resistance capacitance load 1 on the right side of Fig. 4 C, sweep trace is inputted in test signal Ts, and when time 10 microsecond (μ s), measure electric capacity C both end voltage difference for V (ts1), according to formula: Δ V (ts1)=(V (ts1)-V
i)/(V
f-V
i) be converted into charge percentage, then to correspond to desirable RC charging curve be 63.2%, it is 1 RC time that transverse axis can obtain the time, therefore can obtain the timeconstantτ=1RC=10 μ s of sweep trace.
Again for another example, suppose that the RC load of sweep trace is another dotted line-resistance capacitance load 2 (representing that the RC load of sweep trace is different from a upper example) on the right side of Fig. 4 C, sweep trace is inputted in test signal Ts, and the both end voltage difference measuring electric capacity C when time 10 microsecond (μ s) is V (ts1), charge percentage is become according to formula scales, corresponding to desirable RC charging curve is again 77.7%, and transverse axis can obtain the RC time of 1.5 times.Therefore, 1.5RC=10 μ s, therefore the timeconstantτ=1RC=10 μ s/1.5=6.67 μ s that can obtain sweep trace.By that analogy.
After obtaining the timeconstantτ of sweep trace, first switching time t1 and second switching time t2 can be the multiple of timeconstantτ.And the selection of multiple can adjust according to the size of display panel 3, user can according to the speed demand in its duration of charging selected different first switching time t1 and second switching time t2.In this, be not limited.
Shown in Fig. 2, generation circuit of scanning signals 23 is electrically connected with scan drive circuit 21 and testing circuit 22.Generation circuit of scanning signals 23 can control scan drive circuit 21 and export scanning drive signal SD.Wherein, generation circuit of scanning signals 23 according to first object level voltage T1 and first switching time t1 determine the first preliminary filling level voltage P1, and according to the second target level voltage T2 and second switching time t2 determine the second preliminary filling level voltage P2.First switching time t1 with second switching time t2 can select identical, also can select not identical.In this, with first switching time t1 with second switching time t2 phase be all example.
Shown in Fig. 3, in the present embodiment, the level of scanning drive signal SD is sequentially the first preliminary filling level voltage P1, first object level voltage T1, the second preliminary filling level voltage P2 and the second target level voltage T2, to drive display panel 3.In addition, when a time point, scan drive circuit 21 export the first preliminary filling level voltage P1, first object level voltage T1, the second preliminary filling level voltage P2 and the second target level voltage T2 one of them.
Wherein, generation circuit of scanning signals 23 according to first object level voltage T1, the second target level voltage T2 and the first t1 switching time (and second switching time t2), and decides the first preliminary filling level voltage P1 and the second preliminary filling level voltage P2 according to a look-up table (lookuptable).Wherein, look-up table can in be built in generation circuit of scanning signals 23.
When selecting first object level voltage T1 and the second target level voltage T2, the multiple of timeconstantτ can be selected according to panel size and demand thereof, then decide the value of the first preliminary filling level voltage P1 and the second preliminary filling level voltage P2.For example, such as shown in following table one, if when selecting first object level voltage T1 and the second target level voltage T2 to be respectively 15V and-5V according to gray scale voltage, when selecting the timeconstantτ of this sweep trace 2 times again, just can determine that the first preliminary filling level voltage P1 and the second preliminary filling level voltage P is respectively 18.13V and-8.13V.Special instruction, as the larger person of multiple of the timeconstantτ selected, then the value of the first preliminary filling level voltage P1 will be higher, and the value of the second preliminary filling level voltage P will be lower.Therefore, user can according to its design requirement select applicable first object level voltage T1, the second target level voltage T2, first switching time t1 and second switching time t2, then select the first preliminary filling level voltage P1 and the second preliminary filling level voltage P2 according to look-up table.
Table one
In addition, please refer to shown in Fig. 5 A and Fig. 5 B, wherein, Fig. 5 A is the function block schematic diagram of scan drive circuit 21 and generation circuit of scanning signals 23, and Fig. 5 B is the partial circuit schematic diagram of Fig. 5 A.
As shown in Figure 5A, scan drive circuit 21 can have voltage position quasi displacement circuit 211, shift scratch circuit 212 and an output buffer 213.Wherein, voltage position quasi displacement circuit 211 is electrically connected with shift scratch circuit 212 and generation circuit of scanning signals 23.Voltage position quasi displacement circuit 211 by the logic level of the low voltage of such as 3V/0V or 5V/0V, can be passed to and drive the higher cut-in voltage needed for picture element switch and lower following closedown voltage.Moreover shift scratch circuit 212 is electrically connected with output buffer 213 and generation circuit of scanning signals 23.Shift scratch circuit 212 can the signal that exports of receiver voltage position quasi displacement circuit 211, and controls its actuation time according to the control signal that such as sequential control circuit (figure does not show) exports, and exports output buffer 213 to.
In addition, the exportable first preliminary filling level voltage P1 of generation circuit of scanning signals 23, first object level voltage T1, the second preliminary filling level voltage P2 and the second target level voltage T2, first switching time t1 and second switching time t2 to scan drive circuit 21.In addition, in order to key diagram 5B, in this, output buffer 213 is for the two-stage phase inverter simplified, and real circuit and progression according to the actual design of display panel 3, can not illustrate in this in detail.It is worth mentioning that, above-mentioned generation circuit of scanning signals 23 and testing circuit 22 can be integrated in sequential control circuit (timingcontrolcircuit), also can integrate with scan drive circuit 21, not be limited in this.
Please refer to shown in Fig. 5 B, generation circuit of scanning signals 23 can export the first preliminary filling level voltage P1, first object level voltage T1, the second preliminary filling level voltage P2 and the second target level voltage T2 to output buffer 213 respectively in different time, the scanning drive signal SD exported to make scan drive circuit 21 has different level in different time points, to drive display panel 3.
Shown in Fig. 3 and Fig. 5 B, in Qi Shishi, generation circuit of scanning signals 23 controllable switch W1 conducting, with by the first preliminary filling level voltage P1 input and output buffer circuit 213, scanning drive signal SD is made to have the first preliminary filling level voltage P1 (the first preliminary filling level voltage P1 is higher than first object level voltage T1); When the first t1 switching time, generation circuit of scanning signals 23 controllable switch W2 conducting (simultaneously gauge tap W1 not conducting), with by first object level voltage T1 input and output buffer circuit 213, make scanning drive signal SD can switch to first object level voltage T1 by the first preliminary filling level voltage P1; Again through a time Th (sweep time St deduct first switching time t1) after, generation circuit of scanning signals 23 controllable switch W3 conducting (simultaneously gauge tap W2 not conducting), with by the second preliminary filling level voltage P2 input and output buffer circuit 213, scanning drive signal SD is made to switch to the second preliminary filling level voltage P2 (the second preliminary filling level voltage P2 is lower than the second target level voltage T2) by first object level voltage T1; Again after the second switching time t2, generation circuit of scanning signals 23 controllable switch W4 conducting (simultaneously gauge tap W3 not conducting), with by the second target level voltage T2 input and output buffer circuit 213, scanning drive signal SD is made to switch to the second target level voltage T2 by the second preliminary filling level voltage P2.By that analogy, described sweep trace S can be made
mexport corresponding scanning drive signal SD, to drive display panel 3 respectively.
Hold, because sweep trace of the present invention is by the first higher preliminary filling level voltage P1 preliminary filling, and switch to first object level voltage T1 after t1 through the first switching time, closed by the second lower preliminary filling level voltage P2 again, and switch to the second target level voltage T2 after t2 through the second switching time.By this, sweep signal can be made to reach target level voltage rapidly, therefore, can accelerated scan line S
mthe load charge-discharge time, to improve sweep trace S
msignal delay.In addition, do not need to use fixing and high-tension scanning drive signal SD to drive the picture element of display panel 3, therefore, can reduce the power attenuation of display device 4 yet and reduce the stress effect (stresseffect) of picture element switching transistor.
In addition, please refer to Fig. 6 and relevant indicators, so that display drive method of the present invention to be described.Wherein, Fig. 6 is the schematic flow sheet of inventive display driving method.
Display drive method of the present invention is by least one scanning line driving one display panel 3.As shown in Figure 2, in this, with multi-strip scanning line S
mdrive display panel 3.Wherein, display drive method comprises step S01 to step S04.
Step S01 is: determine one of scanning-line signal first object level voltage T1 and one second target level voltage T2.In this, first object level voltage T1 and the second target level voltage T2 decides according to driving the gray scale voltage of display panel 3 picture element.
Step S02 is: according to the resistance capacitance load of sweep trace, with determine one first switching time t1 and one second switching time t2.
As shown in Fig. 4 A to Fig. 4 C, in this, produce a test signal Ts and input scan line, to carry out the measurement of timeconstantτ to sweep trace.In addition, the timeconstantτ of sweep trace can be produced according to the resistance capacitance load of sweep trace, and according to timeconstantτ decide first switching time t1 and second switching time t2.Wherein, first switching time t1 with second switching time t2 can be identical, also can not be identical.In this, to be all example mutually.
Step S03 is: according to first object level voltage T1, the second target level voltage T2, first switching time t1 and second switching time t2 determine at least one first preliminary filling level voltage P1 and at least one second preliminary filling level voltage P2.
As shown in Figure 3, in this, for an a first preliminary filling level voltage P1 and second preliminary filling level voltage P2.In addition, the first preliminary filling level voltage P1 and the second preliminary filling level voltage P2 is selected according to a look-up table (table one as escribed above).Wherein, the first preliminary filling level voltage P1 is higher than first object level voltage T1, and the second preliminary filling level voltage P2 is lower than the second target level voltage T2.
Step S04 is: export the first preliminary filling level voltage P1, first object level voltage T1, the second preliminary filling level voltage P2 and the second target level voltage T2 to drive display panel.Wherein, the first preliminary filling level voltage P1 switches to first object level voltage T1 through the first switching time after t1, and the second preliminary filling level voltage P2 switches to the second target level voltage T2 through the second switching time after t2.
As shown in Figure 3, in this, the level of the scanning drive signal SD that scan drive circuit 21 exports can be sequentially the first preliminary filling level voltage P1, first object level voltage T1, the second preliminary filling level voltage P2 and the second target level voltage T2, and when a time point, export the first preliminary filling level voltage P1, first object level voltage T1, the second preliminary filling level voltage P2 and the second target level voltage T2 one of them, to drive display panel 3.
In addition, the further feature of inventive display driving method, in above-mentioned middle detailed description, repeats no more in this.
In sum, the resistance capacitance load of display drive method of the present invention, driver module and display device foundation sweep trace, to determine one first switching time and one second switching time.In addition, according to first object level voltage, the second target level voltage, the first switching time and the second switching time determining one first preliminary filling level voltage and one second preliminary filling level voltage.In addition, export the first preliminary filling level voltage, first object level voltage, the second preliminary filling level voltage and the second target level voltage to drive display panel, wherein, first preliminary filling level voltage switches to first object level voltage after the first switching time, and the second preliminary filling level voltage switches to the second target level voltage after the second switching time.By this, sweep signal can be made to reach target level voltage rapidly, therefore, can load charge-discharge time of accelerated scan line, to improve the signal delay of sweep trace.In addition, do not need to use fixing and high-tension scanning drive signal to drive the picture element of display panel, therefore, can reduce the power attenuation of display device yet and reduce the stress effect of picture element switching transistor.
The foregoing is only illustrative, but not be restricted person.Anyly do not depart from spirit of the present invention and category, and to its equivalent modifications of carrying out or change, all should be contained in accompanying claim.
Claims (15)
1. a display drive method, by least one scanning line driving one display panel, this display drive method comprises the following steps:
Determine a first object level voltage and the one second target level voltage of scanning-line signal;
According to the resistance capacitance load of this sweep trace, to determine one first switching time and one second switching time;
At least one first preliminary filling level voltage and at least one second preliminary filling level voltage is determined according to this first object level voltage, this second target level voltage, this first switching time and this second switching time; And
Export this first preliminary filling level voltage, this first object level voltage, this the second preliminary filling level voltage and this second target level voltage are to drive this display panel, wherein this first preliminary filling level voltage switches to this first object level voltage after this first switching time, this the second preliminary filling level voltage switches to this second target level voltage after this second switching time, this first object level voltage and this second target level voltage are that foundation drives the gray scale voltage value of the data drive signal of this display panel to decide, at least high than the gray scale voltage of the most high levle critical voltage of this first object level voltage, at least low than the gray scale voltage of the minimum level critical voltage of this second target level voltage.
2. display drive method according to claim 1, is characterized in that, this first preliminary filling level voltage is higher than this first object level voltage, and this second preliminary filling level voltage is lower than this second target level voltage.
3. display drive method according to claim 1, is characterized in that, the resistance capacitance load according to this sweep trace produces the time constant of this sweep trace, to determine this first switching time and this second switching time.
4. display drive method according to claim 1, is characterized in that, when a time point, exports one of them of this first preliminary filling level voltage, this first object level voltage, this second preliminary filling level voltage and this second target level voltage.
5. a driver module, by least one scanning line driving one display panel, this driver module comprises:
Scan driving circuit, export one scan drive singal and drive this display panel, this scanning drive signal has at least one first preliminary filling level voltage and a first object level voltage, and this first preliminary filling level voltage switches to this first object level voltage after one first switching time;
One testing circuit, measures the resistance capacitance load of this sweep trace, to determine this first switching time; And
One scan signal generating circuit, be electrically connected with this scan drive circuit and this testing circuit, and control this scan drive circuit and export this scanning drive signal, this generation circuit of scanning signals is according to this first object level voltage and determine this first preliminary filling level voltage this first switching time
Wherein this first object level voltage is according to driving the gray scale voltage value of data drive signal of this display panel to decide, and at least high than the gray scale voltage of the most high levle critical voltage of this first object level voltage.
6. driver module according to claim 5, is characterized in that, this testing circuit produces the time constant of this sweep trace, to select this first switching time according to the resistance capacitance load of this sweep trace.
7. driver module according to claim 5, it is characterized in that, this scanning drive signal has more at least one second preliminary filling level voltage and one second target level voltage, this the second preliminary filling level voltage switches to this second target level voltage after one second switching time, this this second target level voltage is that foundation drives this gray scale voltage value of this data drive signal of this display panel to decide, and at least low than the gray scale voltage of the minimum level critical voltage of this second target level voltage.
8. driver module according to claim 7, is characterized in that, this generation circuit of scanning signals is according to this second target level voltage and determine this second preliminary filling level voltage this second switching time.
9. driver module according to claim 7, is characterized in that, this first preliminary filling level voltage is higher than this first object level voltage, and this second preliminary filling level voltage is lower than this second target level voltage.
10. a display device, comprising:
One display panel; And
One driver module, by this display panel of at least one scanning line driving, this driver module has:
Scan driving circuit, export one scan drive singal and drive this display panel, this scanning drive signal has at least one first preliminary filling level voltage and a first object level voltage, and this first preliminary filling level voltage switches to this first object level voltage after one first switching time;
One testing circuit, measures the resistance capacitance load of this sweep trace, to determine this first switching time; And
One scan signal generating circuit, be electrically connected with this scan drive circuit and this testing circuit, and control this scan drive circuit and export this scanning drive signal, this generation circuit of scanning signals is according to this first object level voltage and determine this first preliminary filling level voltage this first switching time
Wherein this first object level voltage is according to driving the gray scale voltage value of data drive signal of this display panel to decide, and at least high than the gray scale voltage of the most high levle critical voltage of this first object level voltage.
11. display device according to claim 10, is characterized in that, this testing circuit produces the time constant of this sweep trace, to select this first switching time according to the resistance capacitance load of this sweep trace.
12. display device according to claim 10, it is characterized in that, this scanning drive signal has more at least one second preliminary filling level voltage and one second target level voltage, this the second preliminary filling level voltage switches to this second target level voltage after one second switching time, this the second target level voltage is that foundation drives this gray scale voltage value of this data drive signal of this display panel to decide, and at least low than the gray scale voltage of the minimum level critical voltage of this second target level voltage.
13. display device according to claim 12, is characterized in that, this generation circuit of scanning signals is according to this second target level voltage and determine this second preliminary filling level voltage this second switching time.
14. display device according to claim 12, it is characterized in that, this scan drive circuit, in time putting sometime, exports one of them of this first preliminary filling level voltage, this first object level voltage, this second preliminary filling level voltage and this second target level voltage.
15. display device according to claim 12, is characterized in that, this first preliminary filling level voltage is higher than this first object level voltage, and this second preliminary filling level voltage is lower than this second target level voltage.
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| CN201110408172.9A CN103165059B (en) | 2011-12-09 | 2011-12-09 | Display drive method, driver module and display device |
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| CN105609079A (en) * | 2016-03-11 | 2016-05-25 | 武汉华星光电技术有限公司 | Touch control apparatus driving method, drive circuit for touch control apparatus, and touch control apparatus |
| CN107230454A (en) * | 2017-07-11 | 2017-10-03 | 深圳市华星光电技术有限公司 | Display device and its driving method |
| KR102480481B1 (en) * | 2017-09-22 | 2022-12-26 | 삼성디스플레이 주식회사 | Display device and driving method thereof |
| CN109493779A (en) | 2018-11-27 | 2019-03-19 | 惠科股份有限公司 | Display panel, pixel charging method and computer readable storage medium |
| CN114822417B (en) * | 2022-05-07 | 2023-10-27 | 昆山国显光电有限公司 | Display device and control method thereof |
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