CN103162725A

CN103162725A - Photoelectric encoder rotating pulse display device

Info

Publication number: CN103162725A
Application number: CN201310064181XA
Authority: CN
Inventors: 高富强; 严强; 安康; 李岭; 兰扬; 陈赟飞; 冯永
Original assignee: Chongqing University
Current assignee: Chongqing University
Priority date: 2013-02-28
Filing date: 2013-02-28
Publication date: 2013-06-19

Abstract

The invention discloses a photoelectric encoder rotating pulse display device, and belongs to the application field of photoelectric encoder measuring. The photoelectric encoder rotating pulse display device comprises a photoelectric coupler, a field-programmable gate array (FPGA), a crystal oscillator, a configured chip and a display device. The photoelectric coupler receives and amplifies AB two-phase pulse signals which are outputted by a photoelectric encoder, and then outputs the two-phase pulse signals to the FPGA. The FPGA calculates according to the received pulse signals to obtain the rotating direction, the rotating angle and the number of pulses of the photoelectric encoder, and transmits the calculated results to the display device. The configured chip is used for storing the algorithmic routine of the FPGA. The crystal oscillator is used for providing clock signals. The photoelectric encoder rotating pulse display device does not need to be driven by a large number of peripheral circuits, so that hardware cost can be saved, and transportability and expansibility are high. Meanwhile, the photoelectric encoder rotating pulse display device can display not only the pulse count but also the rotating angle so as to avoid a man-made wrong operation.

Description

The rotary pulsed display device of a kind of photoelectric encoder

Technical field

The invention belongs to photoelectric encoder and measure application, relate to the rotary pulsed display device of a kind of photoelectric encoder.

Background technology

Photoelectric encoder is a kind of sensor of pulse or digital quantity that geometry of machinery displacement on output shaft converted to by opto-electronic conversion, is to use at present maximum sensors.The effect of the photoelectric encoder in kinetic control system is that the parameters such as position and angle are converted to digital quantity, and rotary encoder is the device of measuring rotating speed, and it is divided into two kinds of single channel output and doubleway outputs.

In present engineering application, the operation of stepper motor needs photoelectric encoder to control usually, in the process of scrambler control step motor rotation, the requirement scrambler rotates to an angle, and corresponding stepper motor rotates to an angle, but owing to being by manually the parameters such as the anglec of rotation being identified and operated at present mostly, numeral useless shows automatically, be easy to occur maloperation, as rotate the too fast motor wearing and tearing aggravation that causes, exceed required angle etc.

Some the photoelectric encoder pulse display devices or the method that exist at present adopt single-chip microcomputer to control mostly, single-chip microcomputer needs a large amount of peripheral circuits to drive for FPGA, this just causes increases hardware cost and complex software degree on the one hand, make software transportability and poor plasticity, also make on the other hand the expansibility of device poor, processing speed is slow.Simultaneously, present display device is the simple step-by-step counting of exporting, and does not consider the anglec of rotation of photoelectric encoder and sense of rotation etc., makes and in use easily causes maloperation.

Summary of the invention

In view of this, the object of the present invention is to provide the rotary pulsed display device of a kind of photoelectric encoder, the main on-site programmable gate array FPGA that adopts of this device can carry out numeral demonstration to the anglec of rotation of photoelectric encoder and step-by-step counting etc.

For achieving the above object, the invention provides following technical scheme:

The rotary pulsed display device of a kind of photoelectric encoder comprises a photoelectrical coupler, an on-site programmable gate array FPGA as key process unit, a crystal oscillator, a configuring chip and a display device; Photoelectrical coupler receive the AB two-phase pulse signal of photoelectric encoder output and it is amplified after export on-site programmable gate array FPGA to, FPGA calculates sense of rotation, the anglec of rotation and the pulse number of photoelectric encoder according to the pulse signal that receives, and result of calculation is sent to display device; Configuring chip is used for the algorithm routine of storage FPGA, and crystal oscillator is used for providing clock signal; Described on-site programmable gate array FPGA comprises phase relation judge module and pulse counter module; The phase relation judge module is according to the sense of rotation of the judgement of the phase relation between AB two-phase pulse signal photoelectric encoder, and B lags behind as forward, B mutually mutually in advance for reversing; Pulse counter module is used for the rotary pulsed of photoelectric encoder counted, and in the forward situation, A is rising edge mutually, and counter adds 1, the beginning step-by-step counting, and under Reversion, A is rising edge mutually, counter subtracts 1, step-by-step counting.

Further, on-site programmable gate array FPGA also comprises anglec of rotation computing module, and anglec of rotation computing module is used for calculating the anglec of rotation of photoelectric encoder, according to the requirement of rotating cycle corresponding angle, the pulse count frequency division, pulse number/divider ratio=anglec of rotation.

Carry out the filtering buffer memory in 4 cycles when further, on-site programmable gate array FPGA receives the pulse of A phase.

Further, carry out the time-delay reset of 1ms after FPGA powers on.

Further, key process unit adopts CPLD.

Further, described display device adopts 8 sections LED charactrons.

Beneficial effect of the present invention is: adopt on-site programmable gate array FPGA not need a large amount of peripheral circuits to drive as processing core, can the economize on hardware cost, and portability and expansibility are higher, in addition, algorithm is simple and clear, and transplantability is good, highly versatile, and have very strong robustness, result of calculation is accurate; Simultaneously, display device of the present invention not only can show step-by-step counting, and can show the anglec of rotation, with the maloperation of avoiding manually carrying out.

Description of drawings

In order to make purpose of the present invention, technical scheme and beneficial effect clearer, the invention provides following accompanying drawing and describe:

Fig. 1 is structural representation of the present invention.

Embodiment

Below in conjunction with accompanying drawing, the preferred embodiments of the present invention are described in detail.

Fig. 1 is structural representation of the present invention, and the rotary pulsed display device of this photoelectric encoder comprises a photoelectrical coupler, an on-site programmable gate array FPGA, a crystal oscillator, a configuring chip and a display device; Photoelectrical coupler receive the AB two-phase pulse signal of photoelectric encoder output and it is amplified after export on-site programmable gate array FPGA to, FPGA calculates sense of rotation, the anglec of rotation and the pulse number of photoelectric encoder according to the pulse signal that receives, and result of calculation is sent to display device shows, display device adopts 8 sections LED charactrons in the present embodiment; Configuring chip is used for the algorithm routine of storage FPGA, and crystal oscillator is used for providing clock signal.

In the present embodiment, described on-site programmable gate array FPGA comprises phase relation judge module and pulse counter module; The phase relation judge module is according to the sense of rotation of the judgement of the phase relation between AB two-phase pulse signal photoelectric encoder, and B lags behind as forward, B mutually mutually in advance for reversing; Pulse counter module is used for the rotary pulsed of photoelectric encoder counted, and in the forward situation, A is rising edge mutually, and counter adds 1, the beginning step-by-step counting, and under Reversion, A is rising edge mutually, counter subtracts 1, step-by-step counting.

A kind of improvement as the present embodiment, programmable gate array FPGA also comprises anglec of rotation computing module at the scene, anglec of rotation computing module is used for calculating the anglec of rotation of photoelectric encoder, make this device not only can show step-by-step counting, can also show the anglec of rotation, be that anglec of rotation computing module is according to the requirement of rotating cycle corresponding angle, pulse count frequency division, pulse number/divider ratio=anglec of rotation.

Another kind as the present embodiment improves, and on-site programmable gate array FPGA carries out the filtering buffer memory in 4 cycles when receiving the pulse of A phase, can make like this photoelectric encoder external equipment can not disturb demonstration, improves stabilization of equipment performance.

Simultaneously, due to the employing minimizing device operation that automatically resets that powers on, can produce a pulse in power up, device is carried out maloperation, cause initial value not right, so adopt time-delay reset in algorithm, the time-delay reset of 1ms is carried out in the impact of eliminating error pulse after namely FPGA powers on.

Improve as another kind, the key process unit of this display device can also adopt CPLD.

Explanation is at last, above preferred embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is described in detail by above preferred embodiment, but those skilled in the art are to be understood that, can make various changes to it in the form and details, and not depart from claims limited range of the present invention.

Claims

1. the rotary pulsed display device of photoelectric encoder, is characterized in that: comprise a photoelectrical coupler, an on-site programmable gate array FPGA as key process unit, a crystal oscillator, a configuring chip and a display device; Photoelectrical coupler receive the AB two-phase pulse signal of photoelectric encoder output and it is amplified after export on-site programmable gate array FPGA to, FPGA calculates sense of rotation, the anglec of rotation and the pulse number of photoelectric encoder according to the pulse signal that receives, and result of calculation is sent to display device; Configuring chip is used for the algorithm routine of storage FPGA, and crystal oscillator is used for providing clock signal;

Described on-site programmable gate array FPGA comprises phase relation judge module and pulse counter module;

The phase relation judge module is according to the sense of rotation of the judgement of the phase relation between AB two-phase pulse signal photoelectric encoder, and B lags behind as forward, B mutually mutually in advance for reversing;

Pulse counter module is used for the rotary pulsed of photoelectric encoder counted, and in the forward situation, A is rising edge mutually, and counter adds 1, the beginning step-by-step counting, and under Reversion, A is rising edge mutually, counter subtracts 1, step-by-step counting.

2. the rotary pulsed display device of photoelectric encoder according to claim 1, it is characterized in that: on-site programmable gate array FPGA also comprises anglec of rotation computing module, anglec of rotation computing module is used for calculating the anglec of rotation of photoelectric encoder, according to the requirement of rotating cycle corresponding angle, the pulse count frequency division, pulse number/divider ratio=anglec of rotation.

3. the rotary pulsed display device of photoelectric encoder according to claim 1, it is characterized in that: on-site programmable gate array FPGA carries out the filtering buffer memory in 4 cycles when receiving the pulse of A phase.

4. the rotary pulsed display device of photoelectric encoder according to claim 1, is characterized in that: the time-delay reset that carries out 1ms after FPGA powers on.

5. the rotary pulsed display device of photoelectric encoder according to claim 1, is characterized in that: key process unit employing CPLD.

6. the rotary pulsed display device of the described photoelectric encoder of any one according to claim 1 to 5, is characterized in that: 8 sections LED charactrons of described display device employing.