CN103152944B - Light-emitting diode (LED) driving circuit - Google Patents
Light-emitting diode (LED) driving circuit Download PDFInfo
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- CN103152944B CN103152944B CN201310068470.7A CN201310068470A CN103152944B CN 103152944 B CN103152944 B CN 103152944B CN 201310068470 A CN201310068470 A CN 201310068470A CN 103152944 B CN103152944 B CN 103152944B
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Abstract
The invention provides a light-emitting diode (LED) driving circuit, which comprises an inductor L1, a diode D1, a capacitor C1, a power switch, a sampling switch, a current sampling circuit and a current mode control circuit. The current sampling circuit and the current mode control circuit are arranged on a first wafer, and the power switch and the sampling switch are arranged in a second wafer; the second wafer is made in a vertical groove gate process; and a manufacturing process of the first wafer is different from that of the second wafer. Compared with the prior art, according to the LED driving circuit, the control circuit is arranged in one wafer, the power switch and the sampling switch are arranged in the other wafer, the two wafers are packaged together, and the power switch and the sampling switch are manufactured by a sampling vertical groove gate process, so that the power switch and the sampling switch which are lower in costs, lower in on-resistance and smaller in grid capacitance can be achieved.
Description
[technical field]
The present invention relates to circuit design field, particularly relate to a kind of LED (light-emitting Diode) drive circuit.
[background technology]
LED backlight drive circuit is widely used in various electronic equipment, such as panel computer and smart mobile phone.And experiment finds in a lot of portable electronic piece system, the consuming electric power of LED screen accounts for the half or even more of whole system power consumption.So improve the efficiency of LED screen, be full of highly significant the service time after electricity for energy-conservation, reduction heating, prolongation lithium battery.In prior art, LED-backlit driving chip is usually by power NMOSFET(N type metal-oxide semiconductor fieldeffect transistor) be integrated on same wafer with control circuit.Its reason is that LED backlight drive circuit generally adopts booster circuit, and booster circuit many employings pulse width modulation (PWM:Pulse Width Modulation) circuit structure, Right-half-plant zero (RHPZ:Right Half-Plane Zero) is there is in this structure in feedback loop control, this type of zero point is extremely bad on feedback loop stable impact, the impact of its frequency domain response makes gain increase 20dB/ sound interval, and phase place reduces 90 degree simultaneously.In order to realize feedback loop stable in prior art, usually adopting current-mode structure, the electric current of a part of power NMOSFET that namely samples, and injecting sample rate current to feedback control loop.In order to the electric current of accurate sampled power NMOSFET, to be employing one identical with domain with power NMOSFET type, structure but the sampling transistor that size is less for routine techniques, so just makes the scheme of integrated this power NMOSFET, sampling transistor and control circuit on the same wafer prevailing.
Fig. 1 is a kind of implementation of LED drive circuit of the prior art, and it comprises boosting output circuit and boost control circuit.Described boosting output circuit comprises the inductance L 1, diode D1 and the electric capacity C1 that are series at successively between input voltage VDD and ground, and the power switch MN1 (NMOSFET) be connected between the intermediate node of inductance L 1 and diode D1 and ground, the node between described diode D1 and electric capacity C1 is output node Vout.A string or go here and there WLED (white light emitting diode) and current feedback resistor Rs more and be connected on together between output node Vout and ground.
Described boost control circuit comprises sampling switch MNS1 (NMOSFET), current sampling circuit and current mode control circuit.Described sampling switch MNS1 and current sampling circuit are sampled electric current that described power switch MN1 flows through obtain the sample rate current of described power switch MN1 jointly.Described current mode control circuit controls conducting and the cut-off of described power switch MN1 according to the Current feedback voltage output switch control signal that the sample rate current of power switch and current feedback resistor Rs obtain, and wherein the conducting of this sampling switch MNS1 is also controlled by this switch controlling signal with cut-off.
In the prior art, current sampling circuit, sampling switch MNS1, power switch MN1 and current mode control circuit are integrated in same wafer usually, i.e. dotted line frame 110 part of surrounding.On the other hand, larger (conduction loss during MN1 conducting is I to the conducting resistance of this power switch MN1 its energy loss larger
2.R, wherein I is the On current of MN1, and R is the conducting resistance of MN1), cause the efficiency of LED drive circuit lower like this; The grid capacitance of this power switch MN1 is larger simultaneously, and making the switching loss of LED drive circuit, larger (switching loss is 1/2.C.V
2.f, wherein C is the grid capacitance of power switch MN1, and V is the grid voltage amplitude of oscillation of MN1, and f is the switching frequency of MN1), also cause the efficiency of LED drive circuit lower.
Can by the circuit technology integrated of power switch and control circuit, current state-of-the-art technology is the planar technique adopting BCD (Bipolar CMOS (Complementary Metal Oxide Semiconductor) DMOS), adopts DMOS (Diffused Metal-Oxide Semiconductor) to carry out design power switch MN1 to reaching less conducting resistance and grid capacitance.But conducting resistance and the grid capacitance of the power switch MN1 designed like this are still larger.
Therefore, be necessary that the technical scheme proposing a kind of improvement solves the problems referred to above.
[summary of the invention]
An object of the present invention is to provide a kind of LED drive circuit, and it has efficiency advantages of higher.
To achieve these goals, according to an aspect of the present invention, the present invention proposes a kind of LED drive circuit, it comprises: inductance L 1, diode D1, electric capacity C1, power switch, sampling switch, current sampling circuit and current mode control circuit, current sampling circuit and current mode control circuit are arranged in the first wafer, power switch and sampling switch are arranged in the second wafer, the second wafer adopts the manufacture of vertical trench grid technique, the manufacturing process of the first wafer and the different of the second wafer.
Further, inductance L 1, diode D1 and electric capacity C1 are series between input voltage and ground successively, and between the intermediate node that power switch is connected on inductance L 1 and diode D1 and ground, the node between described diode D1 and electric capacity C1 is output node.
Further, described sampling switch and current sampling circuit are sampled electric current that described power switch flows through obtain the sample rate current of described power switch jointly, and described current mode control circuit controls conducting and the cut-off of described power switch and described sampling switch according to the sample rate current of power switch and Current feedback voltage output switch control signal.
Further, described sampling switch and described power switch are all NMOSEFT, the drain electrode of described sampling switch connects described current sampling circuit, form the DS pressure welding area of the second wafer, the grid of described sampling switch is connected with the grid of described power switch, form the G pressure welding area of the second wafer, and be connected with the output of described current mode control circuit, the drain electrode of described power switch connects the intermediate node of inductance L 1 and diode D1, form the DN pressure welding area of the second wafer, the drain electrode of described sampling switch is connected with the drain electrode of described power switch, form the S pressure welding area of the second wafer, and ground connection.
Further, the first wafer is together with the second wafer package.
Further, described power switch is identical with the structure of described sampling switch, described power switch comprises N+ substrate, be formed at the N-layer of N+ types of flexure, be formed at the P-trap above N-layer, the grid in N-layer is extended downward from the upper surface of P-trap, half around described grid with the grid oxide layer by described gate isolation, N+ active area in P-trap and P+ active area is extended downward from the upper surface of P-trap, wherein N+ active area forms the source electrode of power switch, P+ active area forms the lining body link of power switch, the drain electrode of N+ substrate-like success rate switch, P+ represents the heavy doping of P type, P-represents P type light dope, N+ represents N-type heavy doping, N-represents N-type light dope, DP region is formed between described power switch and described sampling switch, described DP region extends downward the lower surface of N+ substrate from the upper surface of the N-layer between described power switch and described sampling switch, the N+ layer of isolation N-layer and bottom.
Further, the upper surface of described grid is exposed to outside described grid oxide layer, and described grid oxide layer is U-shaped, P+ active area comparatively N+ active area further from described grid, all be provided with P+ active area and N+ active area in the both sides of described grid, N+ active area and P+ active area adjacent.
Further, the manufacture process of described power switch and described sampling switch is as follows: in the original wafer that N-is low-doped, implanting p-type material is to form DP region, produces the N-region of two isolation; The bottom removing DP extra-regional part low-doped at N-carries out N+ injection; Through the groove that over etching is formed, oxidation produces grid oxide layer, then forms grid at groove depositing polysilicon; Carry out doping to inject, produce P-trap; Carry out N+ injection, carry out P+ injection, extend downward N+ active area in P-trap and P+ active area to be formed from the upper surface of P-trap.
Further, described DP region forms annular region, forms described sampling switch, outside the DP region of annular, form described power switch in the DP region of annular.
Further, in the original wafer that N-is low-doped, implanting p-type material comprises to form DP region: inject from the top layer of the low-doped original wafer of N-respectively and bottom injects, and final twice injection is connected to form described DP region.
Compared with prior art, LED drive circuit in the present invention, control circuit is arranged in one piece of wafer, power switch and sampling switch are arranged in another block wafer, and by two wafer package together, sampling vertical trench grid technique manufactures power switch and sampling switch, can realize that cost is lower, conducting resistance is lower like this and the power switch that grid capacitance is less and sampling switch.
[accompanying drawing explanation]
In order to be illustrated more clearly in the technical scheme of the embodiment of the present invention, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.Wherein:
Fig. 1 is the circuit diagram of LED drive circuit of the prior art;
Fig. 2 is the LED drive circuit circuit diagram in one embodiment in the present invention;
Fig. 3 is the structural representation of power switch and the sampling switch adopting vertical trench grid technique to produce;
Fig. 4 a-4e is the product structure change schematic diagram of power switch and the sampling switch adopting vertical trench grid technique to produce;
Fig. 5 is in one embodiment, the vertical view of the wafer obtained after the original wafer of low-doped (N-) injects DP layer; With
Fig. 6 is in another embodiment, the structural representation of the wafer obtained after the original wafer of low-doped (N-) injects DP layer.
[embodiment]
For enabling above-mentioned purpose of the present invention, feature and advantage become apparent more, and below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation.The word that " connection ", " connecting ", " being connected to " etc. herein relate to electric connection all can represent direct or indirect electric connection.
Alleged herein " embodiment " or " embodiment " refers to special characteristic, structure or the characteristic that can be contained at least one implementation of the present invention.Different local in this manual " in one embodiment " occurred not all refers to same embodiment, neither be independent or optionally mutually exclusive with other embodiments embodiment.
The present invention proposes a kind of LED drive circuit efficiently.In this LED drive circuit, control circuit (comprising current sampling circuit and current mode control circuit) is arranged in one piece of wafer, power switch and sampling switch is arranged in another block wafer, and by two wafer package together.Especially, adopt vertical trench grid technique to manufacture power switch and sampling switch, can realize that cost is lower, conducting resistance is lower like this and the power switch that grid capacitance is less and sampling switch.This LED drive circuit may be used in display backlight system.
Fig. 2 is the LED drive circuit circuit diagram in one embodiment in the present invention.As shown in Figure 2, described LED drive circuit comprises inductance L 1, diode D1, electric capacity C1, power switch MN1, sampling switch MNS1, current sampling circuit and current mode control circuit.
Wherein, inductance L 1, diode D1 and electric capacity C1 are series between input voltage VDD and ground successively, and between the intermediate node that power switch MN1 is connected on inductance L 1 and diode D1 and ground, the node between described diode D1 and electric capacity C1 is output node Vout.Two string WLED (white light emitting diode) series connection, are connected between output node Vout and ground afterwards together with current feedback resistor Rs.In other example, also can only have a string WLED, or more string WLED.
Described sampling switch MNS1 and current sampling circuit are sampled electric current that described power switch MN1 flows through obtain the sample rate current of described power switch MN1 jointly.Described current mode control circuit controls conducting and the cut-off of described power switch MN1 according to the Current feedback voltage output switch control signal that the sample rate current of power switch and current feedback resistor Rs obtain, and wherein the conducting of this sampling switch MNS1 is also controlled by this switch controlling signal with cut-off.
In LED drive circuit in fig. 2, current sampling circuit and current mode control circuit are arranged in the first wafer 210, power switch MN1 and sampling switch MNS1 is arranged in the second wafer 220.By two wafer package together, can save a packaging cost.Adopt the manufacture of suitable manufacturing process (such as CMOS technology, the technique of Bipolar CMOS technology or other existing applicable control circuits) in first wafer 210, the second wafer 220 adopts the manufacture of vertical trench grid technique.That is, the first wafer 210 is different with the semiconductor fabrication process that the second wafer 220 adopts.
Sampling switch MNS1 and described power switch MN1 is NMOSFET (N-type metal-oxide semiconductor fieldeffect transistor).
The drain electrode of described sampling switch MNS1 connects described current sampling circuit, forms the DS end (or claiming DS pressure welding area) of the second wafer 220.The grid of described sampling switch MNS1 is connected with the grid of described power switch MN1, forms the G end (or claiming G pressure welding area) of the second wafer 220, and is connected with the output of current mode control circuit.The drain electrode of described power switch MN1 connects the intermediate node of inductance L 1 and diode D1, forms the DN end (or claiming DN pressure welding area) of the second wafer 220.The drain electrode of described sampling switch MNS1 is connected with the drain electrode of described power switch MN1, forms the S end (or claiming S pressure welding area) of the second wafer 220, and ground connection.Like this, the second wafer 220 just has four pressure welding area: S ends, G end, DN end, DS end.
Because power switch MN1 and sampling switch MNS1 adopt vertical trench grid technique, can realize that cost is lower, conducting resistance is lower like this and the power switch that grid capacitance is less and sampling switch.But, in order to realize being integrated in same wafer by described power switch MN1 and described sampling switch MNS1 according to the demand, need to improve existing vertical trench gate power MOS technique, otherwise the drain electrode of the drain electrode of described power switch MN1 and described sampling switch MNS1 cannot be separated.
Fig. 3 is the structural representation of power switch and the sampling switch adopting vertical trench grid technique to produce.Described second wafer 220 comprises described power switch MN1 and described sampling switch MNS1.Described power switch MN1 is identical with described sampling switch MNS1 structure, but the size of described power switch MN1 is comparatively large, can be composed in parallel by multiple small transistor.
As shown in Figure 3, described power switch MN1 comprises N+ substrate, be formed at the N-layer of N+ types of flexure, be formed at the P-trap above N-layer, the grid in N-layer is extended downward from the upper surface of P-trap, half around described grid (oblique line fill area) with the grid oxide layer by described gate isolation, extend downward N+ active area in P-trap and P+ active area from the upper surface of P-trap.The upper surface of described grid is exposed to outside described grid oxide layer, and described grid oxide layer is U-shaped, and P+ active area comparatively N+ active area, further from described grid, is all provided with P+ active area and N+ active area in the both sides of described grid, N+ active area and P+ active area adjacent.Wherein N+ active area forms the source electrode of power switch MN1, and P+ active area forms the lining body link of power switch MN1, the drain electrode of N+ substrate-like success rate switch MN1.P+ represents the heavy doping of P type, and P-represents P type light dope, and N+ represents N-type heavy doping, and N-represents N-type light dope.
Because described sampling switch MNS1 is identical with the structure of power switch MN1, therefore no longer repeat the structure introducing sampling switch MNS1, both annexations were also introduced above, repeated no more herein.
Separate to make the drain electrode of the drain electrode of described power switch MN1 and described sampling switch MNS1, also be formed the DP region of two device isolation (also can be called DP layer or P type separator) between described power switch MN1 and described sampling switch MNS1, described DP region extends downward the lower surface of N+ substrate from the upper surface of the N-layer between described power switch MN1 and described sampling switch MNS1, isolation N-layer and N+ substrate.
When the grid voltage of described sampling switch MNS1 and power switch MN1 is greater than threshold voltage, electronics is assembled near grid oxygen side in P-region outside grid, realizes transoid, forms raceway groove, be communicated with described N+ active area and N-layer, described sampling switch MNS1 and power switch MN1 conducting.
Fig. 4 a-4e is the product structure change schematic diagram of power switch and the sampling switch adopting vertical trench grid technique to produce, the semi-finished product obtained after it illustrates each processing step and final finished.
The manufacture process of the second wafer as shown in Figure 3 is specifically introduced below in conjunction with Fig. 4 a-4e.
The first step, in the original wafer of low-doped (N-), implanting p-type material is to form DP layer, produces the N-region of two isolation, obtains the structure shown in Fig. 4 a.
Actual injection DP layer can be surround an annular region, and for manufacturing the region of described sampling switch MNS1 in annular region, annular region is outward the region of the described power switch MN1 of manufacture.Please refer to shown in Fig. 5, it is in one embodiment, in the original wafer of low-doped (N-), implanting p-type material is with the vertical view of the wafer obtained after forming DP layer, and wherein mesh-like area is DP layer injection zone, and whole housing represents whole chip area.What Fig. 5 described be rectangle ring-type DP layer, can be square loop shape DP layer or annular DP layer or polygon DP layer in actual design, as long as the N-regions that formation two is isolated.In one embodiment, in the annular that DP layer is formed, form sampling switch MNS1, the annular region formed at DP layer forms described power switch MN1 outward.
Please refer to shown in Fig. 6, it is in another embodiment, the structural representation of the wafer obtained after the original wafer of low-doped (N-) injects DP layer.In this embodiment, the original wafer of low-doped (N-) is injected DP layer step and can be divided into two steps, namely inject and bottom injection from the top layer of the original wafer of low-doped (N-) respectively, final twice injection is connected to form described DP layer, produce the N-region of two isolation, the more uniform DP of thickness can be obtained like this, and inject also more quick and effective, have higher success rate.
Proceed other subsequent steps for Fig. 4 a below to describe.
Second step, removes the extra-regional part of DP and carries out N+ injection, obtain the structure shown in Fig. 4 b bottom the original wafer of low-doped (N-).
3rd step, through the groove that over etching is formed, oxidation produces grid oxide layer, then forms grid at groove depositing polysilicon, obtains as illustrated in fig. 4 c.
4th step, carries out doping and injects, produce P-trap, as shown in figure 4d.
5th step, first carries out N+ injection, then carries out P+ injection, extends downward N+ active area in P-trap and P+ active area, as shown in fig 4e to be formed from the upper surface of P-trap.Material is thus formed the second wafer in Fig. 3.Here, also first can carry out P+ injection, then carry out N+ injection.
So far, basic device architecture is formed.In order to simplified characterization, be omitted description with the identical processing step of prior art, such as, by etching, splash-proofing sputtering metal produces contact hole, to make metal connect each N+, P+ electrode or polysilicon gate; Deposited metal is to be formed interconnected; Deposit passivation layer, and etching produces pressure welding area opening (PAD Opening) etc.Improve device property in other various prior aries, the Conventional process steps improving yield also can be added into improve processing performance, and in order to simplified characterization, omit, these measures do not affect the scope of application of the present invention herein yet.
In sum, LED drive circuit in the present invention, is arranged in one piece of wafer by control circuit, power switch and sampling switch are arranged in another block wafer, and by two wafer package together, adopt vertical trench grid technique to manufacture power switch and sampling switch.Wherein, the drain electrode of described sampling switch MNS1 connects described current sampling circuit, forms the DS end (or claiming DS pressure welding area) of the second wafer 220.The grid of described sampling switch MNS1 is connected with the grid of described power switch MN1, and forms the G end (or claiming G pressure welding area) of the second wafer 220.The drain electrode of described power switch MN1 connects the intermediate node of inductance L 1 and diode D1, forms the DN end (or claiming DN pressure welding area) of the second wafer 220.The drain electrode of described sampling switch MNS1 is connected with the drain electrode of described power switch MN1, and forms the S end (or claiming S pressure welding area) of the second wafer 220.Like this, the second wafer 220 just has four pressure welding area: S ends, G end, DN end, DS end.Produce adopting vertical trench grid technique comprise the second wafer 220 of power switch and sampling switch time, existing vertical trench gate power MOS technique is improved, separates to make the drain electrode of the drain electrode of described power switch MN1 and described sampling switch MNS1.Can realize that cost is lower, conducting resistance is lower like this and the power switch that grid capacitance is less and sampling switch.
Above-mentioned explanation fully discloses the specific embodiment of the present invention.It is pointed out that the scope be familiar with person skilled in art and any change that the specific embodiment of the present invention is done all do not departed to claims of the present invention.Correspondingly, the scope of claim of the present invention is also not limited only to previous embodiment.
Claims (8)
1. a LED drive circuit, is characterized in that, it comprises: inductance L 1, diode D1, electric capacity C1, power switch, sampling switch, current sampling circuit and current mode control circuit,
Current sampling circuit and current mode control circuit are arranged in the first wafer, power switch and sampling switch are arranged in the second wafer,
Second wafer adopts the manufacture of vertical trench grid technique, the manufacturing process of the first wafer and the different of the second wafer,
Described sampling switch and described power switch are all NMOSEFT,
The drain electrode of described sampling switch connects described current sampling circuit, form the DS pressure welding area of the second wafer, the grid of described sampling switch is connected with the grid of described power switch, form the G pressure welding area of the second wafer, and be connected with the output of described current mode control circuit, the drain electrode of described power switch connects the intermediate node of inductance L 1 and diode D1, form the DN pressure welding area of the second wafer, the source electrode of described sampling switch is connected with the source electrode of described power switch, form the S pressure welding area of the second wafer, and ground connection
Described power switch is identical with the structure of described sampling switch,
Described power switch comprises N+ substrate, be formed at the N-layer of N+ types of flexure, be formed at the P-trap above N-layer, the grid in N-layer is extended downward from the upper surface of P-trap, half around described grid with the grid oxide layer by described gate isolation, N+ active area in P-trap and P+ active area is extended downward from the upper surface of P-trap, wherein N+ active area forms the source electrode of power switch, P+ active area forms the lining body link of power switch, the drain electrode of N+ substrate-like success rate switch, P+ represents the heavy doping of P type, P-represents P type light dope, N+ represents N-type heavy doping, N-represents N-type light dope,
Between described power switch and described sampling switch, be formed with DP region, described DP region extends downward the lower surface of N+ substrate from the upper surface of the N-layer between described power switch and described sampling switch, the N+ layer of isolation N-layer and bottom.
2. LED drive circuit according to claim 1, it is characterized in that, inductance L 1, diode D1 and electric capacity C1 are series between input voltage and ground successively, between the intermediate node that power switch is connected on inductance L 1 and diode D1 and ground, the node between described diode D1 and electric capacity C1 is output node.
3. LED drive circuit according to claim 1, it is characterized in that, described sampling switch and current sampling circuit are sampled electric current that described power switch flows through obtain the sample rate current of described power switch jointly, and described current mode control circuit controls conducting and the cut-off of described power switch and described sampling switch according to the sample rate current of power switch and Current feedback voltage output switch control signal.
4. LED drive circuit according to claim 1, is characterized in that, the first wafer is together with the second wafer package.
5. LED drive circuit according to claim 1, it is characterized in that, the upper surface of described grid is exposed to outside described grid oxide layer, described grid oxide layer is U-shaped, P+ active area comparatively N+ active area further from described grid, all be provided with P+ active area and N+ active area in the both sides of described grid, N+ active area and P+ active area adjacent.
6. LED drive circuit according to claim 1, is characterized in that, the manufacture process of described power switch and described sampling switch is as follows:
In the original wafer that N-is low-doped, implanting p-type material is to form DP region, produces the N-region of two isolation;
The bottom removing DP extra-regional part low-doped at N-carries out N+ injection;
Through the groove that over etching is formed, oxidation produces grid oxide layer, then forms grid at groove depositing polysilicon;
Carry out doping to inject, produce P-trap;
Carry out N+ injection, carry out P+ injection, extend downward N+ active area in P-trap and P+ active area to be formed from the upper surface of P-trap.
7. LED drive circuit according to claim 6, is characterized in that, described DP region forms annular region, forms described sampling switch, outside the DP region of annular, form described power switch in the DP region of annular.
8. described LED drive circuit according to claim 6, it is characterized in that, in the original wafer that N-is low-doped, implanting p-type material comprises to form DP region: inject from the top layer of the low-doped original wafer of N-respectively and bottom injects, and final twice injection is connected to form described DP region.
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| CN201310068470.7A CN103152944B (en) | 2013-03-04 | 2013-03-04 | Light-emitting diode (LED) driving circuit |
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| CN201310068470.7A CN103152944B (en) | 2013-03-04 | 2013-03-04 | Light-emitting diode (LED) driving circuit |
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| CN104320872B (en) * | 2014-09-02 | 2017-01-25 | 深圳市华星光电技术有限公司 | Light source driving circuit and method |
| CN106992502B (en) * | 2017-04-28 | 2019-03-05 | 南京中感微电子有限公司 | A kind of battery protecting circuit and chip |
| CN112557733A (en) * | 2020-12-01 | 2021-03-26 | 无锡先瞳半导体科技有限公司 | Current detection power device, lithium battery protector and electronic equipment |
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| CN101821852A (en) * | 2007-08-08 | 2010-09-01 | 先进模拟科技公司 | The cascode current sensor that is used for discrete power semiconductor devices |
| CN102611305A (en) * | 2007-06-11 | 2012-07-25 | 万国半导体股份有限公司 | Boost converter with integrated high power discrete fet and low voltage controller |
| CN203206528U (en) * | 2013-03-04 | 2013-09-18 | 无锡中星微电子有限公司 | A LED driving circuit |
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| US8253196B2 (en) * | 2004-01-29 | 2012-08-28 | Enpirion, Inc. | Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same |
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| CN102611305A (en) * | 2007-06-11 | 2012-07-25 | 万国半导体股份有限公司 | Boost converter with integrated high power discrete fet and low voltage controller |
| CN101821852A (en) * | 2007-08-08 | 2010-09-01 | 先进模拟科技公司 | The cascode current sensor that is used for discrete power semiconductor devices |
| CN203206528U (en) * | 2013-03-04 | 2013-09-18 | 无锡中星微电子有限公司 | A LED driving circuit |
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