CN103152154B - Full duplex single ended serial link communication system - Google Patents
Full duplex single ended serial link communication system Download PDFInfo
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- CN103152154B CN103152154B CN201210517198.1A CN201210517198A CN103152154B CN 103152154 B CN103152154 B CN 103152154B CN 201210517198 A CN201210517198 A CN 201210517198A CN 103152154 B CN103152154 B CN 103152154B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/14—Two-way operation using the same type of signal, i.e. duplex
- H04L5/143—Two-way operation using the same type of signal, i.e. duplex for modulated signals
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J1/00—Frequency-division multiplex systems
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/14—Two-way operation using the same type of signal, i.e. duplex
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M11/00—Telephonic communication systems specially adapted for combination with other electrical systems
- H04M11/06—Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors
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- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Bidirectional Digital Transmission (AREA)
- Dc Digital Transmission (AREA)
Abstract
This application describes a kind of system that full-duplex communication is carried out using single ended communication link.The system includes the first LI(link interface), it is configured to generation signal to be transmitted via the single ended communication link.The signal includes the data encoded on forward channels.The system further includes the second LI(link interface), it is configured to receive the signal from first LI(link interface) via the single ended communication link, and the signal is modulated with coded data on the reverse channel, therefore the signal is at the same time including the forward channel data and the backchannel data.
Description
Cross reference to related applications
The application is according to 35U.S.C. § 120, the U.S. Patent application of application serial 12/545,744, entitled " SYSTEM
AND METHOD FOR TRANSFERRING DATA OVERFULL-DUPLEX DIFFERENTIAL SERIAL LINK's "
Cip application, it is combined comprehensively by quoting herein.
Background technology
In numerous applications, high-speed data is substantially simultaneously transmitted to receiver together with the transmission of low speed data from source.
For example, in Video Applications, video data (for example, relatively high speed data) is transmitted to from video source (for example, camera) to be regarded
Frequency receiver (for example, display).Control data (for example, relative low speeds data) can transmission one with the video data at the same time
Rise bi-directionally transmitted between video source and video receiver.For example, the control data from video source to video receiver can refer to
Show how video data shows.And the control data for example from video receiver to video source can indicate camera visual angle,
The state of exposure, focusing or video equipment.At a high speed and low speed data is usually via entity cable transmission.
The content of the invention
Describe a kind of system that full-duplex communication is carried out using single ended communication link.The system connects including the first link
Mouthful, it is configured to the signal that generation is transmitted via the single ended communication link.The signal includes encoding on forward channels
Data.The system further includes the second LI(link interface), it is configured to via the single ended communication link from first LI(link interface)
The signal is received, and modulates the signal with coded data on the reverse channel so that the signal includes the forward channel at the same time
Data and the backchannel data.
It is to introduce the selection to concept in simplified form to provide this summary, it is further in the following detailed description
Ground describes.This summary is not intended to the key feature or essential characteristic for being equal to claimed theme, does not attempt to as true
The supplementary means of the scope of fixed claimed theme.
Brief description of the drawings
The detailed description is described with reference to the attached drawing.Identical reference is utilized in the different examples of specification and drawings
Numbering can indicate similar or identical object.
Figure 1A is a kind of block diagram of an example embodiment according to the disclosure, it is illustrated that a kind of to be used to transmit data
System.
Figure 1B is a kind of signal diagrams of another example embodiment according to the disclosure, it is illustrated that a kind of forward channel number
According to frame.
Fig. 1 C to 1E are the time-domain diagrams of the example embodiment according to the disclosure, it is illustrated that are encoded on forward and backward channel
Signal.
Fig. 2A is a kind of block diagram of another example embodiment according to the disclosure, it is illustrated that one kind is used to transmit data
System, the wherein system includes video/audio source, video/audio controller, display, audio processor and display-audio
Controller.
Fig. 2 B are a kind of signal diagrams of another example embodiment according to the disclosure, it is illustrated that another forward channel
Data frame.
Fig. 3 is a kind of block diagram, it is illustrated that the part for being used to transmit the system of data of Fig. 1 displayings, the wherein system
The part include forward channel driver, backward channel driver, high-frequency suppressing circuit and low frequency suppression circuit, and wherein
The data are transmitted in full duplex single ended serial data link.
Fig. 4 is another block diagram of another example embodiment according to the disclosure, it is illustrated that one kind is used to transmit number
According to system, the wherein system further includes transceiver.
Fig. 5 is a kind of block diagram of another example embodiment according to the disclosure, it is illustrated that one kind is used to transmit data
System, the wherein system includes multiple forward channel receivers.
Fig. 6 A are a kind of block diagrams of an example embodiment according to the disclosure, it is illustrated that a kind of forward channel high speed number
According to transmitter and a kind of backward channel low speed data receiver.
Fig. 6 B are a kind of block diagrams of another example embodiment according to the disclosure, it is illustrated that a kind of forward channel is at a high speed
Data source and multiple backward channel low speed data receivers.
Fig. 7 is a kind of block diagram of an example embodiment according to the disclosure, it is illustrated that a kind of forward channel high speed number
According to receiver and a kind of backward channel low speed data transmitter.
Fig. 8 is a kind of block diagram of another example embodiment according to the disclosure, it is illustrated that another kind is used to transmit number
According to system, wherein the system include high-speed data source, forward channel low speed data source, backward channel low speed data receiver,
High speed data receiver, forward channel low speed data receiver and backward channel low speed data source.
Embodiment
Summary
High-speed data at least substantially can be transmitted to receiver together with the transmission of low speed data from source at the same time.At one
Or in multiple embodiments, automobile and aircraft system can utilize Video Applications and voice applications to provide additional spy to the system
Sign (for example, the safety device of supplement, additional amusement equipment etc.).For example, automobile can include Central Information Display, instrument
Table display, rear seat entertainment unit etc..However, due to general stringent space and weight demands on automobile and aircraft, may
Wish that reduction is used to transmit the physical space and weight of the cable of data.
Therefore, a kind of system that full-duplex communication is carried out using single ended communication link is described.The system includes the first chain
Road interface, it is configured to the signal that generation is transmitted via the single ended communication link.The signal is included on forward channels
The data of coding.The system further includes the second LI(link interface), it is configured to via the single ended communication link from first link
Interface signal, and modulate the signal with coded data on the reverse channel so that the signal at the same time including this it is preceding to
Channel data and the backchannel data.The signal can pass through single ended communication link transmission.The single ended communication link can be with coupling
Close between the first LI(link interface) and the second LI(link interface).In one or more embodiments, which may wrap
Containing single coaxial cable, single printed circuit board trace etc..
In another embodiment, which can include suppression circuit to suppress a part for the data, should with output
The related data portion of signal.For example, the system can include forward channel suppression circuit, it is configured to suppress the signal
Forward data part is to export the reverse data part of the signal.In another example, which can include backward channel
Suppression circuit, it is configured to the backchannel data part for suppressing the signal, to export the forward data part of the signal.
In being discussed below, an example system that full-duplex communication is carried out using single ended communication link is described.
Example embodiment
Figure 1A is according to an exemplary embodiment of the present invention, it is illustrated that a kind of example system 100 for being used to transmit data
Block diagram.In short, system 100 uses the data transmission technology for providing full duplex single ended serial data link.Especially, the data
Transmission technology is needed together with the transmission of low speed data on backward channel (for example, control data), while is sent in forward channel
High-speed data (for example, video data) and low speed data (for example, audio and/or control data).In addition, the full duplex of the data
Transmission can occur on cheap physical medium, such as single coaxial cable, printed circuit board (PCB) (PCB) trace etc..
More precisely, system 100 includes high-speed data source 110,112 He of forward channel (FWD CHN) low speed data source
Backward channel (REV CHN) low speed data receiver 114, all these full duplex single ended serial data link 130 that are all located at
On one end.In one or more embodiments, full duplex single ended serial data link 130 includes single communication link.Such as should
Single communication link can be single coaxial cable, single PCB traces, simple wires etc..High-speed data source 110 can generate
Parallel high-speed (HS) data (for example, video data).FWD CHN low speed datas source 112 can generate that parallel, forward direction (channel) is low
Fast (FLS) data (for example, control and/or voice data).REV CHN low speed datas receiver 114 can receive parallel, reverse
(channel) low speed (RLS) data (for example, control data).
Term " high-speed data " mean that it is transmitted with speed (for example, higher frequency) than " low speed data " higher.
For example, high-speed data can be video data.And the low speed data can be audio and/or control data.It should be appreciated that " at a high speed
Data " are not necessarily limited to video, can include other types of data.Similarly, low speed data is not necessarily limited to control and/or audio
Data, can include other types of data.
System 100 further includes serial link interface 120, it is used for high-speed data source 110, FWDCHN low speed
Data source 112 and REV CHN low speed datas receiver 114 are connected to communication link 130, in this case, communication link 130
It is configured to full duplex single ended serial data link.Serial link interface 120 includes high-speed serializer 122, FWD CHN low-speed serials
Device 124, REV CHN low speed deserializer 126 and FWD CHN suppression circuits 128.The conversion of high-speed serializer 122 comes from high-speed data
The parallel HS data in source 110, it is carried out together with serial FLS data it is time-multiplexed to generate forward channel frame, so as to via
Full duplex single ended serial data link 130 is transmitted.
And FWD CHN low-speed serials device 124 becomes the parallel FLS data conversions from FWD CHN low speed datas source 112
Serial FLS data, as discussed, serial FLS data are time-multiplexed together with high-speed serial data.Sometimes, FWD CHN low speed
Data source 112 can generate FLS data in a serial fashion.In such a case, it is possible to cancel FWD CHN low-speed serials device 124, and
And FWD CHN low speed datas source 112 may be coupled directly to high-speed serializer 122.
FWD CHN suppression circuits 128 at least substantially suppress forward channel signal (for example, the list of serial HS and FLS data
Hold signaling), at least substantially to export serial, reverse (channel) low speed (RLS) of the opposite end received from communication link 130 letter
Number.For example, FWD CHN suppression circuits 128 can apply to filter out high frequency forward channel signal low-pass filter (LPF) or
Person's bandpass filter (BPF).Such as another example, FWD CHN suppression circuits 128 can be signal abatement apparatus, it is used at least
Substantially eliminate forward channel signal.Serial RLS data conversions are become parallel RLS data by REV CHN low speed deserializer 126,
Handled with will pass through REV CHN low speed datas receiver 114.
In the other end of communication link 130, system 100 includes high speed data receiver 160, FWD CHN low speed datas connect
Receive device 162 and REV CHN low speed datas source 164.High speed data receiver 160 is received and processed from high-speed data source 110
Parallel high-speed (HS) data (for example, video data).FWD CHN low speed datas receiver 162 is received and processed from FWD CHN
The parallel FLS data (for example, control and/or voice data) in low speed data source 112.REV CHN low speed datas source 164 produces simultaneously
Row, RLS data (for example, control data) are for being transferred to REV CHN low speed datas receiver 114.
System 100 further includes serial link interface 140, it is used for high speed data receiver 160, FWD
CHN low speed datas receiver 162 and REV CHN low speed datas source 164 are connected to communication link 130.Serial link interface 140 wraps
Include REV CHN suppression circuits 142, high speed deserializer 144, FWD CHN low speed deserializer 146, REV CHN low-speed serials device 150
With single-ended signal modulator 148.
REV CHN suppression circuits 142 suppress reverse channel signals (for example, single-ended modulated serial RLS data) with least base
The forward channel signal (such as HS and FLS data) of the opposite end received from communication link 130 is exported in sheet.For example, REV CHN press down
Circuit 142 processed can apply to filter out the high-pass filter (HPF) or BPF of low frequency back channel signal.Such as another example,
REV CHN suppression circuits 142 can be signal abatement apparatus, it is used at least substantially eliminate reverse channel signals.
Forward channel serial data is converted into forward channel parallel data by high speed deserializer 144.Forward channel is parallel
The HS data portions of data are sent to high speed data receiver 160 and are handled.The FLS data portions of forward channel parallel data
Divide and be sent to FWD CHN low speed deserializer 146, FLS data conversions are become parallel by it.Parallel FLS data are sent to FWD
CHN low speed datas receiver 162 is handled.Sometimes, FWDCHN low speed datas receiver 162 can have serial date transfer
To receive the FLS data, and the FLS data portions of HS data are only individual bit.In such a case, it is possible to cancel
FWD CHN low speed deserializer 146, and the corresponding bit of high speed deserializer 144 can be directly connected to FWD CHN data receivers
Device 162.
Parallel RLS data conversions from REV CHN low speed datas source 164 are become string by REV CHN low-speed serials device 150
Row RLS data.Sometimes, REV CHN low speed datas source 164 exports RLS data in a serial fashion.In such a case, it is possible to take
Disappear REV CHN low-speed serials device 150, and REV CHN low speed datas source 164 may be coupled directly to single-ended signal modulator
148.The RLS data modulation forward channel signal of single-ended signal modulator 148.Single-ended signal modulator 148 can include conversion
Speed control, controls the spectral content of backward channel so that at least base to modulate forward channel signal in a manner of relatively slow
Isolated in sheet from the spectral content of forward channel.
Figure 1B is according to disclosed another embodiment, it is illustrated that the signal diagrams of exemplary forward channel data frame.Show herein
In example, forward channel frame includes whole HS data words.For example, HS data bit HS 0 to HSN is included into the forward channel frame, wherein
N+1 is the length of the HS data words.In addition, forward channel frame includes a part for FLS data words.For example, the forward channel frame
Individual bit be reserved to the FLS data.It should be understood that more than one bit can be used for the FLS data in forward channel
And/or other data.
Fig. 1 C to 1E are according to another embodiment of the present disclosure, it is illustrated that the time domain of the example signal of forward and backward channel
Figure.Fig. 1 C illustrate the forward channel single-ended signal with repeating signal (for example, 101010) pattern.After Fig. 1 D illustrate modulation
Forward channel single-ended signal.Fig. 1 E illustrate the backchannel data that ash is multiple after high fdrequency component is suppressed.
On Fig. 1 C, forward channel single-ended signal includes voltage signal VP.Voltage signal VPIn upper voltage VUWith lower voltage VL
Between change.Such as diagram, voltage signal VPInitially (for example, period 1) in lower voltage VLPlace, then becomes during second round
Move voltage VU.It is clear however that voltage signal VPInitially can be from upper voltage VUStart.And Fig. 1 C illustrate a kind of repeat
Pattern, it is understood that forward channel single-ended signal can based on random data, therefore, forward direction single-ended signal can by represent with
The signal composition of machine data.
On Fig. 1 D, forward channel single-ended signal is reversed channel signal modulation.Brewed single-ended signal includes modulated
The voltage signal V of systemP′.Forward channel single-ended signal can be in upper voltage VUOn or lower voltage VLUnder be modulated.Example
Such as, in period 1, modulated signal VP' V can be includedUThe upper voltage (for example, peak change of amplitude) of+Δ M.Reverse
Another cycle of channel signal, modulated signal VP' can be in VLOn the lower voltage of-Δ M (such as trough change of amplitude).So
And as shown in figure iD, modulated signal VP' V can be modulated ontoUAnd VUValue and V between+Δ MLAnd VLValue between-Δ M.
Fig. 1 E illustrate modulated voltage VP' handled by FWD CHN suppression circuits 128 after caused signal (example
Such as, the reverse channel signals of recovery).Thus, FWD CHN suppression circuits 128 are by partly handling forward channel single-ended signal
Brewed part extract reverse channel signals, to export the reverse channel signals.
Fig. 2A is according to another embodiment of the present disclosure, it is illustrated that for the side for another example system 200 for transmitting data
Block diagram.System 200 is the example application of previously described system 100.Especially, system 200 is configured in forward channel transmission
Multi-medium data, such as video and voice data, and control data, and control data in backward channel transmission.This can be with
Lower situation, wherein video/audio (V/A) source, such as camera or DVD player, forward channel send video, audio and
Data are controlled to display.Forward channel control data can indicate how the video shows and how the audio reproduces.It is aobvious
Associated controller can be included with voicefrequency circuit by showing, it, which is used to send on the reverse channel, controls data to return to V/A sources.Instead
It can indicate how the V/A sources produce the video and voice data to channel control data.
More precisely, system 200 includes video/audio (V/A) source 210 and V/A controllers 212, both are positioned at complete double
One end of work order end serial data link 230.V/A sources 210 produced under the control of V/A controllers 212 parallel video data and
Parallel audio data.For example, voice data can be appropriate I2S-shaped formula.V/A controllers 212 can generate parallel forward direction letter
Road controls (FCC) data.V/A controllers 212 can also receive parallel, backward channel control (RCC) data.Such as previous opinion
State, FCC data can be used for controlling the one or more aspects that video is shown and/or audio plays.RCC data can be used for controlling
Make the one or more aspects of the capture and generation of the video and voice data.The data transfer rate of the video data is generally high
In audio and the data transfer rate of FCC data.
System 200 further includes serial link interface 220, it is used to connect in V/A sources 210 and V/A controllers 212
It is connected to full duplex single ended serial data link 230.Serial link interface 220 includes the serial device 222 of voice data, high-speed serializer
224th, FWD CHN control data serializer 226, REV CHN control data deserializers 228 and FWD CHN suppression circuits 229.
Parallel audio data conversion from V/A sources 210 is become serial audio data by the serial device 222 of voice data.Class
As, the parallel FCC data conversions from V/A controllers 212 are become serial FCC data by FWD CHN control data serializers.
High-speed serializer 224 changes the parallel video data from V/A sources 210, and by itself and serial audio data and serial FCC data
It is time-multiplexed to generate forward channel frame together, for being transmitted via full duplex single ended serial data link 230.Have
When, V/A controllers 212 can generate FCC data, rather than parallel mode in serial fashion.In such a case, it is possible to cancel
FWD CHN control data serializer 226, and V/A controllers 212 may be coupled directly to high-speed serializer 224.
FWD CHN suppression circuits 229 suppress forward channel signal, at least substantially to export received from the single-ended string of full duplex
The serial of the opposite end of row data link 230, Reverse Turning Control (RCC) data.For example, FWD CHN suppression circuits 229 can be applicable
In the LPF or BPF that filter out forward channel signal.Such as another example, FWDCHN suppression circuits 229 can be that signal elimination is set
Standby, it is suitable at least substantially eliminate forward channel signal.REV CHN control data deserializer 228 to turn serial RCC data
Change into and handled for parallel RCC data for V/A controllers 212.Sometimes, V/A controllers 212 may be configured to go here and there
Line mode receives RCC data, rather than parallel mode.In such a case, it is possible to cancel REV CHN control data deserializers
228, and V/A controllers 212 may be coupled directly to FWD CHN suppression circuits 229.
In the other end of full duplex single ended serial data link 230, system 200 includes audio processor 260, converter
262 (such as loudspeakers), display 264 (for example, liquid crystal display (LCD)) and display-Audio Controller 266.Audio frequency process
Device 260 handles received parallel audio data to generate simulated audio signal under the control of display-Audio Controller 266
For driving loudspeaker 262.Display 264 is under the control of display-Audio Controller 266, the received parallel video of processing
Data are to show correspondence image.Display-Audio Controller 266 can control audio processor 260 based on the FCC data of reception
With display 264.In addition, display-Audio Controller 266, which can generate RCC data, is used for transmission V/A controllers 212 to control
Make one or more operations in the V/A sources 210.
System 200 further includes serial link interface 240, it is by audio processor 260, display 264 and shows
Show-Audio Controller 266 is connected to full duplex single ended serial data link 230.Serial link interface 240 includes voice data solution
String device 242, REV CHN suppression circuits 246, high speed deserializer 244, FWD CHN controls data deserializer 247, single-ended (SE) letter
Number modulator 248 and REV CHN control data serializers 250.
It is preceding to letter at least substantially to export that REV CHN suppression circuits 246 suppress reverse channel signals (such as RCC data)
Road signal (such as video, audio and FCC data).In one embodiment, REV CHN suppression circuits 246 can apply to
Filter out the HPF or BPF of reverse channel signals.In another embodiment, REV CHN suppression circuits 246 can be that signal eliminates
Equipment, it is used at least substantially eliminate reverse channel signals.
Forward channel serial data is converted into forward channel parallel data by high speed deserializer 244.Forward channel is parallel
The video data portion of data is sent to display 264 and is used for image display purpose.The voice data of forward channel parallel data
Part is sent to voice data deserializer 242.The serial audio data is converted into parallel audio by voice data deserializer 242
Data, and the parallel audio data are provided and are used for sounding purpose to audio processor 260.The FCC numbers of forward channel parallel data
According to FWD CHN control data deserializers 247 are partly sent to, which is become parallel by it.Parallel FCC data quilts
Display-Audio Controller 266 is issued to be handled.Sometimes, display-Audio Controller 266 can only connect via serial port
Receive control data.In such a case, it is possible to cancel FWD CHN control data deserializers 247, and high speed deserializer 244
Corresponding position output can be directly connected to the serial port of display-Audio Controller 266.
REV CHN control data serializers 250 become the parallel RCC data conversions from display-Audio Controller 266
Serial RCC data.The RCC data modulation forward channel signal of SE signal modulators 248.SE signal modulators 248 can include
Conversion rate control, the spectral content of backward channel is controlled to modulate forward channel signal in a manner of relatively slow, so that
At least substantially backward channel is isolated from the spectral content of forward channel.Sometimes, display-Audio Controller 266 can be only
Only via serial port output control data.In such a case, it is possible to cancel FWD CHN control data serializers 250, and
The correspondence position output of display-Audio Controller 266 can be directly connected to SE signal modulators 248.
Another embodiments of Fig. 2 B according to invention, it is illustrated that the signal diagrams of example forward channel data frame.In this example
In, forward channel frame includes whole video data word.For example, video data bit V0 to VN is included into the forward channel frame, its
Middle N+1 is the length of the video data word.In addition, the forward channel frame includes a part for voice data word (for example, a ratio
It is special).Further, which includes a part (for example, a bit) for FCC data words.It should be understood that before this
Into channel frame, more than one bit can be used for the voice data and for the FCC data.
Fig. 3 is according to another embodiment of the present disclosure, it is illustrated that for the square frame for another example system 300 for transmitting data
Figure.System 300 illustrates spectral content and the processing of forward and backward channel signal according to concept described herein.System 300
Including FWD CHN drivers 302 and high-frequency suppressing circuit 308, both are located at the first end of full duplex single ended serial link 310.
System 300 further includes low frequency (LF) suppression circuit 304 and REV CHN drivers 306, and it is single-ended that both are located at full duplex
Second and opposite end of serial link 310.
As noted, FWD CHN data, it is differentially applied to the input of FWD CHN drivers 302, has phase
To high frequency, frequency band limitation spectral content.Similarly, as noted, REV CHN data, it is differentially applied to REV
The input of CHN drivers 306, has relatively low frequency, frequency band limitation spectral content.In full duplex single ended serial data link
On 310, forward channel signal is reversed channel signal and modulate single-endedly.Thus, as noted, the modulated signal
Spectral content can include at least substantially non-overlapped low frequency bands and high spectrum band.
As noted, LF suppression circuits 304, it can be that HPF, BPF or low frequency eliminate circuit, remove backward channel
Signal is to produce or recover FWD CHN data.Similarly, as noted, HF suppression circuits 308, it can be LPF, BPF
Either high frequency eliminates circuit and removes forward channel signal to produce or recover REVCHN data.
Fig. 4 is according to another embodiment of the present disclosure, it is illustrated that for the square frame for another example system 400 for transmitting data
Figure.The system 100 and 200 of previous description may be in the length of the physical medium for full duplex single ended serial data link
With actual limitation.That is, if the length of serial data link is too long, forward and backward channel signal may deteriorate into nothing
The level that method is recovered., can be real in a daisy chain fashion between communication link both ends in order to effectively extend the length of communication link
Existing one or more repeater (repeater) or transceiver.In addition, repeater is used as by each element configured in ring
Or transceiver, such system can be modified to composition cyclic structure.However, in this example, system 400 uses relaying
Device or transceiver are effectively to extend the length of serial data link.
Especially, system 400 includes forward channel (FC) source 420, transceiver 440 and forward channel (FC) receiver 460.
The system 400 further includes full duplex single ended serial data link 435, and transceiver 440 is coupled in FC sources 420 by it,
And including another full duplex single ended serial data link 455, which is coupled to FC receivers 460 by it.
And FC sources 420 include FC data sources 422, FC transmitters (Tx) 424, FC suppression circuits 430, RC receivers (Rx)
428 and RC data sinks 426.FC data sources 422 produce the data for forward channel, and such as previous discussion, it can be wrapped
Include relatively high speed data and the data of embedded relative low speeds.FC Tx424 form the single-ended signaling of FC data, for warp
It is transmitted by full duplex single ended serial data link 435.FC suppression circuits 430 at least substantially suppress FC data-signals, with
Recover RC data-signals, the RC data signal receptions are from transceiver 440 or via transceiver 440 received from FC receivers 460.
RC Rx 428 recover the RC data and provide it to RC data sinks 426 to be handled.
And FC receivers 460 include RC data sources 470, RC Tx 468, RC suppression circuits 462, FC Rx464 and FC data
Receiver 466.The data that RC data sources 470 produce relative low speeds are used for backward channel.RC Tx 468 modulate the FC with RC data
Signal, for being transmitted via full duplex single ended serial data link 455.RC suppression circuits 462 at least substantially suppress RC numbers
It is believed that number to recover FC data, the FC data receivers are from transceiver 440 or via transceiver 440 received from FC sources 420.FC
Rx 464 recovers the FC data and is provided to FC data sinks 466 to be handled.Such as previous discussion, which can
With the data including relatively high speed data and embedded relative low speeds.
And transceiver 440 includes RC suppression circuits 442, FC Tx/Rx 446, FC data sinks/source 448, FC and suppresses electricity
Road 452, RC Tx/Rx 450 and RC data sinks/source 454.RC suppression circuits 442 at least substantially suppress to come from full duplex
The RC data-signals of single ended serial data link 435, to recover the FC data-signals received from FC sources 420.FC Tx/Rx 446
It can recover FC data and be provided to FC data sinks/source 448 for further handling.In another embodiment,
Or in addition, FC Tx/Rx 446 can amplify and the current FC signals received, for via the single-ended string of full duplex
Row data link 455 is transferred to FC receivers 460.Such as previous discussion, the FC data can include relatively high speed data and
The data of embedded relative low speeds.
FC suppression circuits 452 at least substantially suppress the FC data-signals from full duplex single ended serial data link 455,
To recover the RC data-signals received from FC receivers 460.RC Tx/Rx 450 can recover RC data and be provided to RC
Data sink/source 454 is handled.In another embodiment or in addition, which can amplify and lead to
The RC signals that row receives, for being transferred to FC sources 420 via full duplex single ended serial data link 435.
Fig. 5 is according to another embodiment of the present disclosure, it is illustrated that for the square frame for another example system 500 for transmitting data
Figure.The 100 and 200 previous description of system merely illustrates single forward channel receiver.It should be appreciated that such system
System can include multiple forward channel receivers.For example, such system can be configured to point-to-multi-point system.In this respect,
System 500 is used to respectively receive the forward channel data from FC sources using a pair of of FC receivers.It should be appreciated that system 500 can
To be used to receive the forward channel data from FC sources including more FC receivers.
Especially, system 500 includes FC sources 520, the first FC receivers 540 and the 2nd FC receivers 560.System 500 is more
Further include full duplex single ended serial data link 535, the first and second FC receivers are coupled in FC sources 520 by it
540、560.As shown in figure 5, full duplex single ended serial data link 535 can terminate in terminal device 572.In an embodiment
In, terminal device 572 can be terminating instrument, such as resistor or similar.
And FC sources 520 include FC data sources 522, FC Tx524, FC suppression circuits 530, RCRx528 and RC data sinks
526.FC data sources 522 produce for forward channel data, such as previous discussion, its can include relatively high speed data and
The data of embedded relative low speeds.FC Tx 524 form the single-ended signaling of FC data for via full duplex single ended serial number
It is transmitted according to link 535.FC suppression circuits 530 at least substantially suppress FC data-signals, to recover RC data-signals, the RC
Data signal reception from this first and/or the 2nd FC receiver 540 and 560.RC Rx 528 recover the RC data and are provided
Handled to RC data sinks 526.
And the first FC receivers 540 include RC suppression circuits 542, FC Rx 544, FC data sinks 546, RC data
Source 548 and RC Tx 550.RC suppression circuits 542 at least substantially suppress RC data-signals, to recover FC data-signals, the FC
Data-signal is via full duplex single ended serial data 535 received from FC sources 520.FC Rx 544 recover the FC data and are carried
FC data sinks 546 are supplied to be handled.Such as previous discussion, FC data can include relatively high speed data and embedded
The data of relative low speeds.The data that RC data sources 548 produce relative low speeds are used for backward channel.The RC data of RC Tx 550
The FC signals are modulated, for being transferred to FC sources 520 via full duplex single ended serial data link 535.
And the 2nd FC receivers 560 can similarly or at least substantially be configured with as FC receivers 540.Example
Such as, FC receivers 560 include RC suppression circuits 562, FC Rx 564, FC data sinks 566, RC data sources 570 and RC Tx
566.RC suppression circuits 562 at least substantially suppress RC data-signals, and to recover FC data-signals, the FC data-signals are via complete
Duplexing single ended serial data 535 are received from FC sources 520.FC Rx 564 recover the FC data and are provided to FC data receivers
Device 566 is handled.Such as previous discussion, FC data can include the number of relatively high speed data and embedded relative low speeds
According to.The data that RC data sources 570 produce relative low speeds are used for backward channel.RC Tx 566 modulate the FC signals with the RC data,
For being transferred to FC sources 520 via full duplex single ended serial data link 535.
RC data from the 2nd FC receivers 560 can be together with the RC data from the first FC receivers 540
Time division multiplexing, for being transferred to FC sources 520.For example, FC receivers 540 and FC receivers 560 can respectively be configured to lead
Equipment and slave device, for transmitting RC data using serial data link 535 according to priority.In this respect, no matter when FC connects
RC data will be sent by receiving device 540, it can use serial data link 535, and FC receivers 560 can be permitted via the string
Row data link sends RC data.Other types of anti-collision or time-multiplexed use serial data link can be used to use
In transmission RC data.
On Fig. 6 A to 7, it is understood that associated resistor and the component Name of capacitor are used merely to identify the component
(for example, resistor, capacitor), not apportioning cost to the component identified.For example, the requirement depending on system 600 and 700
(such as frequency of signal etc. in data link), can apply various resistance and capacitance.Fig. 6 A are according to the another of the disclosure
Embodiment, it is illustrated that the block diagram of example high-speed data transmission device and low speed data receiver 600.System 600 is system respectively
An example embodiment in FC sources 420 and 520 in 400 and 500.Especially, system 600 includes forward channel transmitter, it is wrapped
A pair of of resistor R1, a pair of differential transistor M1 and M2 are included (for example, mos field effect transistor
And power supply 602 (MOSFET)).Resistor R1 is respectively coupling between the drain electrode of positive voltage rail and MOSFET M1 and M2.
Serially link provides terminal load to resistor R1.In one embodiment, resistor may be configured to have 50 ohm (50
Resistance Ω).However, the requirement depending on system 600 can apply the resistor of other different values.Power supply 602 is coupling in
Between the source electrode and negative supply voltage rail of MOSFET M1 and M2, it can be ground wire.Forward channel data is differentially applied to
The grid level of FET M1 and M2.As shown, a pair of conductors is coupled to the drain electrode of FET M1 and M2.First conductor (CML+) is connected to
Single ended serial link.Depending on the topology of system 600, second conductor (CML-) can float or with a suitable terminal
Resistance (such as 50 ohm (50 Ω)) terminates at power supply or ground wire together.
System 600 further includes backward channel receiver, it includes resistor RISO, resistor R1, R3, capacitance
Device C1, C3, LPF 604, HPF 606 and hysteresis comparator 608.As indicated, the first conductor (CML of forward channel transmitter
+) also pass through relatively large resistors in series RISOPositive input and the negative input for being connected to LPF604 are loaded with reducing.It is clear that phase
Resistor with sufficiently large impedance value can be included to big resistors in series to reduce the load of node.R1-C1 wave filters
It is connected to the negative terminal of LPF604 and at least substantially extracts the common-mode voltage of forward channel transmitter.Thus, single-ended letter
Number it is transformed to differential signal at the output of LPF604.But it will be understood by those skilled in the art that it can apply other types of
The conversion of single-ended-to-difference signal.LPF 604 also at least substantially eliminates forward channel signal to recover (or generation) reversely
Channel signal.And HPF 606 includes the positive output and negative output and sluggishness that a pair of capacitor C3 is respectively coupling in LPF 604
Between the positive input and negative input of comparator 608.In addition, HPF 606 is coupled in series in sluggish compare including a pair of resistor R3
Between the positive input and negative input of device 608, and suitable for receiving common-mode voltage on a node between resistor R3
Vcm.HPF 606 is suitable at least substantially eliminating the DC components for receiving signal.604 series coupled HPF 606 of LPF cooperations are made
For bandpass filter (BPF).Hysteresis comparator 608 in response to the rising edge for receiving signal for example, by producing logic high signal simultaneously
And logic low signal is produced in response to trailing edge, and generate backchannel data from receiving in signal.In another embodiment, system
600 can include digital processing circuit, its be configured to by one or more digital filtering techniques (such as analog to digital turn
Parallel operation etc.) generation backchannel data.
Fig. 6 B are according to another embodiment of the present disclosure, it is illustrated that example high-speed data transmission device and low speed data receiver
600 block diagram.As indicated, system 600 includes separator pattern configurations, its using two backward channel receivers with recover from
Signal (forward channel signal and the backward channel letter that two different single-ended channels (for example, from CML+ and from CML-) arrive at
Number).System 600 includes backward channel receiver, it includes resistor RISO, resistor R1, R3, capacitor C1, C3, LPF
604A, 604B, HPF 606A, 606B and hysteresis comparator 608A, 608B..As described above, on Fig. 6, forward channel transmitter
The first conductor (CML+) pass through the first relatively large resistors in series RISOIt is coupled to the positive input of the first LPF604A and bears defeated
Enter, to reduce load.In the present embodiment, the second conductor (CML-) passes through the second relatively large resistors in series RISOIt is connected to
2nd LPF 604B, to reduce load.The R1-C1 wave filters of LPF 604B are connected to the positive terminal of LPF 604B, and at least
Substantially extract the common-mode voltage of forward channel transmitter.It is clear that the R1-C1 wave filters of LPF 604B can have and LPF
The different resistance of the R1-C1 wave filters of 604A and/or capacitance.For example, the R1-C1 wave filters of LPF 604A can include
First resistor and/or capacitance, and the R1-C1 wave filters of LPF 604B can include second resistance and/or capacitance.LPF
604B also at least substantially eliminates forward channel signal to recover the reverse letter that (or generation) is provided by the second conductor (CML-)
Road signal.And HPF606B includes a pair of of capacitor C3, it is respectively coupling in the positive output of LPF 604B and negative output and late
Between the positive input and negative input of stagnant comparator 608B.In addition, HPF 606B include a pair of of resistor R3, it is coupled in series in this
Between the positive input and negative input of hysteresis comparator 608B, and suitable for receiving common mode on a node between resistor R3
Voltage Vcm.HPF 606B are suitable at least substantially eliminating the DC components for receiving signal.LPF 604B connect coupling with HPF 606B
Conjunction is used as bandpass filter (BPF).Hysteresis comparator 608B in response to the rising edge generation for receiving signal for example, by patrolling
Collect high RST and produce logic low signal in response to trailing edge, and backchannel data is generated from receiving in signal.
Fig. 7 is according to another embodiment of the present disclosure, it is illustrated that example high speed data receiver and low speed data transmitter 700
Block diagram.System 700 is the FC receivers 460 of system 400 and 540 and 560 example embodiment of system 500.Especially,
System 700 includes the forward channel receiver with HPF 702, and the reverse letter with voltage to electric current (V2I) converter 704
Road transmitter, LPF 706, current mirror 708 and resistor R4.HPF 702 includes an input, it is coupled to serial link
Conductor.HPF is configured at least substantially eliminate the forward channel signal that reverse channel signals are received to produce.
V2I converters 704 receive backchannel data, and produce current signal based on backchannel data.LPF 706
Including resistor R5, it is coupled to the output of V2I converters 704 and the input of current mirror 708.In addition, LPF706 includes
Capacitor C2, it is coupled to the output of V2I converters 704 and negative supply voltage, it can also be in ground potential.LPF 706 is controlled
The switching rate of reverse channel signals so that its spectral content does not significantly interfere with the spectral content of forward channel data.Electric current
Conductor of the output coupling of speculum 708 to serial link.Resistor R4 is coupling in positive voltage rail or internal generation is inclined
(Vbias as shown in Figure 7) is pressed between serial link conductor.Serially link provides terminal load to resistor R4, and can be by
It is configured to the resistance with 50 ohm (50 Ω).In this configuration, current mirror 708 is modulated in response to backchannel data
Forward channel signal.
Fig. 8 is according to another aspect of the present disclosure, it is illustrated that for the square frame for another example system 800 for transmitting data
Figure.In previously described system 100, forward channel low speed data and high-speed data are time-multiplexed, with single-ended via full duplex
Serial data link carries out the transmission in forward direction.Backward channel low speed data is modulated on forward channel signal, with warp
Transmission in inverse direction is carried out by full duplex single ended serial data link.In system 800, forward channel low speed data is modulated
On high-speed forward channel signal, it is modulated in a manner of same with backward channel low speed on high-speed forward channel signal.
Especially, system 800 include high-speed data source 802, forward channel (FWD CHN) low speed data source 804 and reversely
Channel (REV CHN) low speed data receiver 806, all these one end for being all located at full duplex single ended serial data link 840.
High-speed data source 802 can generate parallel high-speed (HS) data (such as video data).In another embodiment, high-speed data source
802 can be the high-speed clock source that half-duplex control channel is established on clock distribution systems (for example, tree).FWD CHN low speed
Data source 804 can generate parallel, forward direction (channel) low speed (FLS) data (for example, control and/or voice data).REV CHN
Low speed data receiver 806 can receive parallel, reverse (channel) low speed data (for example, control data).
System 800 further includes serial link interface 820, it is used for high-speed data source 802, FWDCHN low speed
Data source 804 and REV CHN low speed datas receiver 806 are connected to full duplex single ended serial data link 840.Serial link connects
It is low that mouth 820 includes high-speed serializer 822, FWD CHN SE signal modulators 824, FWD CHN low-speed serials device 826, REV CHN
Fast deserializer 828 and HS CHN suppression circuit 830.High-speed serializer 822 turns the parallel HS data from high-speed data source 822
Change into as serial data, and the single-ended signal for producing forward channel data is used for via full duplex single ended serial data link 840
It is transmitted.
And FWD CHN low-speed serials device 826 becomes the parallel FLS data conversions from FWD CHN low speed datas source 804
Serial data.FWD CHN SE signal modulators 824 modulate forward channel signal with serial FLS data.FWD CHN SE signals
Modulator 824 can include conversion rate control, and backward channel is controlled to modulate forward channel signal in a manner of relatively slow
Spectral content, at least substantially to be isolated from the spectral content of forward channel.Sometimes, FWD low speed datas source 804 can
To generate FLS data in serial fashion.In such a case, it is possible to cancel FWD CHN low-speed serials device 826, and FWD CHN
Low speed data source 804 may be coupled directly to FWD CHN SE signal modulators 824.
HS CHN suppression circuits 830 suppress high-speed forward channel signal, at least substantially to export received from full duplex list
Hold serial, reverse (channel) low speed (RLS) data of the opposite end of serial data link 840.Similar previous embodiment, HS CHN
Suppression circuit can apply to filter out the LPF or BPF of high frequency forward channel signal.Equally similarly, HS CHN suppress electricity
Road 830 can be signal abatement apparatus, it is used at least substantially eliminate forward channel signal.REV CHN low speed deserializer 828
Serial RLS data conversions are become into parallel RLS data, for being handled by REV CHN low speed datas receiver 806.
In the other end of full duplex single ended serial link 840, system 800 includes high speed data receiver 856, FWD CHN
Low speed data receiver 862 and REV CHN low speed datas source 868.High speed data receiver 856 is received and processed from a high speed
Parallel high-speed (HS) data (for example, video data) of data source 802.FWD CHN low speed datas receiver 862 is received and located
Manage the parallel FLS data (for example, control and/or voice data) from FWD CHN low speed datas source 804.REV CHN low speed numbers
Parallel RLS data (for example, control data) are produced according to source 868 for being transferred to REV CHN low speed datas receiver 806.
System 800 further includes serial link interface 850, it is used for high speed data receiver 856, FWD
CHN low speed datas receiver 862 and REV CHN low speed datas source 868 are connected to full duplex single ended serial data link 840.String
It is low that uplink interface 850 includes LS CHN suppression circuits 852, high speed deserializer 854, HS CHN suppression circuits 858, FWD CHN
Fast deserializer 860, REV CHN low-speed serials device 866 and single-ended (SE) signal modulator 864.
LS CHN suppression circuits 852 suppress forward and backward channel low speed data signal (for example, serial FLS and RLS numbers
According to), at least substantially to export serial, the forward channel data of the opposite end received from full duplex single ended serial data link 840
(such as HS data).For example, LS CHN suppression circuits 852 can apply to filter out low frequency forward and backward channel data
HPF or BPF.Serial forward channel data is converted into parallel forward channel data by high speed deserializer 854.Forward channel number
Handled according to high speed data receiver 856 is sent to.
HS CHN suppression circuits 858 suppress high-speed forward channel signal (such as serial HS data), with least substantially defeated
Go out the low-speed forward channel data (such as FLS data) of the opposite end received from full duplex single ended serial data link 840.For example,
HS CHN suppression circuits 858 can apply to filter out the LPF or BPF of high frequency forward channel data.FWD CHN deserializers
Serial FLS data conversions are become parallel FLS data by 860.The FLS data be sent to FWD CHN low speed datas receiver 862 into
Row processing.
Parallel RLS data conversions from REV CHN low speed datas source 868 are become string by REV CHN low-speed serials device 866
Row RLS data.SE signal modulators 864 modulate forward channel signal with the RLS data.SE signal modulators 864 can include
Conversion rate control, controls the spectral content of backward channel, with least to modulate forward channel signal in a manner of relatively slow
Substantially isolated from the spectral content of forward channel.Forward and backward low speed data is modulated onto at a high speed in different times
In forward channel data.Thus, the communication of low-speed forward and backward channel is semiduplex mode.However, the high-speed forward number of channel
According to can be transmitted together with low-speed forward or backchannel data at the same time.It should be understood that other forward channel low speed datas can
With time-multiplexed together with forward channel high-speed data；Thus, there is provided two methods are used to send forward channel low speed data.
Conclusion
Although this theme is described in specific structural features and/or the diction of processing operation, it will be appreciated that, it is attached
Add theme defined in claims necessarily be limited to specific feature or action as described above.On the contrary, as described above
The specific features and acts are next disclosed as the exemplary form for realizing claim.
Claims (20)
1. a kind of system that full-duplex communication is carried out using single ended communication link, it includes：
First LI(link interface), it is configured to generation signal for being transmitted via the single ended communication link, the signal
Including the data encoded in the forward；And
Second LI(link interface), it is configured to receive the signal from first LI(link interface) via the single ended communication link,
And the signal is modulated with the coded data in backward channel so that the signal includes the forward channel data and institute at the same time
State backchannel data,
Including the data encoded in the forward the signal voltage level according to the backchannel data
Voltage level is modulated.
2. system as claimed in claim 1, wherein, the forward channel data includes relatively high speed serial data and relative low speeds
Serial data.
3. system as claimed in claim 2, wherein, the relatively high speed serial data includes video data, and described opposite
Low speed serial data includes control data.
4. system as claimed in claim 2, wherein, the backchannel data includes relative low speeds serial data.
5. system as claimed in claim 2, wherein, first LI(link interface) further includes the first serializer, wherein
First serializer is configured to generate the relatively high speed serial data from opposite high-speed parallel data.
6. system as claimed in claim 5, wherein, first LI(link interface) further includes the second serializer, wherein
Second serializer is configured to generate the relative low speeds serial data from opposite low-speed parallel data.
7. system as claimed in claim 1, first LI(link interface) further includes forward channel suppression circuit, wherein
The forward channel suppression circuit is configured at least suppress the forward channel data part of the signal, with least export received from
The backchannel data part of the signal of the communication link.
8. system as claimed in claim 7, wherein, the forward channel data is transmitted in the first frequency range, and described
Backchannel data is transmitted in second frequency scope, and the first frequency scope is higher than the second frequency scope, and its
In, the forward channel suppression circuit includes the low-pass filter for filtering out the signal transmitted in the first frequency scope.
9. system as claimed in claim 1, further including single ended communication link, it is used for first LI(link interface)
Coupled with second LI(link interface).
10. a kind of device, it includes：
Transmitter, it is configured to generation signal for being transmitted via single ended communication link, before the signal includes at the same time
To channel data and backchannel data, the forward channel data is encoded on forward channels by the transmitter, and
The backchannel data is encoded on the reverse channel by receiver, wherein the receiver, which is configured to modulation, comes from the hair
The signal of emitter, including the signal of the data encoded in the forward voltage level according to the backward channel
The voltage levels of data is modulated；And
Forward channel suppression circuit, it is configured to the forward channel data part at least suppressing the signal, is connect with least exporting
Receive the backchannel data part of the signal from the communication link.
11. device as claimed in claim 10, wherein, the forward channel data includes relatively high speed serial data, and institute
Stating backchannel data includes relative low speeds serial data.
12. device as claimed in claim 11, wherein, the relatively high speed serial data includes video data, and the phase
Include control data to low speed serial data.
13. device as claimed in claim 10, wherein, the backchannel data includes relative low speeds serial data.
14. device as claimed in claim 10, wherein, the transmitter further includes the first serializer, wherein described
First serializer is configured to generate the relatively high speed serial data from opposite high-speed parallel data.
15. device as claimed in claim 14, wherein, the transmitter further includes the second serializer, wherein described
Second serializer is configured to generate the relative low speeds serial data from opposite low-speed parallel data.
16. device as claimed in claim 10, wherein, the forward channel data is transmitted in the first frequency range, and institute
Backchannel data to be stated to transmit in second frequency scope, the first frequency scope is higher than the second frequency scope, and
Wherein, the forward channel suppression circuit includes the low-pass filter for filtering out the signal transmitted in the first frequency scope.
17. a kind of device, it includes：
Receiver, it is configured to receive the signal via single ended communication link transmission, and the signal includes forward channel number at the same time
According to and backchannel data, the forward channel data encoded in the forward by transmitter, and the backward channel
Data are encoded by the receiver in backward channel, and the receiver is configured to the letter of the modulation from the transmitter
Number, including the signal of the data encoded in the forward voltage level according to the voltage of backchannel data electricity
Put down to modulate；And
Backward channel suppression circuit, it is configured to the backchannel data part at least suppressing the signal, is connect with least exporting
Receive the forward channel data part of the signal from the communication link.
18. device as claimed in claim 17, wherein, the forward channel data includes relatively high speed serial data, and institute
Stating backchannel data includes relative low speeds serial data.
19. device as claimed in claim 18, wherein, the relatively high speed serial data includes video data, and the phase
Include control data to low speed serial data.
20. device as claimed in claim 17, wherein, the forward channel data is transmitted in the first frequency range, and institute
Backchannel data to be stated to transmit in second frequency scope, the first frequency scope is higher than the second frequency scope, and
Wherein, the backward channel suppression circuit includes the high-pass filter for filtering out the signal transmitted in the second frequency scope.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/271,628 US8923170B2 (en) | 2009-08-21 | 2011-10-12 | Full-duplex single-ended serial link communication system |
| US13/271,628 | 2011-10-12 |
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| US10630314B1 (en) * | 2019-06-18 | 2020-04-21 | Nxp B.V. | Method and system for asynchronous serialization of multiple serial communication signals |
| CN115296689B (en) * | 2022-08-08 | 2023-11-03 | 慷智集成电路(上海)有限公司 | Full duplex transmitting and receiving circuit, serial circuit chip, electronic equipment and vehicle |
| CN115296783B (en) * | 2022-08-08 | 2023-07-21 | 慷智集成电路(上海)有限公司 | Full duplex transmitting and receiving circuit, deserializing circuit chip, electronic equipment and vehicle |
| CN115314069B (en) * | 2022-08-08 | 2023-10-13 | 慷智集成电路(上海)有限公司 | Full duplex transmitting and receiving circuit, deserializing circuit chip, electronic equipment and vehicle |
| CN117040562B (en) * | 2023-10-08 | 2023-12-26 | 慷智集成电路(上海)有限公司 | Full duplex transmitting and receiving circuit, serializer, deserializer and vehicle |
| CN118100988B (en) * | 2024-04-25 | 2024-07-02 | 成都电科星拓科技有限公司 | Method for reducing forward crosstalk in communication and forward synthesis circuit |
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| WO2008056933A1 (en) * | 2006-11-09 | 2008-05-15 | Linx Telecom Co., Ltd. | Method for transmitting video signal in half-duplex and voice signal and data signal in full-duplex and modem for transmitting the signals using the method |
| CN101997668A (en) * | 2009-08-21 | 2011-03-30 | 美士美积体产品公司 | System and method for transferring data over full-duplex differential serial link |
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| US6226296B1 (en) * | 1997-01-16 | 2001-05-01 | Physical Optics Corporation | Metropolitan area network switching system and method of operation thereof |
| WO2008056933A1 (en) * | 2006-11-09 | 2008-05-15 | Linx Telecom Co., Ltd. | Method for transmitting video signal in half-duplex and voice signal and data signal in full-duplex and modem for transmitting the signals using the method |
| CN101997668A (en) * | 2009-08-21 | 2011-03-30 | 美士美积体产品公司 | System and method for transferring data over full-duplex differential serial link |
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