CN103151365B - A kind of cmos image sensor and manufacture method thereof - Google Patents
A kind of cmos image sensor and manufacture method thereof Download PDFInfo
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- CN103151365B CN103151365B CN201310104808.XA CN201310104808A CN103151365B CN 103151365 B CN103151365 B CN 103151365B CN 201310104808 A CN201310104808 A CN 201310104808A CN 103151365 B CN103151365 B CN 103151365B
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Abstract
The invention discloses a kind of cmos image sensor and manufacture method thereof, wherein, this sensor comprises: substrate and be positioned at the pixel cell of substrate top; Described pixel cell comprises: negative metal-oxide semiconductor (MOS) NMOS pipe and light sensitive diode; The negative N-type implanted layer of photosensitive area of the source electrode of described NMOS pipe and drain electrode and described light sensitive diode, described NMOS pipe is connected as a single entity by positive P type implanted layer with light sensitive diode, and N-type implanted layer formation PN junction in described P type implanted layer and described NMOS pipe and light sensitive diode; Described pixel cell is connected as a single entity by PN junction and the P type buried layer and the described substrate that are arranged on base upper portion. The disclosed cmos image sensor of the application of the invention has improved highly sensitive and image quality, has reduced dark current.
Description
Technical field
The present invention relates to field of semiconductor manufacture, relate in particular to a kind of cmos image sensor and manufacture method thereof.
Background technology
The extensive use of modern imageing sensor, orders about CMOS (ComplementaryMetalOxideSemiconductor, complementary metal oxide semiconductors (CMOS)) imageing sensor is to more and more less size development. Along with pixelDwindling of size, with it full trap electronics, the dark current of closely-related light sensitive diode, crosstalk, the saturated performance such as overflowParameter is faced with stern challenge. Therefore, more effective dot structure and manufacturing process become affects high-quality pixel passOne of key factor.
Cmos image sensor pel array of the prior art is to be become by pixel elementary unit groups, and pixel cell is by manyIndividual transistor and a photodiode form. As shown in Figure 1, in figure, provide the pixel unit array of one group of 2*2, cutd openThe corresponding sectional view of upper thread A-A ' as shown in Figure 2. In prior art, cmos image sensor mainly comprises: substrate 11,Described substrate 11 is provided with four pixel cells 12～15, and each pixel cell is respectively by light sensitive diode (in Fig. 1121,131,141,151 is light sensitive diode) and four NMOS (Negativechannel-Metal-Oxide-Semiconductor, negative metal-oxide semiconductor (MOS)) pipe composition (122-125,132-135,142-in Fig. 1145,152-155 is NMOS pipe), between pixel cell and the isolation of the device of pixel cell inside all adopt shallow slotIsolation 16 (STI).
At least there is following defect in the cmos image sensor dot structure of the employing shallow-trench isolation (STI) of prior art:
In the time that the light sensitive diode in pixel cell resets, due to the effect of electric field, the depletion region of light sensitive diode will expandBe dissipated to STI interface and produce a large amount of dark current; Dot structure of the prior art also will cause the effective area of light sensitive diodeOr electric capacity reduction, cause full trap electronics, the isoparametric deterioration of sensitivity. In addition, STI material is SiO2, with its as everyDuring from structure, by occupying the Si material of certain space, for adjacent pixel cell, limit to a certain extent sensitizationDiode maximizes, and has limited existing imageing sensor to more high performance development.
Summary of the invention
The object of this invention is to provide a kind of cmos image sensor and manufacture method thereof, improved transducer sensitivity highAnd image quality, reduce dark current.
A kind of cmos image sensor, comprising: substrate and be positioned at the pixel cell of substrate top;
Described pixel cell comprises: negative metal-oxide semiconductor (MOS) NMOS pipe and light sensitive diode; Described NMOS pipeSource electrode and the negative N-type implanted layer of photosensitive area of drain electrode and described light sensitive diode, described NMOS pipe and light sensitive diodeBe connected as a single entity by positive P type implanted layer, and N-type in described P type implanted layer and described NMOS pipe and light sensitive diodeImplanted layer forms PN junction;
Described pixel cell is connected as a single entity by PN junction and the P type buried layer and the described substrate that are arranged on base upper portion.
A manufacture method for cmos image sensor, the method comprises:
P type buried layer is set in substrate, and on this P type buried layer, pixel cell is set;
Wherein, the step that described pixel cell is set comprises: negative metal-oxide semiconductor (MOS) NMOS pipe and sensitization are setDiode; Pass through to inject negative N-type electronics at the source electrode of described NMOS pipe and the photosensitive area of drain electrode and described light sensitive diodeForm N-type implanted layer, and between described NMOS pipe and light sensitive diode, inject and can form PN junction with described N-type implanted layerPositive P type electronics;
Described pixel cell is connected as a single entity by PN junction and P type buried layer and described substrate.
As seen from the above technical solution provided by the invention, by having adopted the isolation junction of PN junction as pixel cellStructure, thus avoid light sensitive diode depletion region affected by STI boundary defect and the dark current that produces; Secondly owing to not havingThereby STI restriction dimensionally makes light sensitive diode electric capacity become the full trap electronics of large promotion feeling optical diode.
Brief description of the drawings
In order to be illustrated more clearly in the technical scheme of the embodiment of the present invention, below by required use during embodiment is describedAccompanying drawing is briefly described, and apparently, the accompanying drawing in the following describes is only some embodiments of the present invention, forThose of ordinary skill in the art, is not paying under the prerequisite of creative work, can also obtain according to these accompanying drawingsOther accompanying drawings.
The schematic diagram of cmos image sensor in the prior art that Fig. 1 provides for background technology of the present invention;
The sectional view of cmos image sensor in the prior art that Fig. 2 provides for background technology of the present invention;
The sectional view of a kind of cmos image sensor that Fig. 3 provides for the embodiment of the present invention one;
The schematic diagram of a kind of masking layer structure that Fig. 4 provides for the embodiment of the present invention one;
The flow chart of a kind of cmos image sensor manufacture method that Fig. 5 provides for the embodiment of the present invention two.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clearly and completelyDescribe, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiment. Based onEmbodiments of the invention, those of ordinary skill in the art are not making obtain under creative work prerequisite every otherEmbodiment, belongs to protection scope of the present invention.
Embodiment mono-
The present embodiment is introduced structure and the composition thereof of cmos sensor as an example of Fig. 3-Fig. 4 example. For the ease of understanding, this enforcementThe mode that is 2*2 with pixel cell of example arranges that (the user according to the actual requirements quantity to pixel cell and arrangement mode doesCorresponding adjustment), the Fig. 1 in its top view structure and background technology is similar, and the present embodiment is according to Fig. 1 section line A-A 'Mode cmos sensor of the present invention is done to cross section, as shown in Figure 3, hatching is expressed as B-B ' to sectional view.
As shown in Figure 3, substrate 31 is the P type epitaxial layer of thickness 2～8 μ m, and its doping content is 1E15～1E16/cm3，Be placed in sensor base. In substrate 31, be also provided with the collector series resistance buried layer 37 for reducing pixel cell; ExampleProperty, can adopt high-energy P type Implantation to form buried layer 37; Described P type ion can be boron ion, and its concentration canThink 2E16～2E18/cm3, energy can be 1000-2000KeV. Above buried layer 37, be provided with four pixel listsUnit (32～35, its structure can with reference to figure 1), each pixel cell generally comprises a light sensitive diode, and (Fig. 3 only lists pictureLight sensitive diode 321 in element unit 32, the light sensitive diode 331 in pixel cell 33) and four NMOS pipe (Fig. 3Only list a NMOS pipe 322 in pixel cell 32), concrete: the grid of each NMOS pipe is polysilicon, sourceHeavily doped N (feminine gender) type that the is implanted layer of the utmost point and drain electrode, the implantation concentration of N-type implanted layer can be 1E18～1E19/cm3, inject junction depth and can be 0.1～0.3 μ m; The photosensitive area of light sensitive diode is lightly doped N-type implanted layer, itsImplantation concentration can be 1E16～1E18/cm3, injecting junction depth can be 0.3～0.8 μ m. Between pixel cell and pixelLight sensitive diode in unit and NMOS pipe are isolated by heavily doped P (positive) type implanted layer 36, and P type injectsThe implantation concentration of layer can be 2E18～1E20/cm3, it injects junction depth can be 0.05～0.8 μ m.
Further, also can in substrate 31, also be provided with for shelter between described pixel cell and pixel cell in heavily dopedThe masking layer 38 of assorted P type implanted layer, as shown in Figure 4, for ease of understanding structure and the position pair of masking layer 38 in sensorIt highlights. Exemplary, can pass through the semiconductor fabrication process such as gluing, photoetching or development and form masking layer38, described masking layer 38 materials can be photoresist, more than its thickness is generally 5 μ m; Again by injection technology describedIn substrate with masking layer 38, form heavy doping P type implanted layer, it should be noted that, described heavy doping P type implanted layer needsWill carry out continuously the p type impurity injection technology of 4～8 times, Implantation Energy scope is 5-1000KeV, and implantation dosage scope is2E13～1E15/cm2, by described injection technology repeatedly, described heavy doping P type implanted layer is connected with described masking layer 38Together.
Further, described in front, the photosensitive area of the source electrode of NMOS pipe and drain electrode and described light sensitive diode is that N-type is injectedLayer, and separation layer is P type implanted layer; Both combine and can form PN junction; Described pixel cell is covered by PN junction and P typeBuried regions and described substrate are connected as a single entity.
In the present embodiment, using PN junction as isolation structure, avoid light sensitive diode depletion region to be subject to STI boundary defect affect and produceRaw dark current, thereby and owing to not having STI restriction dimensionally to make light sensitive diode electric capacity become large sensitization two utmost points that promoteThe full trap electronics of pipe. On the other hand, because pixel cell in the present embodiment has adopted high concentration p type impurity to light sensitive diodeCarry out overall isolation, thereby effectively avoided crosstalking between adjacent pixel unit and electronics when light sensitive diode is saturated overflowsThe generation going out.
Those skilled in the art can be well understood to, for convenience and simplicity of description, and only with above-mentioned each function mouldThe division of piece is illustrated, and in practical application, can as required above-mentioned functions be distributed by different function mouldsPiece completes, and is divided into different functional modules by the internal structure of device, described above all or part of to completeFunction.
Embodiment bis-
The flow chart of a kind of cmos image sensor manufacture method providing for the present embodiment as shown in Figure 5. As Fig. 5 instituteShow, mainly comprise the steps:
Step 51, P type buried layer is set in substrate.
Described P type buried layer is arranged on base upper portion, for reducing the collector series resistance of pixel cell. Exemplary,Can adopt high-energy P type Implantation to form buried layer 67; Described P type ion can be boron ion, and its concentration can be2E16～2E18/cm3, energy can be 1000-2000KeV.
Step 52, in described substrate, masking layer is set.
Described masking layer is positioned at the top of buried layer, for shelter between pixel cell and pixel cell in heavy doping P type noteEnter layer. Exemplary, the semiconductor fabrication process such as gluing, photoetching or development be can pass through and masking layer, described masking layer formedMaterial can be photoresist, more than its thickness is generally 5 μ m; Again by injection technology at the described base with masking layer 58, form heavy doping P type implanted layer at the end, it should be noted that, described heavy doping P type implanted layer need to carry out 4～8 times continuouslyP type impurity injection technology, Implantation Energy scope is 5-1000KeV, implantation dosage scope is 2E13～1E15/cm2，By described injection technology repeatedly, described heavy doping P type implanted layer and described masking layer are linked together.
Step 53, on described masking layer, pixel cell is set.
Each pixel cell generally comprises a light sensitive diode and four NMOS pipe. Wherein, the grid of each NMOS pipeVery polysilicon, injection heavily doped N (feminine gender) the type electronics that passes through of its source electrode and drain electrode forms N implanted layer, N-type noteThe implantation concentration that enters layer can be 1E18～1E19/cm3, inject junction depth and can be 0.1～0.3 μ m; The sense of light sensitive diodeLight district can adopt similar injection technology to inject lightly doped N-type electronics and form N-type implanted layer, and its implantation concentration can be1E16～1E18/cm3, injecting junction depth can be 0.3～0.8 μ m. In addition, for improved transducer sensitivity high and becomeImage quality and reduction dark current can inject heavily doped P (positive) type electronics and form between NMOS pipe and light sensitive diodeP type implanted layer, the implantation concentration of described type implanted layer can be 2E18～1E20/cm3, its injection junction depth can be0.05～0.8 μ m. It is emphasized that the N-type implanted layer in described P type implanted layer and light sensitive diode and NMOS pipe canForm the PN junction of unilateal conduction, described pixel cell is by PN junction and be arranged on P type buried layer and the described base of base upper portionThe end, is connected as a single entity, the dark current producing for avoiding light sensitive diode depletion region affected by STI boundary defect and lifting sensitizationThe full trap electronics of diode.
Further, on described P type masking layer, multiple pixel cells also can be set, between adjacent pixel unit, can inject heavily dopedAssorted P type electronics forms P type implanted layer, avoids crosstalking and electricity when light sensitive diode is saturated between adjacent pixel unitThe generation that son overflows.
In addition, in the present embodiment, the structure of cmos image sensor can reference example one and corresponding accompanying drawing, no longer superfluousState.
The embodiment of the present invention, by adopting PN junction as isolation structure, has avoided light sensitive diode depletion region to be subject to STI boundary defectThe dark current affecting and produce, thus and promote owing to not having STI restriction dimensionally to make light sensitive diode electric capacity become largeThe full trap electronics of light sensitive diode. On the other hand, because pixel cell in the present embodiment has adopted high concentration p type impurity to senseOptical diode has carried out overall isolation, thereby has effectively avoided crosstalking between adjacent pixel unit and when light sensitive diode is saturatedThe electronics generation of overflowing.
The above, be only preferably detailed description of the invention of the present invention, but protection scope of the present invention is not limited to this,Anyly be familiar with in technical scope that those skilled in the art disclose in the present invention the variation that can expect easily or replaceChange, within all should being encompassed in protection scope of the present invention. What therefore, protection scope of the present invention should be with claimsProtection domain is as the criterion.
Claims (9)
1. a cmos image sensor, is characterized in that, comprising: substrate and be positioned at the pixel cell of substrate top;
Described pixel cell comprises: NMOS pipe and light sensitive diode; The source electrode of described NMOS pipe and drain electrode and described senseThe photosensitive area of optical diode is N-type implanted layer, and described NMOS pipe is connected as a single entity by P type implanted layer with light sensitive diode,And the N-type implanted layer in described P type implanted layer and described NMOS pipe and light sensitive diode forms PN junction;
Described pixel cell is connected as a single entity by PN junction and the P type buried layer and the described substrate that are arranged on base upper portion;
In described substrate, be provided for sheltering the masking layer of described P type implanted layer, and this masking layer and described P type implanted layerBe connected as a single entity.
2. sensor according to claim 1, is characterized in that, also comprises: in described substrate, several are setPixel cell, is connected by P type implanted layer between adjacent pixel unit.
3. sensor according to claim 1, is characterized in that, described substrate is the P type extension of thickness 2～8 μ mLayer, its doping content is 1E15～1E16/cm3。
4. sensor according to claim 1, is characterized in that, the source electrode of described NMOS pipe and the N-type of drain electrode noteThe implantation concentration that enters layer is 1E18～1E19/cm3, injecting junction depth is 0.1～0.3 μ m.
5. sensor according to claim 1, is characterized in that, the N-type of the photosensitive area of described light sensitive diode is injectedThe implantation concentration of layer is 1E16～1E18/cm3, injecting junction depth is 0.3～0.8 μ m.
6. sensor according to claim 1, is characterized in that, the implantation concentration of described P type implanted layer is2E18～1E20/cm3, it injects junction depth is 0.05～0.8 μ m.
7. sensor according to claim 1, is characterized in that, the implantation concentration of described P type buried layer is2E16～2E18/cm3, it injects junction depth is 0.5～1.0 μ m.
8. a manufacture method for cmos image sensor, is characterized in that, the method comprises:
P type buried layer is set in substrate, and on this P type buried layer, pixel cell is set;
Wherein, the step that described pixel cell is set comprises: NMOS pipe and light sensitive diode are set; At described NMOSThe photosensitive area of the source electrode of pipe and drain electrode and described light sensitive diode forms N-type implanted layer by injecting N-type electronics, and describedBetween NMOS pipe and light sensitive diode, inject the P type implanted layer that can form with described N-type implanted layer PN junction;
Described pixel cell is connected as a single entity by PN junction and P type buried layer and described substrate;
Between described P type buried layer and pixel cell, be also provided with the masking layer for sheltering described P type implanted layer, and this is shelteredLayer is connected as a single entity with described P type implanted layer.
9. method according to claim 8, is characterized in that, the method also comprises: if arrange in described substrateA dry pixel cell, forms P type implanted layer connection adjacent pixel unit by injecting P type electronics.
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| CN105514129B (en) * | 2014-09-25 | 2018-10-09 | 中芯国际集成电路制造(上海)有限公司 | A kind of image sensor apparatus and its manufacturing method |
| CN104362163B (en) * | 2014-11-12 | 2017-09-29 | 上海集成电路研发中心有限公司 | The pixel structure and its manufacture method of CMOS |
| WO2023108441A1 (en) * | 2021-12-14 | 2023-06-22 | Huawei Technologies Co., Ltd. | Imaging device, electronic apparatus, and method for manufacturing an imaging device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101064280A (en) * | 2006-04-28 | 2007-10-31 | 富士通株式会社 | Method of manufacturing semiconductor device |
| CN102916027A (en) * | 2012-11-12 | 2013-02-06 | 豪威科技(上海)有限公司 | CMOS (Complementary Metal-Oxide-Semiconductor Transistor) image sensor and forming method thereof |
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| CN101064280A (en) * | 2006-04-28 | 2007-10-31 | 富士通株式会社 | Method of manufacturing semiconductor device |
| CN102916027A (en) * | 2012-11-12 | 2013-02-06 | 豪威科技(上海)有限公司 | CMOS (Complementary Metal-Oxide-Semiconductor Transistor) image sensor and forming method thereof |
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