CN103151265A - Manufacturing method of silicon (Si) substrate upper side grid grapheme field effect tube based on copper (Cu) film annealing - Google Patents
Manufacturing method of silicon (Si) substrate upper side grid grapheme field effect tube based on copper (Cu) film annealing Download PDFInfo
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- CN103151265A CN103151265A CN2013100396926A CN201310039692A CN103151265A CN 103151265 A CN103151265 A CN 103151265A CN 2013100396926 A CN2013100396926 A CN 2013100396926A CN 201310039692 A CN201310039692 A CN 201310039692A CN 103151265 A CN103151265 A CN 103151265A
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Abstract
The invention relates to a manufacturing method of a silicon (Si) substrate upper side grid grapheme field effect tube based on copper (Cu) film annealing, and mainly resolves the problems that a grapheme field effect tube manufactured in the prior art is severe in carrier scattering and low in migration rate. The manufacturing method includes that (1) a carbonization zone is grown in a Si substrate to serve as transition; (2) 3C-SiC heteroepitaxial growth is carried out under 1100 DEG C-1250 DEG C; (3) SiO2 is deposited on the surface of 3C-SiC; (4) the 3C-SiC reacts with CCl4 in a gaseous state under 800-1000 DEG C to produce a carbon film; (5) a carbon film sample wafer is placed in a moderation hydrofluoric acid solution to remove the SiO2 out of a window; (6) the carbon film sample wafer with the SiO2 removed is placed on a Cu film, and the carbon film sample wafer and the Cu film are then placed in Ar gas at the same time, grapheme is generated under the temperature of 800-1000 DEG C through annealing for 10-25 minutes, and then the Cu film is taken off; and (7) a contact electrode is deposited on the surface of the grapheme, and metallic contact is formed through photoetching. The grapheme field effect tube prepared in the method has high electronic mobility, and effectively avoids carrier scattering effects.
Description
Technical field
The invention belongs to microelectronics technology, relate to the field effect transistor preparation method of semiconductor film material, specifically be based on the Si substrate upside grid graphene field effect pipe making method of Cu film annealing, can be used in high frequency and high speed circuit.
Technical background
Two scientist An Delie Jim of Univ Manchester UK and the Ke Siteyanuowo Luo Fu that disappears found graphite flake in 2004.Since this single-layer membrane structure that is comprised of the two-dimentional honeycomb lattice of embedding carbon atom was found, as the replacement material of following nanoelectronics, Graphene had attracted many scholars to drop into the research in this field.Graphene becomes due to character such as its remarkable mechanics, calorifics, electricity, optics one of the semiconductor candidate material that replaces Si of being placed high hopes.The Potential feasibility of producing the wafer level graphene film together with the planar technique of device make graphene device technique can with the CMOS process compatible, it is better than carbon nano tube device in this respect.
IBM declares in the research center to work out fastest in the world graphene field effect transistor, and operating frequency reaches 26GHz, and this is the Graphene the fastest transistorized operating frequency that measures so far.IBM represents that grid is made by the Silicon-On-Insulator wafer at the Graphene transistor at top, and very high operating frequency is all arranged under different grid voltages and length.Result of study shows that the response curve of conventional transistor is followed in the decline of Graphene transistor current gain equally along with the increasing of frequency.And square being inversely proportional to of higher cutoff frequency and grid length reaches 26GHz in 150nm grid are long.
Recently the document about the device of Graphene emerges in multitude, and about Graphene, a lot of reports is being arranged aspect electric capacity, solar cell, transparency electrode.Being on the scene effect transistor FET application facet also has a lot of reports, as back of the body grid graphene field effect transistor BG-GFET, top grid graphene field effect transistor TG-GFET etc.They have certain shortcoming, but this can not affect the application prospect of Graphene being on the scene effect pipe aspect.When prior art is made graphene field effect transistor GFET, top gate medium can be introduced more scattering source, cause the front and back scattering, in etching process, graphene film also is easy to be damaged, and makes the mobility of top grid graphene field effect transistor significantly descend simultaneously.
Summary of the invention
The object of the invention is to for above-mentioned the deficiencies in the prior art, a kind of Si substrate upside grid graphene field effect pipe making method based on the annealing of Cu film is proposed, to avoid the front and back scattering effect of top grid graphene field effect pipe, optionally growing graphene forms side grid structure, exempt subsequent etching technique to the damage of Graphene, thereby improve the electron mobility of field effect transistor.
For achieving the above object, preparation method of the present invention comprises the following steps:
(1) standard cleaning is carried out to remove surface contaminant in the Si substrate base of 4-12 inch;
(2) the Si substrate base after cleaning is put into CVD system response chamber, reative cell is vacuumized reach 10
-7The mbar rank is then at H
2In the situation of protection, make reative cell progressively be warming up to 900 ℃-1100 ℃ of carburizing temperatures, pass into the C that flow is 40ml/min
3H
8Gas 3-8min, growth one deck carburization zone;
(3) reative cell is warming up to 1100 ℃-1250 ℃ of the growth temperatures of 3C-SiC, then passes into C
3H
8And SiH
4, carrying out the 3C-SiC thin film heterogeneity epitaxial growth, growth time is 35-70min; Then at H
2Progressively be cooled to room temperature under protection, complete the growth of 3C-SiC film;
(4) utilize the thick SiO of plasma chemical vapor deposition PECVD deposit one deck 0.5-1 μ m on growth good 3C-SiC print surface
2Mask;
(5) at SiO
2On mask, photoetching forms the window of side grid, source electrode, drain electrode and the conducting channel figure of side gate field-effect transistor;
(6) print after windowing is placed in quartz ampoule, and quartz ampoule is heated to 800-1000 ℃;
(7) to CCl is housed
4The there-necked flask of liquid is heated to 60-80 ℃, then passes into Ar gas in there-necked flask, utilizes Ar gas to carry CCl
4Steam enters in quartz ampoule, makes CCl
43C-SiC reaction 30-120min with exposed generates carbon film;
(8) print with the carbon film that generates is placed in buffered hydrofluoric acid solution to remove the SiO outside window
2
(9) will remove SiO
2After the carbon film print be placed on the Cu film, and to be placed in together Ar gas be annealing 10-25 minute under 800-1000 ℃ in temperature, makes carbon film reconstitute Graphene at the window's position, forms side grid, source electrode, drain electrode and the conducting channel of side grid graphene field effect pipe;
(10) the Cu film is taken away from the Graphene print that forms side grid, source electrode, drain electrode and conducting channel;
(11) the method depositing metal Pd of deposited by electron beam evaporation and metal A u on the Graphene print are as the contact layer of side grid graphene field effect pipe;
(12) the photoetching metal contact layer forms side grid, source electrode, the drain metal electrode of side grid graphene field effect pipe;
(13) sample that uses acetone soln to soak to make took out post-drying to remove residual PMMA in 10 minutes, obtained side grid graphene field effect pipe.
The present invention compared with prior art has following advantage:
1. the field effect transistor of manufacturing of the present invention does not have top gate medium, can not introduce more scattering source, avoids the scattering effect of field effect transistor charge carrier, and can prevent gate dielectric breakdown and hysteresis that gate medium causes, has improved performance of devices.
2. the present invention is due to the Graphene of optionally having grown, so need not the Graphene etching when making device on Graphene, and the electron mobility in Graphene can not reduce, and has guaranteed the device performance of making.
The present invention due to growth during 3C-SiC first on the Si substrate growth one deck carburization zone as transition, and then growth 3C-SiC, thereby the 3C-SiC quality of growth is high.
4. the present invention is owing to utilizing Cu film annealing, thereby the easier reconstruct of the carbon film that generates forms continuity Graphene preferably, can be used for making high performance microelectronic component or integrated circuit.
But the present invention due to the 3C-SiC heteroepitaxial growth on Si substrate disk, thereby with low cost with the Graphene of the method growth.
6. the Method and process of the present invention's use is simple, and energy savings is safe.
Description of drawings
Fig. 1 is the device schematic diagram that the present invention prepares Graphene;
Fig. 2 is the flow chart of side grid graphene field effect pipe manufacturer technique of the present invention;
Fig. 3 is the domain schematic diagram of side grid graphene field effect pipe of the present invention.
Embodiment
With reference to Fig. 1, the present invention prepares the equipment of Graphene mainly by three-way valve 3, there-necked flask 8, and water-bath 9, quartz ampoule 5, resistance furnace 6 forms; Three-way valve 3 is connected with quartz ampoule 5 by first passage 1, be connected with the left side mouth of there-necked flask 8 by second channel 2, and the right side mouth of there-necked flask 8 is connected with quartz ampoule 5, and CCl is housed in there-necked flask
4Liquid, and it is placed in water-bath 9, and quartz ampoule 5 is placed in resistance furnace 6.Three-way valve 3 is provided with air inlet 4, is used for passing into gas in equipment.The present invention has also used etching system in preparation process in addition, electron beam evaporation system, the plasma enhanced CVD PECVD of system, the ripe microelectronic technique systems such as reactive ion etching RIE system.
With reference to Fig. 2 and Fig. 3, manufacture method of the present invention provides following three kinds of embodiment.
Embodiment 1
Step 1: remove the sample surfaces pollutant, as Fig. 2 (a).
The Si substrate bases of 4 inches are carried out cleaning surfaces process, namely first use NH
4OH+H
2O
2Reagent soaked sample 10 minutes, took out post-drying, to remove the sample surfaces organic remains; Re-use HCl+H
2O
2Reagent soaked sample 10 minutes, took out post-drying, to remove ionic contamination.
Step 2: growth carburization zone.
The Si substrate base is put into CVD system response chamber, reative cell is vacuumized reach 10
-7The mbar rank; Again at H
2In the situation of protection, reaction chamber temperature is risen to 900 ℃ of carburizing temperatures; Then pass into to reative cell the C that flow is 40ml/min
3H
8, at Si Grown one deck carburization zone, growth time is 8min.
Step 3: growth 3C-SiC film on carburization zone, as Fig. 2 (b).
Reaction chamber temperature is risen to rapidly 1100 ℃ of growth temperatures, then pass into the SiH that flow is respectively 15ml/min and 30ml/min
4And C
3H
8, carrying out the 3C-SiC thin film heterogeneity epitaxial growth, growth time is 70min; Then at H
2Progressively be cooled to room temperature under protection, complete the growth of 3C-SiC film.
Step 4: at the good 3C-SiC print surface deposition one deck SiO of growth
2, as Fig. 2 (c).
(4.1) the good 3C-SiC print of growing is put into the PECVD system, and internal system pressure is adjusted to 3.0Pa, and radio-frequency power is adjusted to 100W, and temperature is adjusted to 150 ℃;
(4.2) pass into respectively the SiH that flow velocity is 30sccm in the PECVD system
4, flow velocity is the N of 60sccm
2O and flow velocity are the N of 200sccm
2, continue to pass into 30min, make SiH
4And N
2The O reaction is at 3C-SiC print surface deposition one deck 0.5 thick SiO of μ m
2
Step 5: at SiO
2Carve graphical window on layer, as Fig. 2 (d).
(5.1) at SiO
2On layer, spin coating one deck concentration is 3% acrylic resin PMMA;
(5.2) make reticle according to the figure of side gate field-effect transistor as shown in Figure 3, with electron beam, PMMA is exposed, figure on reticle is transferred to SiO
2On mask;
(5.3) corrode SiO with buffered hydrofluoric acid
2, expose 3C-SiC, at side grid, source, leakage and the raceway groove position formation window of side grid graphene field effect pipe.
Step 6: the quartz ampoule of packing into of the print after windowing, and exhaust heating.
(6.1) print after windowing is packed in quartz ampoule 5, quartz ampoule is placed in the thermal site that is subjected to of resistance furnace 6; Again with CCl
4Liquid is packed in there-necked flask 8, and there-necked flask is put into water-bath 9; Then according to Fig. 1, quartz ampoule is connected with there-necked flask;
(6.2) air inlet 4 from three-way valve 3 passes into the Ar gas that flow velocity is 80ml/min, and utilizes three-way valve 3 control Ar gas to enter from first passage 1 quartz ampoule was carried out emptying 30 minutes, makes air 7 discharges from the gas outlet in quartz ampoule;
(6.3) open the resistance furnace mains switch, be warming up to 800 ℃.
Step 7: the growth carbon film, as Fig. 2 (e).
(7.1) bath 9 power supplys of fetching boiling water are to being equipped with CCl
4The there-necked flask 8 of liquid is heated to 60 ℃;
(7.2) after resistance furnace reaches 800 ℃ of setting, the swivel tee valve, making flow velocity is that the Ar gas of 30ml/min flows into there-necked flasks from second channel 2, and carries CCl
4Steam enters quartz ampoule, makes gaseous state CCl
4React in quartz ampoule with exposed 3C-SiC, generate carbon film, the reaction time is 30 minutes.
Step 8: remove remaining SiO
2
The carbon film print that generates is taken out and is placed in hydrofluoric acid with the water proportioning is the buffered hydrofluoric acid solution of 1:10 from quartz ampoule, removal window SiO in addition
2
Step 9: annealing reconstitutes Graphene.
(9.1) will remove SiO
2After the carbon film print be placed on the thick Cu film of 200nm, as Fig. 2 (f);
(9.2) carbon film print and Cu film integral body are placed in the Ar gas that flow velocity is 40ml/min, be to anneal 25 minutes under 800 ℃ in temperature, make carbon film reconstitute the Graphene with side gate figure at the window's position, form simultaneously side grid, source electrode, drain electrode and the conducting channel of side grid graphene field effect pipe.
Step 10: the Cu film is taken away from the Graphene print that forms side grid, source electrode, drain electrode and conducting channel, as Fig. 2 (g).
Step 11: the depositing metal contact layer, as Fig. 2 (h).
(11.1) the method deposition thickness of deposited by electron beam evaporation is the metal Pd of 5nm on side grid Graphene print;
(11.2) utilize the method deposition thickness of electron beam evaporation to be the metal A u of 100nm.
Step 12: the photoetching metal forms contact electrode, as Fig. 2 (i).
(12.1) spin coating concentration is 7% PMMA solution on metal level, and puts into baking oven, toasts 70s under 180 ℃;
(12.2) be made into reticle according to side grid, source, leakage metal electrode position, with electron beam, PMMA exposed, electron accelerating voltage is 100kV, and exposure intensity is 8000 μ C/cm
2, the figure on reticle is transferred on metal level;
(12.3) utilize RIE method etching sheet metal, etching gas adopts oxygen, and its flow is 20sccm, and etch period is 90s, obtains side grid, source, the leakage metal electrode of side grid graphene field effect pipe.
Step 13: remove PMMA.
Use acetone soln to soak print 10 minutes, take out post-drying, obtain side grid graphene field effect pipe.
Embodiment 2
Step 1: remove the sample surfaces pollutant, as Fig. 2 (a).
The Si substrate bases of 8 inches are carried out cleaning surfaces process, namely first use NH
4OH+H
2O
2Reagent soaked sample 10 minutes, took out post-drying, to remove the sample surfaces organic remains; Re-use HCl+H
2O
2Reagent soaked sample 10 minutes, took out post-drying, to remove ionic contamination.
Step 2: growth carburization zone.
The Si substrate base is put into CVD system response chamber, reative cell is vacuumized reach 10
-7The mbar rank.At H
2In the situation of protection, reaction chamber temperature is risen to 1100 ℃ of carburizing temperatures, then pass into to reative cell the C that flow is 40ml/min
3H
8, at Si Grown one deck carburization zone, growth time is 3min.
Step 3: growth 3C-SiC film on carburization zone, as Fig. 2 (b).
Reaction chamber temperature is risen to rapidly 1250 ℃ of growth temperatures, pass into the SiH that flow is respectively 35ml/min and 70ml/min
4And C
3H
8, carrying out the 3C-SiC thin film heterogeneity epitaxial growth, growth time is 35min; Then at H
2Progressively be cooled to room temperature under protection, complete the growth of 3C-SiC film.
Step 4: at the good 3C-SiC print surface deposition one deck SiO of growth
2, as Fig. 2 (c).
4a) the good 3C-SiC print of growing is put into the PECVD system, and internal system pressure is adjusted to 3.0Pa, and radio-frequency power is adjusted to 100W, and temperature is adjusted to 150 ℃;
4b) pass into respectively the SiH that flow velocity is 30sccm in system
4, flow velocity is the N of 60sccm
2O and flow velocity are the N of 200sccm
2, continue to pass into 100min, make SiH
4And N
2The O reaction is at 3C-SiC print surface deposition one deck 1 thick SiO of μ m
2
Step 5: at SiO
2Carve graphical window on layer, as Fig. 2 (d).
5a) at SiO
2On layer, spin coating one deck concentration is 3% acrylic resin PMMA;
5b) make reticle according to the figure of side gate field-effect transistor as shown in Figure 3, with electron beam, PMMA is exposed, figure on reticle is transferred to SiO
2On mask;
5c) corrode SiO with buffered hydrofluoric acid
2, expose 3C-SiC, at side grid, source, leakage and the raceway groove position formation window of side grid graphene field effect pipe.
Step 6: the quartz ampoule of packing into of the print after windowing, and exhaust heating.
6a) print after windowing is packed in quartz ampoule 5, quartz ampoule is placed in the thermal site that is subjected to of resistance furnace 6; Again with CCl
4Liquid is packed in there-necked flask 8, and there-necked flask is put into water-bath 9, then according to Fig. 1, quartz ampoule is connected with there-necked flask;
6b) air inlet 4 from three-way valve 3 passes into the Ar gas that flow velocity is 80ml/min, and utilizes three-way valve 3 control Ar gas to enter from first passage 1 quartz ampoule was carried out emptying 30 minutes, makes air 7 discharges from the gas outlet in quartz ampoule;
6c) open the resistance furnace mains switch, be warming up to 1000 ℃.
Step 7: the growth carbon film, as Fig. 2 (e).
7a) bath 9 power supplys of fetching boiling water are to being equipped with CCl
4The there-necked flask 8 of liquid is heated to 80 ℃;
7b) after resistance furnace reaches 1000 ℃ of setting, the swivel tee valve, making flow velocity is that the Ar gas of 85ml/min flows into there-necked flasks from second channel 2, and carries CCl
4Steam enters quartz ampoule, makes gaseous state CCl
4React in quartz ampoule with exposed 3C-SiC, generate carbon film, the reaction time is 120 minutes.
Step 8: remove remaining SiO
2
The carbon film print that generates is taken out and is placed in hydrofluoric acid with the water proportioning is the buffered hydrofluoric acid solution of 1:10 from quartz ampoule, removal window SiO in addition
2
Step 9: annealing reconstitutes Graphene.
To remove SiO
2After the carbon film print be placed on the Cu film that thickness is 300nm, as Fig. 2 (f), again they together are placed in the Ar gas that flow velocity is 100ml/min, be to anneal 10 minutes under 1000 ℃ in temperature, make carbon film reconstitute Graphene at the window's position, form side grid, source electrode, drain electrode and the conducting channel of side grid graphene field effect pipe.
Step 10: the Cu film is taken away from the Graphene print, as Fig. 2 (g).
Step 11: the evaporation deposition contact electrode, the process conditions of this step are identical with the step 11 of embodiment 1, as Fig. 2 (h).
Step 12: photoetching forms contact electrode, as Fig. 2 (i).
12a) spin coating concentration is 7% PMMA solution on metal level, and puts into baking oven, toasts 70s under 180 ℃;
12b) be made into reticle according to side grid, source, leakage metal electrode position, with electron beam, PMMA exposed, electron accelerating voltage is 100kV, and exposure intensity is 9000 μ C/cm
2Figure on reticle is transferred on metal level;
12c) recycling RIE method etching sheet metal, it is the oxygen of 20sccm that reacting gas adopts flow, the reaction time is 90s, obtains side grid, source, the leakage metal electrode of side grid graphene field effect pipe.
Step 13: use acetone soln to soak sample 10 minutes, take out post-drying, obtain side grid graphene field effect pipe.
Embodiment 3
Steps A: the Si substrate bases of 12 inches are carried out cleaning surfaces process, namely first use NH
4OH+H
2O
2Reagent soaked sample 10 minutes, took out post-drying, to remove the sample surfaces organic remains; Re-use HCl+H
2O
2Reagent soaked sample 10 minutes, took out post-drying, to remove ionic contamination, as Fig. 2 (a).
Step B: the Si substrate base is put into CVD system response chamber, reative cell is vacuumized reach 10
-7The mbar rank.At H
2In the situation of protection, reaction chamber temperature is risen to 1000 ℃ of carburizing temperatures, then pass into to reative cell the C that flow is 40ml/min
3H
8, at Si Grown one deck carburization zone, growth time is 5min.
Step C: reaction chamber temperature is risen to rapidly 1200 ℃ of growth temperatures, pass into the SiH that flow is respectively 25ml/min and 50ml/min
4And C
3H
8, carry out 3C-SiC thin film heterogeneity epitaxial growth 50min; Then at H
2Progressively be cooled to room temperature under protection, as Fig. 2 (b).
Step D: the good 3C-SiC print of growing is put into the PECVD system, and internal system pressure is adjusted to 3.0Pa, and radio-frequency power is adjusted to 100W, and temperature is adjusted to 150 ℃; Pass into the SiH that flow velocity is respectively 30sccm, 60sccm and 200sccm in system
4, N
2O and N
2, the duration is 70min, makes SiH
4And N
2The O reaction is at 6H-SiC print surface deposition one deck 0.8 thick SiO of μ m
2, as Fig. 2 (c).
Step e: at SiO
2Carve graphical window on layer, the process conditions of this step are identical with the step 5 of embodiment 1, as Fig. 2 (d).
Step F: the print after windowing is placed in quartz ampoule 5, quartz ampoule is placed in the thermal site that is subjected to of resistance furnace 6; Again with CCl
4Liquid is packed in there-necked flask 8, and there-necked flask is put into water-bath 9, then according to Fig. 1, quartz ampoule is connected with there-necked flask; Pass into from the air inlet 4 of three-way valve 3 the Ar gas that flow velocity is 80ml/min, and utilize three-way valve 3 control Ar gas to enter from first passage 1 quartz ampoule was carried out emptying 30 minutes, make air 7 discharges from the gas outlet in quartz ampoule; Open at last the resistance furnace mains switch, be warming up to 900 ℃.
Step G: bath 9 power supplys of fetching boiling water, to CCl is housed
4The there-necked flask 8 of liquid is heated to 70 ℃; Reach 900 ℃ of setting when resistance furnace after, the swivel tee valve, making flow velocity is that the Ar gas of 60ml/min flows into there-necked flasks from second channel 2, and carries CCl
4Steam enters quartz ampoule, makes gaseous state CCl
4Reacted in quartz ampoule 90 minutes with exposed 3C-SiC, generate carbon film, as Fig. 2 (e).
Step H: remove remaining SiO
2, the process conditions of this step are identical with the step 8 of embodiment 1.
Step I: will remove SiO
2After the carbon film print be placed on the Cu film that thickness is 250nm, as Fig. 2 (f); They together being placed in the Ar gas that flow velocity is 80ml/min, is to anneal 20 minutes under 900 ℃ in temperature again, makes carbon film reconstitute Graphene at the window's position, forms the transistorized side grid of side grid Graphene, source electrode, drain electrode and conducting channel.
Step J: the Cu film is taken away from the Graphene print that forms side grid, source electrode, drain electrode and conducting channel, as Fig. 2 (g).
Step K: the method deposition thickness of deposited by electron beam evaporation is the metal Pd of 5nm on side grid Graphene print; Utilize the method deposition thickness of electron beam evaporation to be the metal A u of 100nm, as Fig. 2 (h).
Step L: spin coating concentration is 7% PMMA solution on metal level, and puts into baking oven, toasts 70s under 180 ℃; Be made into reticle according to side grid, source, leakage metal electrode position, with electron beam, PMMA exposed, electron accelerating voltage is 100kV, and exposure intensity is 8500 μ C/cm
2, the figure on reticle is transferred on metal level; Recycling RIE method etching sheet metal, it is the oxygen of 20sccm that reacting gas adopts flow, the reaction time is 90s, obtains the transistorized side grid of side grid Graphene, source, leakage metal electrode, as Fig. 2 (i).
Step M: use acetone soln to soak sample 10 minutes, to remove PMMA, take out post-drying, obtain side grid Graphene transistor.
Above description is only three specific embodiments of the present invention; do not consist of any limitation of the invention; obviously for those skilled in the art; after having understood content of the present invention and principle; can both be on the basis that does not deviate from inventive concept and key step; carry out various corrections and change on form and details, but these are based on the correction of inventive concept with change still within claim protection range of the present invention.
Claims (10)
1. Si substrate upside grid graphene field effect pipe making method based on Cu film annealing comprises the following steps:
(1) standard cleaning is carried out to remove surface contaminant in the Si substrate base of 4-12 inch;
(2) the Si substrate base after cleaning is put into CVD system response chamber, reative cell is vacuumized reach 10
-7The mbar rank is then at H
2In the situation of protection, make reative cell progressively be warming up to 900 ℃-1100 ℃ of carburizing temperatures, pass into the C that flow is 40ml/min
3H
8Gas 3-8min, growth one deck carburization zone;
(3) reative cell is warming up to 1100 ℃-1250 ℃ of the growth temperatures of 3C-SiC, then passes into C
3H
8And SiH
4, carrying out the 3C-SiC thin film heterogeneity epitaxial growth, growth time is 35-70min; Then at H
2Progressively be cooled to room temperature under protection, complete the growth of 3C-SiC film;
(4) utilize the thick SiO of plasma chemical vapor deposition PECVD deposit one deck 0.5-1 μ m on growth good 3C-SiC print surface
2Mask;
(5) at SiO
2On mask, photoetching forms the window of side grid, source electrode, drain electrode and the conducting channel figure of side gate field-effect transistor;
(6) print after windowing is placed in quartz ampoule, and quartz ampoule is heated to 800-1000 ℃;
(7) to CCl is housed
4The there-necked flask of liquid is heated to 60-80 ℃, then passes into Ar gas in there-necked flask, utilizes Ar gas to carry CCl
4Steam enters in quartz ampoule, makes CCl
43C-SiC reaction 30-120min with exposed generates carbon film;
(8) print with the carbon film that generates is placed in buffered hydrofluoric acid solution to remove the SiO outside window
2
(9) will remove SiO
2After the carbon film print be placed on the Cu film, and to be placed in together Ar gas be annealing 10-25 minute under 800-1000 ℃ in temperature, makes carbon film reconstitute Graphene at the window's position, forms side grid, source electrode, drain electrode and the conducting channel of side grid graphene field effect pipe;
(10) the Cu film is taken away from the Graphene print that forms side grid, source electrode, drain electrode and conducting channel;
(11) the method depositing metal Pd of deposited by electron beam evaporation and metal A u on the Graphene print are as the contact layer of side grid graphene field effect pipe;
(12) the photoetching metal contact layer forms side grid, source electrode, the drain metal electrode of side grid graphene field effect pipe;
(13) sample that uses acetone soln to soak to make took out post-drying to remove residual PMMA in 10 minutes, obtained side grid graphene field effect pipe.
2. the Si substrate upside grid graphene field effect pipe making method based on the annealing of Cu film according to claim 1, is characterized in that the SiH that passes in described step (3)
4And C
3H
8, its flow is respectively 15-35ml/min and 30-70ml/min.
3. the Si substrate upside grid graphene field effect pipe making method based on Cu film annealing according to claim 1 is characterized in that the PECVD deposit SiO of described step (4)
2Condition be:
SiH
4, N
2O and N
2Flow velocity be respectively 30sccm, 60sccm and 200sccm,
Cavity pressure is 3.0Pa,
Radio-frequency power is 100W,
Deposition temperature is 150 ℃,
Deposition time is 30-100min.
4. the Si substrate upside grid graphene field effect pipe making method based on the annealing of Cu film according to claim 1, is characterized in that the photoetching in described step (5) forms side gate figure window, carries out as follows:
5a) make reticle according to Graphene side gate field-effect transistor domain;
5b) at SiO
2The acrylic resin PMMA solution of mask surface take spin coating one deck concentration as 3%, and baking 60 seconds under 180 ℃ make PMMA and SiO
2Mask is closely linked;
5c) with electron beam, PMMA is exposed, the figure on reticle is transferred to SiO
2On mask;
5d) use buffered hydrofluoric acid to SiO
2Mask layer corrodes, and exposes 3C-SiC, forms the window of side grid, source electrode, drain electrode and the conducting channel figure of side gate field-effect transistor.
5. the Si substrate upside grid graphene field effect pipe making method based on Cu film annealing according to claim 1, the Ar gas velocity that it is characterized in that described step (7) is 30-85ml/min.
6. the Si substrate upside grid graphene field effect pipe making method based on Cu film annealing according to claim 1, the Ar gas velocity that it is characterized in that described step (9) is 40-100ml/min.
7. the Si substrate upside grid graphene field effect pipe making method based on the annealing of Cu film according to claim 1, is characterized in that the Cu film thickness in described step (9) is 200-300nm.
8. the Si substrate upside grid graphene field effect pipe making method based on Cu film annealing according to claim 1, the metal Pd and the metal A u that it is characterized in that the evaporation deposition in described step (10), wherein metal Pd thickness is 5nm, and metal A u thickness is 100nm.
9. the Si substrate upside grid graphene field effect pipe making method based on the annealing of Cu film according to claim 1, is characterized in that the electron beam exposure PMMA in described step (11), and its process conditions are:
Electron accelerating voltage: 100kV,
Exposure intensity: 8000-9000 μ C/cm
2
10. the Si substrate upside grid graphene field effect pipe making method based on the annealing of Cu film according to claim 1, is characterized in that the photoetching metal contact layer in described step (12) forms electrode, and its step is as follows:
12a) make reticle according to the electrode pattern of the side grid of side grid graphene field effect pipe, source electrode, drain electrode;
Be 12b) that 7% acrylic resin PMMA solution is spun on metal contact layer with concentration, and baking 70 seconds under 180 ℃, itself and metal contact layer are closely linked;
12c) with electron beam exposure acrylic resin PMMA, the figure on reticle is transferred on metal level;
12d) adopt reactive ion etching RIE metal contact layer take oxygen as etching gas, form side grid, source electrode, the drain metal electrode of side grid graphene field effect pipe.
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