CN103123516B - A kind of mainboard and the method and device of multiple adapter joint communications - Google Patents
A kind of mainboard and the method and device of multiple adapter joint communications Download PDFInfo
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- CN103123516B CN103123516B CN201110369505.1A CN201110369505A CN103123516B CN 103123516 B CN103123516 B CN 103123516B CN 201110369505 A CN201110369505 A CN 201110369505A CN 103123516 B CN103123516 B CN 103123516B
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Abstract
The invention discloses the method and device of a kind of mainboard and multiple adapter joint communications, relate to high-speed digital communication and multiple adapter joint communication, Signal sampling and processing field.Device disclosed by the invention, including a mainboard, the multiple adapters being connected with described mainboard by multiple same type of plate connector for substrate, wherein: described mainboard, receive the interface data that each adapter sends, process after this interface data is converted to the data form of this mainboard identification, and the data that each adapter will be transferred to be converted to described interface data after be sent to correspondence adapter；Described adapter, receive described mainboard send interface data, process after this interface data is converted to the data form of this adapter identification, and the data that described mainboard will be transferred to be converted to described interface data after be sent to described mainboard.Technical solution of the present invention achieves the proper communication between mainboard and multiple different adapter.
Description
Technical field
The present invention relates to high-speed digital communication and multiple adapter joint communication, Signal sampling and processing field, mainly
Relate to the method and device of a kind of mainboard and multiple adapter joint communications.
Background technology
Currently, high-speed digital video camera quickly grows, and communication interface, communication level are varied, this kind of feelings simultaneously
Under condition, in a system, needing different adapters to come communication interface, communication level processes, simultaneously and mainboard it
Between communicated by bus and control signal.Therefore interface definition and respective outer side edges are to data communication, the functional realiey of adapter
And the multiplexing of adapter is most important.
Summary of the invention
The technical problem to be solved is, how to realize between mainboard and multiple different adapter combine logical
Letter, therefore the method and device of a kind of mainboard and multiple adapter joint communications is provided.
In order to solve the problems referred to above, the invention discloses the device of a kind of mainboard and multiple adapter joint communications, including
One mainboard, the multiple adapters being connected with described mainboard by multiple same type of plate connector for substrate, wherein:
Described mainboard, receives the interface data that each adapter sends, this interface data is converted to the number of this mainboard identification
Process according to after form, and the data that each adapter will be transferred to be converted to described interface data after be sent to correspondence
Adapter；
Described adapter, receives the interface data that described mainboard sends, this interface data is converted to the identification of this adapter
Data form after process, and the data that described mainboard will be transferred to be converted to described interface data after be sent to institute
State mainboard.
It is preferred that in said apparatus, described mainboard includes processing unit and interface unit, wherein:
Described processing unit, the data sending described interface unit process, and will be transferred to each adapter
Data be sent to described interface unit；
Described interface unit, receives the interface data that each adapter sends, this interface data is converted to the identification of this mainboard
Data form be sent to described processing unit, and receive the data that described processing unit sends, and convert this data to
The adapter of correspondence it is sent to after described interface data.
It is preferred that in said apparatus, described adapter includes processing unit and interface unit, wherein:
Described processing unit, the data sending described interface unit process, and will be transferred to the number of mainboard
According to being sent to described interface unit；
Described interface unit, receives the interface data that mainboard sends, this interface data is converted to the identification of this adapter
Data form is sent to described processing unit, and receives the data that described processing unit sends, and converts this data to institute
Described mainboard it is sent to after stating interface data.
It is preferred that in said apparatus, described mainboard is sent to the interface data of described adapter, and described adapter is sent out
Give the data that interface data is identical or different communication format of described mainboard.
A kind of method that the invention also discloses mainboard and multiple adapter joint communications, including:
Mainboard receives, by multiple same type of plate connector for substrate, the interface data that multiple adapters send, and will receive
Interface data be converted to the data form of this mainboard identification after process；
When described mainboard is to each adapter transmission data, logical after data to be transmitted are converted to described interface data
The plate connector for substrate crossing correspondence is sent to the adapter of correspondence.
It is preferred that in said method, when described adapter receives the interface data that described mainboard sends, first by this interface
Data are converted to the data form of this adapter identification and process；
When described adapter is to described mainboard transmission data, after data to be transmitted are converted to described interface data
It is sent to described mainboard.
It is preferred that in said method, described mainboard is sent to the interface data of described adapter, and described adapter is sent out
Give the data that interface data is identical or different communication format of described mainboard.
It is preferred that said method also includes, the power supply, EBI and the control that arrange in advance on described plate connector for substrate connect
Bus signals on the pin of mouth correspondence and plate connector for substrate and control signal.
It is preferred that in said method, described bus signals at least include the input of clock signal (mCLK), data output letter
Number (DI DO) and input output control signal (CSI CSO), wherein, described input output control signal (CSI CSO) be
Periodic signal.
It is preferred that in said method, described input width and data traffic big of output control signal (CSI CSO)
Little it is directly proportional.
Technical solution of the present invention achieves the proper communication between mainboard and multiple different adapter.
Accompanying drawing explanation
Fig. 1 is mainboard and the connection diagram of multiple adapter in the present embodiment；
Fig. 2 is the bus data sequential chart defined on plate connector for substrate in the present embodiment；
Fig. 3 is the reading sequential chart of the control signal defined on plate connector for substrate in the present embodiment；
Fig. 4 be the control signal that defines on plate connector for substrate in the present embodiment write sequential chart.
Detailed description of the invention
In order to make the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing to the present invention
Technical scheme is described in further detail.It should be noted that in the case of not conflicting, embodiments herein and embodiment
In feature can arbitrarily be mutually combined.
Embodiment 1
The present embodiment provides the device of a kind of mainboard and multiple adapter joint communications, and its structure is as it is shown in figure 1, include one
Individual mainboard, the multiple adapters being connected with this mainboard by multiple same type of plate connector for substrate.Wherein, plate connector for substrate
Quantity identical with the quantity of adapter (the present embodiment includes N number of plate connector for substrate and N number of adapter as shown in Figure 1).It is situated between below
Continue the function of each several part.
Mainboard, for receiving the interface data that each adapter sends, is converted to the number of this mainboard identification by this interface data
Process according to after form, and the data that each adapter will be transferred to be converted to described interface data after be sent to correspondence
Adapter；
Specifically, mainboard includes again processing unit and interface unit.Processing unit, the data that main docking port unit sends
Process, and the data that will be transferred to each adapter are sent to interface unit.Interface unit, then be used for receiving each adaptation
The interface data that card sends, the data form that this interface data is converted to the identification of this mainboard is sent to processing unit, Yi Jijie
Receive the data that processing unit sends, and be sent to the adapter of correspondence after converting this data to described interface data.Wherein, main
Interface unit in plate can use Special Interface Chip or FPGA (programmable gate array) chip to realize.And processing unit
Can be separate chip with interface unit, it is also possible to the two unit is integrated in a chip realization.
Adapter, receives the interface data that mainboard sends, this interface data is converted to the data lattice of this adapter identification
Process after formula, and the data that mainboard will be transferred to be converted to interface data after be sent to described mainboard.
Specifically, adapter at least includes processing unit and interface unit.Processing unit, the data that docking port unit sends
Process, and the data that will be transferred to mainboard are sent to interface unit.Interface unit, receives the number of ports that mainboard sends
According to, the data form that this interface data is converted to the identification of this adapter is sent to processing unit, and reception processing unit is sent out
The data sent, and it is sent to mainboard after converting this data to described interface data.Wherein, the interface unit in adapter can be adopted
Realizing with Special Interface Chip or FPGA (programmable gate array) chip, use fpga chip in the present embodiment, it is joined
Put employing Slave serial mode.And processing unit and interface unit can be separate chips, it is also possible to by this two
Individual unit is integrated in a chip realization.
In said apparatus, the signal definition on plate connector for substrate needs consistent, to ensure adapter multiplexing.Wherein, mainboard
In interface unit, and Special Interface Chip or FPGA (programmable gate can be used with the interface unit in each adapter
Array) chip realizes, and is same interface data to ensure the data transmitted between mainboard and adapter, thus realize multiple suitable
Join the multiplexing being stuck on same plate connector for substrate.
Mainboard is sent to the interface data of adapter, and adapter to be sent to the interface data of mainboard be identical or different
The data of communication format.It is to say, in order to meet system requirements, it is desirable to mainboard is issued multiple difference by plate connector for substrate and is fitted
The signal definition joining card is consistent.Same, the signal that multiple different adapters issue mainboard each via plate connector for substrate is fixed
Justice is the most consistent.And mainboard is issued the signal of each adapter and each adapter and issued the signal of mainboard, its definition can identical may not be used yet
With.
Preferably, being used for employed in said apparatus connects the plate connector for substrate of mainboard and multiple adapter is same class
The plate connector for substrate of type, needs rationally to select, just can not increase while ensureing multiple adapter multiplexings same plate connector for substrate
Add the size of whole device.Specifically, during option board connector for substrate, at least need to consider two aspect contents.
First aspect needs according to mainboard and adapter height and the size of width, selects suitable adapter.I.e. first root
According to adapter quantity, Cabinet Size, consider the function in addition to adapter simultaneously, determine motherboard size.Further according to adapter merit
Can determine that size.Finally, adapter is determined according to the width dimensions of mainboard and the height of multiple adapter, i.e. selected plate
Connector for substrate is to meet mainboard and multiple adapter height and the plate connector for substrate of width requirement simultaneously.Wherein, requirement for height refers to,
After mainboard and each adapter are connected by plate connector for substrate, the difference in height on both sides is in the range of specifying.Width requirement then refers to,
N number of plate connector for substrate side by side after width and N number of adapter side by side after width difference within the specified range, wherein, each plate
The width of connector for substrate is relevant with its lead pin pitch.
Second aspect selects adapter according to the holding wire quantity between mainboard and multiple adapter.I.e. selected plate plate
The holding wire quantity of adapter is at least up to the holding wire total quantity of multiple adapter.But in preferred version, it is contemplated that system
Reasonable size, more than the holding wire total quantity of multiple adapters several of the selected holding wire quantity on plate connector for substrate is
Can.
Further, since mainboard and multiple different adapter use same plate connector for substrate.Therefore mainboard and adapter
Plate connector for substrate is respectively male or female seat, it is impossible to mixing.Specifically, the interface unit in mainboard is connected to the connection of each plate plate
The power pin of one end (plate connector for substrate male as shown in Figure 1) of device, EBI pin and control interface pin connect.
Interface unit in each adapter is then connected respectively to the other end (the plate connector for substrate as shown in Figure 1 of each plate connector for substrate
Female) power pin, EBI pin and control interface pin.
Meanwhile, mainboard, also by control signal, reads the setting on each adapter, to distinguish different adapters.?
After carefully analyzing mainboard and adapter function, there is provision of the definition of each pin of interface unit, to ensure each adaptive cartoon
With.But the application does not limit following characteristics kind of interface and detailed pin definitions, as long as the pin of definition includes: power supply,
The pins such as EBI, control interface.
And the mounting means that adapter is on plate connector for substrate can unrestricted choice, i.e. can parallel or vertically place, depend on
Depending on system.
Below to have particular application as example, the work process of said apparatus is described.
Assuming according to mainboard and the demand of each adapter, selected same type of two pairs of PMC adapters, model is AMP
5120521-1 and 5120527-1 of company.Wherein, 5120521-1 is welded on mainboard, referred to as P4 and P3, will
5120527-1 is welded on adapter, referred to as P2 and P1.P4 and P2 is a pair, P3 and P1 is a pair.This kind of attachment structure is more
Facilitate the multiplexing of adapter.
Owing to P2 with P1 is corresponding with P4 and P3, therefore followed by Tables 1 and 2, signal on P2 and P1 is described
It is specifically defined, and the signal definition on P4 and P3 repeats no more.
Table 1 is the signal definition detailed annotation table on P1:
Table 2 is the signal definition detailed annotation table on P2:
According in the signal on plate connector for substrate defined in above-mentioned Tables 1 and 2, the sequential of bus signals is as shown in Figure 2.
In figure, mCLK clock is 50MHz, but controls and data process owing to the setting of mCLK clock directly influences data traffic, therefore
Can be according to the on-demand frequency arranging mCLK clock of concrete application scenarios.It addition, between signal CSI and CSO shown in Fig. 2 mutually
Working alone, DI and DO depends on CSI and CSO respectively.Therefore, it is possible to the sequential of CSI and CSO is finely adjusted, such as time delay or
Person shifts to an earlier date, to facilitate data to process.Applicants have also recognised that data traffic controls and data process for convenience, it is desirable to signal DI
Controlled with the data-bus width of DO, the present embodiment is recommended the data-bus width of DI and DO is set to 1-32 position.Equally
Ground, data traffic controls and data process for convenience, it is desirable to the width of CSI and CSO is controlled, and is preferably arranged by CSI and CSO
For periodic signal.CSI and CSO shown in Fig. 2 is width and is the periodic signal of 4 clocks.But the width of CSI and CSO
Being not limited to 4 clocks, its preferred width range is 1 to 25 clock.
According in the signal on plate connector for substrate defined in above-mentioned Tables 1 and 2, the read operation process of control signal is as schemed
Shown in 3, write operation process is as shown in Figure 4.SDI, SDO, SCLK, SCS1 can form first group of control signal, for mainboard pair
The information in PROM on adapter is read out, to determine the type of adapter.SDI, SDO, SCLK, SCS2 can form
Two groups of control signals, for mainboard, to the FPGA internal register on adapter, (i.e. interface unit on adapter and process is single
Unit) operation.It addition, as can be seen from Table 1 and Table 2, three pins of these two groups of control signal multiplexings, thus save hard
Part cost.These two groups of control signals additionally use identical sequential, can simplify software processes.
Embodiment 2
The present embodiment introduces a kind of method of mainboard and multiple adapter joint communications, and the method can be by above-described embodiment institute
The device provided realizes, and specifically, the method includes operating as follows:
Mainboard receives, by multiple same type of plate connector for substrate, the interface data that multiple adapters send, and will be received
Interface data be converted to the data form of this mainboard identification after process；
When mainboard is to each adapter transmission data, after data to be transmitted are converted to interface data, pass through correspondence
Plate connector for substrate is sent to the adapter of correspondence.
When adapter receives the interface data that above-mentioned mainboard sends, first this interface data is converted to this adapter and knows
Other data form processes again；When adapter is to mainboard transmission data, then data to be transmitted are converted to interface
Mainboard it is sent to after data.
Wherein, the multiplexing of plate connector for substrate is realized with pole in order to meet system requirements, it is desirable to mainboard passes through plate connector for substrate
Issuing the data that data are same communication format of multiple different adapter, multiple different adapters connect each via plate plate
Device is issued the data of mainboard and is the data of same communication format.And the data that mainboard issues each adapter are issued with each adapter
The data of mainboard, its communication format can be identical, it is also possible to different.
It addition, said method also includes, the power supply on described plate connector for substrate, EBI and control interface are set in advance
Corresponding pin and determine bus signals and the definition of control signal on plate connector for substrate.Specifically, can be according to above-mentioned table 1 He
Table 2 arranges each pin of plate connector for substrate and bus signals and control signal.Wherein, bus signals at least includes clock signal
(mCLK), data input output signal (DI DO) and input output control signal (CSI CSO).The setting of mCLK clock
Data traffic can be directly influenced control and data process, therefore can be according to the on-demand frequency arranging mCLK clock of concrete application scenarios
Rate.Working independently from each other between signal CSI and CSO, DI and DO depends on CSI and CSO respectively.The sequential of CSI and CSO can be entered
Row fine setting, such as time delay or in advance, to facilitate data to process.It addition, data traffic controls and data process for convenience, it is desirable to
The data-bus width of signal DI and DO is controlled.Such as, the data-bus width of DI and DO may be configured as 1-32 position.And signal
CSI the width of CSO be directly proportional to the size of data traffic, i.e. signal CSI the width of CSO the widest, in data transmission procedure
Data traffic is the biggest, and therefore, the width of signal CSI and CSO can be arranged as required to, and preferably CSI and CSO is set to the cycle
Signal.Also, it should be noted during arranging signal width, the data-bus width of signal CSI with CSO wants consistent.
The application recommend the width of CSI/CSO 1-25 clock widths scope.Then, when width is set to 1 clock of minimum, can
Data traffic with transmission is minimum, and when width is set to 25 clocks of maximum, then the data traffic can transmitted is maximum.Specifically
Ground: arranging each clock data width is 32bit, and when the width of CSI/CSO is 4 clocks, the data traffic of transmission is
4x32=128bit.When the width of CSI/CSO is 8 clocks, then the data traffic can transmitted is 8x32=256bit.
Control signal can be divided into two groups according to function, first group of control signal SDI, and SDO, SCLK and SCS1 can be used for leading
Information in PROM on adapter is read out by plate, to determine the type (can distinguish different adapters) of adapter.
Second group of control signal SDI, SDO, SCLK and SCS2, can be used for mainboard (i.e. adaptive to the FPGA internal register on adapter
Interface unit on card and processing unit) operation.And three pins of these two groups of control signal multiplexings, reach saving hardware
The effect of cost.These two groups of control signals additionally use identical sequential, simplify software processes.
Description during other details can be found in above-described embodiment 1 in the present embodiment.
The above, only the preferred embodiments of the present invention, is not intended to limit protection scope of the present invention.All at this
Within the spirit of invention and principle, any modification, equivalent substitution and improvement etc. done, should be included in the protection model of the present invention
Within enclosing.
Claims (10)
1. a mainboard and the device of multiple adapter joint communications, it is characterised in that this device includes a mainboard, by many
Multiple adapters that individual same type of plate connector for substrate is connected with described mainboard, wherein:
Described mainboard, receives the interface data that each adapter sends, this interface data is converted to the data lattice of this mainboard identification
Process after formula, and the data that each adapter will be transferred to be converted to described interface data after be sent to correspondence adaptation
Card；
Described adapter, receives the interface data that described mainboard sends, this interface data is converted to the number of this adapter identification
Process according to after form, and the data that described mainboard will be transferred to be converted to described interface data after be sent to described master
Plate；
Wherein, the quantity of plate connector for substrate and the quantity of adapter are identical；Plate connector for substrate have respectively male, the two of female seat
End, one end connects mainboard, other end connecting adapter；
The signal definition that mainboard issues multiple adapter by plate connector for substrate is consistent, and multiple adapters connect each via plate plate
The signal definition that mainboard issued by device is the most consistent.
2. device as claimed in claim 1, it is characterised in that described mainboard includes processing unit and interface unit, wherein:
Described processing unit, the data sending described interface unit process, and will be transferred to the number of each adapter
According to being sent to described interface unit；
Described interface unit, receives the interface data that each adapter sends, this interface data is converted to the number of this mainboard identification
It is sent to described processing unit according to form, and receives the data that described processing unit sends, and convert this data to described
The adapter of correspondence it is sent to after interface data.
3. device as claimed in claim 2, it is characterised in that described adapter includes processing unit and the adapter of adapter
Interface unit, wherein:
The data of the interface unit transmission of described adapter are processed, and will pass by the processing unit of described adapter
The data being defeated by mainboard are sent to the interface unit of described adapter；
The interface unit of described adapter, receives the interface data that mainboard sends, and this interface data is converted to this adapter and knows
Other data form is sent to the processing unit of described adapter, and the number that the processing unit receiving described adapter sends
According to, and it is sent to described mainboard after converting this data to described interface data.
4. device as claimed in claim 3, it is characterised in that
Described mainboard is sent to the interface data of described adapter, and described adapter is sent to the interface data of described mainboard
Data for identical or different communication format.
5. a mainboard and the method for multiple adapter joint communications, it is characterised in that the method includes:
Mainboard receives, by multiple same type of plate connector for substrate, the interface data that multiple adapters send, by connecing of receiving
Mouthful data process after being converted to the data form of this mainboard identification；
When described mainboard is to each adapter transmission data, it is right to pass through after data to be transmitted are converted to described interface data
The plate connector for substrate answered is sent to the adapter of correspondence；
Wherein, the quantity of plate connector for substrate and the quantity of adapter are identical；Plate connector for substrate have respectively male, the two of female seat
End, one end connects mainboard, other end connecting adapter；
The signal definition that mainboard issues multiple adapter by plate connector for substrate is consistent, and multiple adapters connect each via plate plate
The signal definition that mainboard issued by device is the most consistent.
6. method as claimed in claim 5, it is characterised in that
When described adapter receives the interface data that described mainboard sends, first this interface data is converted to the identification of this adapter
Data form process again；
When described adapter is to described mainboard transmission data, send after data to be transmitted are converted to described interface data
To described mainboard.
7. method as claimed in claim 6, it is characterised in that
Described mainboard is sent to the interface data of described adapter, and described adapter is sent to the interface data of described mainboard
Data for identical or different communication format.
8. the method as described in claim 5,6 or 7, it is characterised in that the method also includes:
Power supply on described plate connector for substrate, the EBI pin corresponding with control interface and plate connector for substrate are set in advance
On bus signals and control signal.
9. method as claimed in claim 8, it is characterised in that
Described bus signals at least include the input of clock signal (mCLK), data output signal (DI DO) and input output
Control signal (CSI CSO), wherein, described input output control signal (CSI CSO) be periodic signal.
10. method as claimed in claim 9, it is characterised in that
Described input the width of output control signal (CSI CSO) be directly proportional to the size of data traffic.
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| CN201110369505.1A CN103123516B (en) | 2011-11-18 | 2011-11-18 | A kind of mainboard and the method and device of multiple adapter joint communications |
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| CN104965468B (en) * | 2015-07-06 | 2017-10-31 | 浙江大学 | A kind of common interface module suitable for the multi-functional acquisition control devices of CPCI |
| CN106463098B (en) | 2016-07-26 | 2018-11-23 | 北京小米移动软件有限公司 | Show equipment and applied to the mainboard in display equipment |
| US20200065287A1 (en) * | 2018-08-21 | 2020-02-27 | General Electric Company | Networking systems using multiple peripheral component cards |
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| CN101089836A (en) * | 2006-06-15 | 2007-12-19 | 辉达公司 | Motherboard for cost-effective high performance graphics system with two or more graphics processing units |
| CN101221458A (en) * | 2004-04-09 | 2008-07-16 | 辉达公司 | Edge connector for field changeable graphics system |
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| CN100377135C (en) * | 2005-06-03 | 2008-03-26 | 微星科技股份有限公司 | Dual-bus adapter card |
| CN100483378C (en) * | 2006-07-05 | 2009-04-29 | 友劲科技股份有限公司 | PCI-Express multi-mode extended card and communication device possessing the extended card |
| CN102081437A (en) * | 2009-11-26 | 2011-06-01 | 鸿富锦精密工业（深圳）有限公司 | Computer |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101221458A (en) * | 2004-04-09 | 2008-07-16 | 辉达公司 | Edge connector for field changeable graphics system |
| CN101089836A (en) * | 2006-06-15 | 2007-12-19 | 辉达公司 | Motherboard for cost-effective high performance graphics system with two or more graphics processing units |
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