CN103114336A - Method for annealing silicon carbide wafer - Google Patents

Method for annealing silicon carbide wafer Download PDF

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Publication number
CN103114336A
CN103114336A CN2013100778846A CN201310077884A CN103114336A CN 103114336 A CN103114336 A CN 103114336A CN 2013100778846 A CN2013100778846 A CN 2013100778846A CN 201310077884 A CN201310077884 A CN 201310077884A CN 103114336 A CN103114336 A CN 103114336A
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annealing
temperature
sic
wafer
silicon carbide
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姜涛
严成锋
孔海宽
刘熙
陈建军
高攀
忻隽
肖兵
施尔畏
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Shanghai Institute of Ceramics of CAS
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Shanghai Institute of Ceramics of CAS
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Abstract

The invention relates to a method for annealing a silicon carbide wafer. The method comprises the following steps of: putting a silicon carbide wafer which is subjected to primary machining into an annealing furnace; in the presence of an inert gas or a reduction gas, slowly rising the temperature for 1-8 hours (preferably 3-6 hours) till the annealing temperature is 1,200-1,800 DEG C (preferably 1,300-1,500 DEG C); constantly keeping the temperature at the annealing temperature for 0.1-5 hours (preferably 2-3 hours); and subsequently slowly cooling down for 1-10 hours (preferably 3-7 hours) to be at the room temperature. By annealing a SiC wafer, compared with the annealing process of a SiC wafer ingot, the method has the advantages of low annealing temperature, short time and easiness in realization in the production process. Through the annealing treatment, the residual stress in the SiC wafer is remarkably decreased, the defects are reduced, and the crystal quality of the SiC wafer is improved.

Description

The method for annealing of silicon carbide wafer
Technical field
The present invention relates to the semiconductor material with wide forbidden band field, be specifically related to the carborundum crystals of a kind of physical vapor transport method (PVT) growth, more specifically relate to a kind of annealing process of silicon carbide wafer.The method is by carrying out the high temperature anneal under shielding gas to silicon carbide wafer, thereby eliminates the stress in silicon carbide wafer, and reduce injection defect improves the crystalline quality of wafer.
Background technology
Silicon carbide (SiC) is as the representative of third generation semiconductor material, character with many excellences, as high rigidity (Mohs' hardness: 9.5,10), high heat conductance (4.9W/cmK), broad stopband (2.40-3.26eV), high saturation drift velocity (2.0-2.5 * 10 diamond: 7Cm/s), large critical breakdown strength (2~3 * 10 6V/cm), chemical stability is high, capability of resistance to radiation is strong etc., with compared obvious superiority with first-generation semiconductor material with s-generation semiconductor material, be considered to make opto-electronic device, Deep trench termination, the desirable semiconductor material of power electronic devices, have broad application prospects under the Working environment of high temperature, high pressure, severe radiation, and the development of following electronics and information industry technology is produced material impact.
The SiC growing method of comparative maturity is that physical vapor transports (PVT) method at present.The PVT method is a kind of method of vapor-phase growing, during PVT method growth SiC crystal, crucible material, temperature-controlled precision, raw material, seed crystal and pressure etc. there is very high requirement, in recent years, researcher is done a lot of work on improvement PVT method growth technique, the quality of SiC crystal, size etc. all improve a lot, but still have defective more or less in the crystal that grows.In addition, the crucible inside of PVT method growth SiC crystal exists vertically and thermograde radially simultaneously, and therefore, on the aufwuchsplate of SiC crystal, each regional speed of growth is different, and the inconsistent meeting of the speed of growth causes existing in the SiC crystal larger stress field.The existence of these defectives or stress not only can affect the yield rate of SiC wafer, also can affect the quality of the epitaxial wafer take SiC as substrate, even can affect the performance of SiC base device.Usually can be processed to the wafer of certain specification after the growth of SiC crystal finishes, these wafers are mainly used to do the substrate of epitaxial material, or other SiC base devices.Therefore, the quality of SiC wafer crystalline quality directly affects the performance of epitaxial material and SiC base device.
Therefore, in order to eliminate stress, reduce injection defect need to carry out the high temperature anneal to the SiC crystal.Traditional SiC crystal annealing technology is that oven-fresh crystal ingot is annealed.For example directly annealing after the crystal growth finishes, namely, the in-situ annealing for the first time of crystal, again for example to carrying out second annealing through the crystal of once annealing or the crystal of taking-up, but this annealing way often all requires annealing temperature high, annealing time is long, and can not thoroughly eliminate the unrelieved stress in the SiC crystal.CN102534805 and CN101984153A disclose a kind of improved second annealing technique, but annealing temperature is higher (2300~2500 ℃) still, annealing time is long (be warmed up to annealing temperature in 10~50 hours, after being incubated 10~40 hours on annealing temperature again with cooling to room temperature in 10~50 hours) also.
In addition, the SiC crystal after the techniques such as warp cutting, surfacing, also can increase the stress of SiC wafer surface in the course of processing.patent application CN102543718A has announced a kind of reduction silicon carbide wafer angularity, the method of sinuousness, it applies mechanical stress on the complete silicon carbide wafer of grinding and polishing makes wafer produce the distortion that reduces direction to planeness, again wafer is heated to enough temperature (100~2000 ℃), anneal and keep the sufficiently long time (0.1~200 hour), so that its lattice generation slippage, reset, thereby the distortion of wafer is remained, reach the wafer that obtains and have enough little angularity, sinuousness, but the method need to apply extra mechanical pressure, higher to equipment requirements, and the method only relates to reduce angularity, impact on the wafer crystalline quality is not proposed.Again, CN102817083A discloses a kind of SiC annealing of wafer method that heats up stage by stage: be warming up to low-temperature region (200~400 ℃) insulation 3~6 hours; Be warming up to again middle temperature area (500~700 ℃) insulation 5~10 hours; Then be warming up to high-temperature area (800~1900 ℃) insulation 10~20 hours; Be cooled to room temperature with 10~15 ℃/hour at last, though this method can be with wafer process stress basically eliminate, but annealing steps is comparatively complicated, and annealing time is longer, and this method also proposes annealing to the impact of wafer crystalline quality.
Summary of the invention
In the face of the problems referred to above that prior art exists, the present invention aims to provide a kind of new easy, easy-operating method for annealing to the SiC wafer, can reduce the unrelieved stress in the SiC wafer, again can reduce injection defect density, improve the crystalline quality of wafer.
At this; the invention provides a kind of method for annealing of silicon carbide wafer; comprise: will be placed in annealing furnace through the silicon carbide wafer of preliminary working; under the protection of rare gas element or reducing gas; slowly heat up 1~8 hour (preferred 3~6 hours) to 1200~1800 ℃ of annealing temperatures (preferred 1300~1500 ℃); in 0.1~5 hour (preferred 2~3 hours) of this annealing temperature constant temperature insulation, then slow cooling 1~10(is preferred 3~7 hours) hour to room temperature.
The present invention compares with the annealing process of SiC crystal ingot by the SiC wafer is annealed, and has annealing temperature low, and the time is short, in process of production the easy advantage such as realization.Through anneal of the present invention, can significantly reduce unrelieved stress, reduce injection defect in the SiC wafer, improve the crystalline quality of SiC wafer.
Preferably, be warming up to 1000 ℃ with the first temperature rise rate, then be warming up to annealing temperature with the second temperature rise rate less than described the first temperature rise rate; Be cooled to 1000 ℃ with the first rate of temperature fall, then be cooled to room temperature with the second rate of temperature fall greater than described the first rate of temperature fall.Heat up stage by stage and lower the temperature, especially carrying out heating and cooling with relatively high speed below 1000 ℃, carrying out heating and cooling with relatively low speed more than 1000 ℃, can guarantee annealing efficiency like this, can guarantee again to anneal and carry out equably.
More preferably, described the first temperature rise rate is (preferred 200~400 ℃/hour) below 500 ℃/hour, described the second temperature rise rate is (preferred 120~300 ℃/hour) below 400 ℃/hour, described the first rate of temperature fall is (preferred 100~250 ℃/hour) below 400 ℃/hour, and described the second rate of temperature fall is (preferred 150~350 ℃/hour) below 500 ℃/hour.In a preferred example, rate of temperature fall is lower than temperature rise rate.
Preferably, in the constant temperature insulating process, the internal temperature gradient of described annealing furnace be 3 ℃/below cm, preferred 1 ℃/below cm.
Preferably, in annealing process, chamber pressure is 1~100,000 handkerchief, preferred 5~70,000 handkerchiefs.
In the present invention, thereby protective gas can adopt rare gas element or reducing gas to prevent the high temperature oxidation of SiC wafer, and rare gas element can adopt argon gas, helium or its mixed gas, and reducing gas can adopt hydrogen.
In the present invention, can be cutting blade, surfacing sheet, single-sided polishing sheet or twin polishing sheet through the silicon carbide wafer of preliminary working again.Thickness can be 100 μ m~1cm, and size can be 2~6 inches.The SiC wafer thickness is thinner, the easier stress that discharges in annealing process, and the annealing effect is more obvious.In addition, the crystal formation of silicon carbide wafer can be 3C-SiC, 6H-SiC, 4H-SiC or 15R-SiC.Silicon carbide wafer can be conductivity type or semi-insulating type.
In the present invention, described annealing furnace uses graphite heating, induction heating or resistive heating.
Description of drawings
Fig. 1 illustrates the schematic diagram of carborundum crystals high-temperature atmosphere annealing furnace;
Fig. 2, Fig. 3 are respectively 2 hours forward and backward rocking curve halfwidth distribution plans of 1350 ℃ of annealing of 2 inches nitrating 6H-SiC wafers of a slice;
Fig. 4, Fig. 5 are respectively 2 hours forward and backward rocking curve halfwidth distribution plans of 1450 ℃ of annealing of 2 inches nitrating 6H-SiC wafers of a slice;
Fig. 6, Fig. 7 are respectively 2 inches of a slices and mix 3 hours forward and backward rocking curve halfwidth distribution plans of 1450 ℃ of annealing of vanadium 6H-SiC wafer;
Nomenclature:
1 graphite heating body;
2 thermal insulation layers;
3 water cooling plants;
4 annealing the flat-temperature zone;
5 pressure regulating devices.
Embodiment
Further illustrate the present invention with reference to accompanying drawing and following embodiment, should be understood that accompanying drawing and/or following embodiment only are used for explanation the present invention, and unrestricted the present invention.
The structure of<annealing furnace 〉
The annealing furnace that the present invention uses can be the horizontal atmosphere annealing furnace of high vacuum, and annealing furnace can use graphite heating, induction heating or resistive heating.Temperature rise rate in annealing process, annealing temperature, annealing time and cooling rate have a significant impact the effect of annealing, therefore, select a suitable warming and cooling rate and annealing temperature etc. to annealing process, material impact to be arranged.In the present invention, temperature-controlled precision is at ± 3 ℃, provides annealing flat-temperature zone 4 greater than 40mm * 40mm * 60mm in annealing process, and the annealing furnace vacuum performance is good, and vacuum tightness is higher than 1 * 10 -2Pa can use different annealing atmospheres, and in annealing process, atmosphere pressures can be regulated.For example Fig. 1 illustrates the structural representation that uses graphite heating silicon carbide high-temperature atmosphere annealing furnace.It is mainly by several systems: temperature controlling system, and pressure control system, cooling system etc., each system can control by computer.Wherein temperature is controlled and can be used two row's graphite rods (graphite heating body) 1 to heat, and there is less thermograde the flat-temperature zone 4 that can guarantee to anneal, the internal temperature gradient of for example controlling annealing furnace be 3 ℃/below cm, preferred 1 ℃/below cm.Pressure control system is by pressure regulating device 5(stopping valve for example) be connected with the protectiveness source of the gas, can regulate pressure in annealing process, guarantee the balance of pressure.Perisporium at annealing furnace arranges thermal insulation layer 2 to keep the temperature of annealing flat-temperature zone 4.The below of annealing furnace also can arrange water cooling plant 3, by regulating the flow velocity of water cooling plant, can regulate cooling rate.
<annealing process 〉
The present invention carries out anneal by the SiC wafer to different thickness, reaches the unrelieved stress of eliminating the SiC wafer, reduces defect concentration, improves the wafer crystalline quality.Concrete annealing process can comprise the steps: the certain thickness SiC wafer (being called " through the silicon carbide wafer of preliminary working " herein) that is processed into through line cutting, barreling, polishing or other operations, put into plumbago crucible, can put into appropriate SiC raw material in plumbago crucible; Plumbago crucible is put into the reaction chamber (as shown in Figure 1) of high vacuum Horizental annealer, be filled with shielding gas to certain pressure after being evacuated to the certain vacuum degree by pressure regulating device 5; By graphite heating body 1, reaction chamber (annealing flat-temperature zone 4) is heated to specify annealing temperature, is incubated some hours, powered-down then, more slowly be down to room temperature, also can pass through water cooling plant 3 auxiliary temperature-reducings.
In above-mentioned annealing process, the lattice in the SiC crystal is at high temperature reset, and internal stress is discharged, and reaches the reduction defect concentration, improves the effect of wafer crystallization.
In the present invention, the wafer through preliminary working of annealing can be only to have carried out rough machined SiC wafer, can be also to have carried out the wafer of retrofit; The SiC crystal of annealing can be the carborundum crystals of various crystal formations, comprises 3C-SiC, 4H-SiC, 6H-SiC and 15R-SiC crystal; The SiC crystal of annealing can be the conductivity type crystal, can be also semi-insulating crystal; The wafer of annealing can be the SiC crystal of various size, comprises that thickness is 2 inches, 3 inches, 4 inches of 100 μ m~1cm or large-size crystals more.
In the present invention, can carry out simultaneously anneal to some wafers.In order to prevent the greying of SiC wafer in annealing process, can put into appropriate SiC raw material in the plumbago crucible bottom.
In the present invention, annealing furnace reaction chamber vacuum tightness reach≤1 * 10 -2After Pa, be filled with rare gas element such as high-purity argon gas or helium, perhaps other shielding gas hydrogen for example, pressure is 1~100,000 handkerchief, preferred 5~70,000 handkerchiefs, in order to control the stability of wafer in annealing process, force value remains constant in annealing process.
In the present invention, heating-cooling speed keeps 1~500 ℃/hour in time below 1000 ℃, keeps 1~400 ℃/hour during higher than 1000 ℃, again produces stress in order to prevent the SiC wafer in temperature-fall period, and generally rate of temperature fall is less than temperature rise rate.For example, at the temperature rise rate below 1000 ℃ preferred 200~400 ℃/hour, at the temperature rise rate more than 1000 ℃ preferred 120~300 ℃/hour, preferred 100~250 ℃/hour at the rate of temperature fall more than 1000 ℃, preferred 150~350 ℃/hour at the rate of temperature fall below 1000 ℃.
In the present invention, the annealing temperature of SiC wafer, namely the constant temperature holding temperature can be 1200 ℃~1800 ℃, preferred 1300~1500 ℃; The annealing time of SiC wafer can be 0.1~5 hour, preferred 2~3 hours.In order to guarantee that the SiC wafer at utmost discharges stress under the high temperature constant temperature state, should guarantee a temperature homogeneity in constant temperature zone, generally should guarantee the thermograde of flat-temperature zone≤3 ℃/cm, preferred≤1 ℃/cm.
The below further exemplifies embodiment to describe example synthesis technique of the present invention in detail.Should be understood that following embodiment is for the present invention is described better, and unrestricted the present invention.For example, although following embodiment shows concrete experiment condition parameter, should be understood that also this is only example, the processing parameter of method of the present invention can change in the scope shown in the present invention.Namely, for a person skilled in the art, when the aim that does not depart from claim and scope, the variation of multiple form and details can be arranged.
The anneal of embodiment 1:2 inch nitrating 6H-SiC wafer
The thickness of the two-sided chemically machinery polished 2 inches conduction 6H-SiC wafers that are 400 μ m are put into plumbago crucible inside, and crucible bottom is put into appropriate SiC raw material.Plumbago crucible is put into the cavity of annealing furnace, be evacuated to 1 * 10 -2Then Pa is filled with argon gas to 6 ten thousand handkerchiefs.Power-on was warmed up to 1000 ℃ with about four hours by room temperature with 250 ℃/h speed, and then rose to 1350 ℃ with 175 ℃/h speed, after constant temperature 2 hours, be down to 1000 ℃ with 150 ℃/h speed, then be down to room temperature with 200 ℃/h speed, then directly turn off power supply.
Referring to Fig. 2 and Fig. 3, it illustrates X ray rocking curve halfwidth face scintigram before and after the annealing of 1 pair of a slice nitrating 6H-SiC wafer of embodiment, can find out wherein shown in white arrow that after regional annealing, value of a half width all obviously descends, and crystalline quality is improved.As calculated, after this annealing of wafer, the zone of value of a half width between 0~30 second of arc increases 1.41%, illustrates that anneal has improved the crystalline quality of this wafer.
The anneal of embodiment 2:2 inch nitrating 6H-SiC wafer
The thickness of the two-sided chemically machinery polished 2 inches nitrating 6H-SiC wafers that are 400 μ m are put into plumbago crucible inside, and crucible bottom is put into appropriate SiC raw material.Plumbago crucible is put into the cavity of annealing furnace, be evacuated to 1 * 10 -2Then Pa is filled with argon gas to 6 ten thousand handkerchiefs.Power-on was warmed up to 1000 ℃ with about four hours by room temperature with 250 ℃/h speed, and then rose to 1450 ℃ with 175 ℃/h speed, after constant temperature 2 hours, be down to 1000 ℃ with 150 ℃/h speed, then be down to room temperature with 200 ℃/h speed, then directly turn off power supply.
Referring to Fig. 4 and Fig. 5, it illustrates X ray rocking curve halfwidth face scintigram before and after the annealing of 2 pairs of a slice nitrating 6H-SiC wafers of embodiment, after wherein zone shown in white arrow is annealing, value of a half width reduces, crystalline quality that namely should the zone improves, as calculated, after this annealing of wafer, the zone of value of a half width between 0~30 second of arc increases 1.02%, illustrates that anneal is greatly improved to the crystalline quality of SiC wafer.
The anneal that embodiment 3:2 inch is mixed vanadium 6H-SiC wafer
2 inches of the thickness 400 μ m of two-sided chemically machinery polished are mixed vanadium 6H-SiC wafer put into plumbago crucible inside, crucible bottom is put into appropriate SiC raw material.Plumbago crucible is put into the cavity of annealing furnace, be evacuated to 1 * 10 -2Then Pa is filled with argon gas to 6 ten thousand handkerchiefs.Power-on was warmed up to 1000 ℃ with about four hours by room temperature with 250 ℃/h speed, and then rose to 1450 ℃ with 175 ℃/h speed, after constant temperature 3 hours, be down to 1000 ℃ with 150 ℃/h speed, then be down to room temperature with 200 ℃/h speed, then directly turn off power supply.
Referring to Fig. 6 and Fig. 7, it illustrates 3 pairs of a slices of embodiment and mixes X ray rocking curve halfwidth face scintigram before and after the annealing of vanadium 6H-SiC wafer, the most of regional rocking curve value of a half width that can find out wafer reduces, as calculated, after this annealing of wafer, the zone of value of a half width between 0~30 second of arc increases 8.31%, illustrates that anneal has improved the crystalline quality of this wafer greatly.
Contrast the variation of the crystalline quality before and after the SiC annealing of wafer in above three embodiment, illustrate that the present invention can obviously improve the crystalline quality of SiC wafer.
Industrial applicability: the method for annealing of SiC wafer provided by the invention, have annealing temperature low, the time is short, and is lower to equipment requirements, easily implements in actually operating, and energy consumption is less, is fit to scale operation, has good industrial application prospect.

Claims (10)

1. the method for annealing of a silicon carbide wafer; it is characterized in that; comprise: will be placed in annealing furnace through the silicon carbide wafer of preliminary working; under the protection of rare gas element or reducing gas; slowly heat up 1~8 hour to 1200~1800 ℃ of annealing temperatures; this annealing temperature constant temperature insulation 0.1~5 hour, then slow cooling 1~10 hour was to room temperature.
2. method for annealing according to claim 1, is characterized in that, is warming up to 1000 ℃ with the first temperature rise rate, then is warming up to annealing temperature with the second temperature rise rate less than described the first temperature rise rate; Be cooled to 1000 ℃ with the first rate of temperature fall, then be cooled to room temperature with the second rate of temperature fall greater than described the first rate of temperature fall.
3. method for annealing according to claim 2, it is characterized in that, described the first temperature rise rate is below 500 ℃/hour, and described the second temperature rise rate is below 400 ℃/hour, described the first rate of temperature fall is below 400 ℃/hour, and described the second rate of temperature fall is below 500 ℃/hour.
4. the described method for annealing of any one according to claim 1~3, is characterized in that, in the constant temperature insulating process, the internal temperature gradient of described annealing furnace be 3 ℃/below cm.
5. the described method for annealing of any one according to claim 1~4, is characterized in that, in annealing process, chamber pressure is 1~100,000 handkerchief.
6. the described method for annealing of any one according to claim 1~5, is characterized in that, is cutting blade, surfacing sheet, single-sided polishing sheet or twin polishing sheet through the silicon carbide wafer of preliminary working.
7. the described method for annealing of any one according to claim 1~6, is characterized in that, is 100 μ m~1cm through the thickness of the silicon carbide wafer of preliminary working, is of a size of 2~6 inches.
8. the described method for annealing of any one according to claim 1~7, is characterized in that, is 3C-SiC, 6H-SiC, 4H-SiC or 15R-SiC through the crystal formation of the silicon carbide wafer of preliminary working.
9. the described method for annealing of any one according to claim 1~7, is characterized in that, is conductivity type or semi-insulating type through the silicon carbide wafer of preliminary working.
10. the described method for annealing of any one according to claim 1~9, is characterized in that, described annealing furnace uses graphite heating, induction heating or resistive heating.
CN2013100778846A 2013-03-12 2013-03-12 Method for annealing silicon carbide wafer Pending CN103114336A (en)

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Cited By (12)

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CN104357913A (en) * 2014-12-07 2015-02-18 中国电子科技集团公司第四十六研究所 High-temperature annealing treatment method for silicon carbide crystal
CN105463574A (en) * 2015-12-28 2016-04-06 北京世纪金光半导体有限公司 Method for preventing silicon carbide crystal ingot from fragmentation
CN105734673A (en) * 2016-04-26 2016-07-06 北京世纪金光半导体有限公司 Method for obtaining high machining precision of large silicon carbide single crystal wafer
CN106480504A (en) * 2016-12-09 2017-03-08 河北同光晶体有限公司 A kind of furnace rear method for annealing reducing great diameter SiC monocrystal internal stress
CN106637418A (en) * 2016-12-09 2017-05-10 河北同光晶体有限公司 Heat treatment method for SiC gemstone
CN106757357A (en) * 2017-01-10 2017-05-31 山东天岳晶体材料有限公司 A kind of preparation method of high-purity semi-insulating silicon carbide substrate
CN107698278A (en) * 2017-10-31 2018-02-16 湖北天宝光电科技有限公司 A kind of method for annealing of ceramic bonnet
CN108767103A (en) * 2018-05-29 2018-11-06 桂林电子科技大学 A kind of high-performance p-type α-MgAgSb base thermoelectricity materials and preparation method thereof
CN110863247A (en) * 2019-11-11 2020-03-06 中科钢研节能科技有限公司 Secondary annealing method for silicon carbide crystals
CN111074348A (en) * 2019-12-17 2020-04-28 山东天岳先进材料科技有限公司 Annealing treatment method and device for reducing internal stress of crystal
CN112846953A (en) * 2021-01-27 2021-05-28 深圳陶陶科技有限公司 Ceramic substrate and processing method and application thereof
CN113584596A (en) * 2021-06-25 2021-11-02 金华博蓝特电子材料有限公司 Annealing method for improving flatness of silicon carbide wafer

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Publication number Priority date Publication date Assignee Title
CN104357913A (en) * 2014-12-07 2015-02-18 中国电子科技集团公司第四十六研究所 High-temperature annealing treatment method for silicon carbide crystal
CN105463574A (en) * 2015-12-28 2016-04-06 北京世纪金光半导体有限公司 Method for preventing silicon carbide crystal ingot from fragmentation
CN105734673A (en) * 2016-04-26 2016-07-06 北京世纪金光半导体有限公司 Method for obtaining high machining precision of large silicon carbide single crystal wafer
CN106480504A (en) * 2016-12-09 2017-03-08 河北同光晶体有限公司 A kind of furnace rear method for annealing reducing great diameter SiC monocrystal internal stress
CN106637418A (en) * 2016-12-09 2017-05-10 河北同光晶体有限公司 Heat treatment method for SiC gemstone
CN106480504B (en) * 2016-12-09 2018-10-12 河北同光晶体有限公司 A kind of stove retrogressing ignition method reducing great diameter SiC monocrystal internal stress
CN106637418B (en) * 2016-12-09 2019-04-09 河北同光晶体有限公司 A kind of heat treatment method of SiC jewel
CN106757357A (en) * 2017-01-10 2017-05-31 山东天岳晶体材料有限公司 A kind of preparation method of high-purity semi-insulating silicon carbide substrate
CN106757357B (en) * 2017-01-10 2019-04-09 山东天岳先进材料科技有限公司 A kind of preparation method of high-purity semi-insulating silicon carbide substrate
CN107698278B (en) * 2017-10-31 2021-01-05 湖北天宝光电科技有限公司 Annealing method of ceramic rear cover
CN107698278A (en) * 2017-10-31 2018-02-16 湖北天宝光电科技有限公司 A kind of method for annealing of ceramic bonnet
CN108767103A (en) * 2018-05-29 2018-11-06 桂林电子科技大学 A kind of high-performance p-type α-MgAgSb base thermoelectricity materials and preparation method thereof
CN110863247A (en) * 2019-11-11 2020-03-06 中科钢研节能科技有限公司 Secondary annealing method for silicon carbide crystals
CN111074348A (en) * 2019-12-17 2020-04-28 山东天岳先进材料科技有限公司 Annealing treatment method and device for reducing internal stress of crystal
CN112846953A (en) * 2021-01-27 2021-05-28 深圳陶陶科技有限公司 Ceramic substrate and processing method and application thereof
CN113584596A (en) * 2021-06-25 2021-11-02 金华博蓝特电子材料有限公司 Annealing method for improving flatness of silicon carbide wafer

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Application publication date: 20130522