CN103092236B - Process deviation calibration method for absolute temperature coefficient current and system thereof - Google Patents
Process deviation calibration method for absolute temperature coefficient current and system thereof Download PDFInfo
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Abstract
The invention discloses a process deviation calibration method for PTAT (proportional to absolute temperature) current and a system thereof. The process deviation calibration method includes generating zero-temperature coefficient current and pre-calibrated PTAT current by a current-generation module; performing calibration on the pre-calibrated PTAT current according to the zero-temperature coefficient current. According to the technical scheme, the problem of process deviation of PTAT current is solved.
Description
Technical Field
The invention relates to the field of absolute temperature coefficient current, in particular to a method and a system for calibrating process deviation of absolute temperature coefficient current.
Background
There are two main types of on-chip reference currents, classified according to their dependence on temperature: one is a temperature independent current (zero temperature coefficient current, IZT for short) and the other is a current proportional to absolute temperature (absolute temperature coefficient current or PTAT current or IPTAT: current that is proportional to absolute temperature). These two temperature coefficient currents are widely used on-chip, especially on-chip radio frequency transceiver chips. Simulations and tests have demonstrated that for some circuits whose performance is temperature dependent, the performance at high and low temperatures can be improved with a PTAT current with a suitable temperature coefficient, but the variation of the absolute current value of the PTAT current with process angle (corner variations) is large compared to IZT, and for some processes this variation is even as high as +/-20% (mainly limited to the process variation of on-chip passive devices); IZT has a relatively small deviation from the process angle, and is generally negligible. The process deviation of the PTAT current may cause great uncertainty in the overall power consumption and performance of a circuit module using the PTAT current as a reference current, and the existence of the uncertainty is related to the power consumption, performance, yield and the like of a chip. Therefore, how to overcome the process deviation of the PTAT current is an urgent technical problem to be solved while optimizing the high and low temperature performance of the circuit by using the temperature coefficient of the PTAT current.
Disclosure of Invention
The invention provides a method and a system for calibrating process deviation of a PTAT current, which solve the problem of process deviation of the PTAT current.
In order to solve the technical problems, the invention adopts the following technical scheme:
a method for calibrating process deviation of absolute temperature coefficient current comprises the following steps:
the current generation module generates zero temperature coefficient current and absolute temperature coefficient current before calibration;
and calibrating the absolute temperature coefficient current before calibration by using the zero temperature coefficient current.
The method for calibrating the absolute temperature coefficient current before calibration by using the zero temperature coefficient current specifically comprises the following steps:
a calibration stage: the first current mirror module converts the absolute temperature coefficient current before calibration generated by the current generation module into a first reference current according to the value of the control word; the second current mirror module with the same structure as the first current mirror module converts the zero-temperature-coefficient current generated by the current generation module into a second reference current;
comparing the first reference current with the second reference current, and updating the value of the control word according to the comparison result until the difference value between the first reference current and the second reference current output by the first current mirror module according to the updated value of the control word is within a preset range, and determining the final value of the control word;
the working stage is as follows: and the first current mirror module converts the absolute temperature coefficient current before calibration generated by the current generation module into the absolute temperature coefficient current after calibration according to the final value of the control word and outputs the absolute temperature coefficient current after calibration.
The method for comparing the magnitudes of the first reference current and the second reference current specifically comprises the following steps:
converting the first reference current into a first reference voltage through a preset first resistor;
the second reference current flows through a preset second resistor which is the same as the first resistor, and is converted into a second reference voltage;
comparing the first reference voltage with the second reference voltage through a comparator;
and outputting a high-level or low-level judgment signal according to the comparison result.
The method for updating the value of the control word according to the comparison result specifically comprises the following steps: and updating the value of the control word by adopting a binary search method according to the judgment signal of the high level or the low level.
Further comprising saving a final value of the control word in a non-volatile memory; and a working phase, wherein the final value of the control word is read from the nonvolatile memory in advance.
A process deviation calibration system of absolute temperature coefficient current comprises a current generation module and a calibration module, wherein,
the current generation module is used for generating zero temperature coefficient current and absolute temperature coefficient current before calibration;
the calibration module is used for calibrating the absolute temperature coefficient current before calibration by using the zero temperature coefficient current generated by the current generation module.
The calibration module comprises a first current mirror module, a second current mirror module and a control word update module, wherein,
the first current mirror module is used for converting the absolute temperature coefficient current before calibration generated by the current generation module into a first reference current according to the value of the control word; converting the absolute temperature coefficient current before calibration generated by the current generation module into the absolute temperature coefficient current after calibration according to the final value of the control word determined by the control word updating module, and outputting the absolute temperature coefficient current after calibration;
the second current mirror module is used for converting the zero temperature coefficient current generated by the current generation module into a second reference current in a calibration stage;
the control word updating module is used for comparing the first reference current with the second reference current in a calibration stage, and updating the value of the control word according to a comparison result until the difference value between the first reference current and the second reference current output by the first current mirror module according to the updated value of the control word is within a preset range, so as to determine the final value of the control word.
The first current mirror module includes a first current-to-voltage conversion circuit and a first voltage-to-current conversion circuit, wherein,
the first current-to-voltage conversion circuit is used for converting the absolute temperature coefficient current generated by the current generation module before calibration into a first intermediate voltage;
the first voltage-to-current conversion circuit is used for converting a first intermediate voltage converted by the first current-to-voltage conversion circuit into a first reference current according to the value of a control word in a calibration stage; and the current generation module is also used for converting the absolute temperature coefficient current before calibration generated by the current generation module into the absolute temperature coefficient current after calibration according to the final value of the control word determined by the control word updating module in the working stage and outputting the absolute temperature coefficient current after calibration.
The second current mirror module includes a second current-to-voltage conversion circuit and a second voltage-to-current conversion circuit, wherein,
the second current-to-voltage conversion circuit is used for converting the zero temperature coefficient current generated by the current generation module into a second intermediate voltage in a calibration stage;
the second voltage-to-current conversion circuit is used for converting a second intermediate voltage converted by the second current-to-voltage conversion circuit into a second reference current in the calibration stage.
The control word updating module comprises a first resistor, a second resistor which is the same as the first resistor, a comparator and a digital algorithm module; one end of the first resistor is grounded, and the other end of the first resistor is connected between the output end of the first current mirror module and the input end of the comparator; one end of the second resistor is grounded, and the other end of the second resistor is connected between the output end of the second current mirror module and the other input end of the comparator; the digital algorithm module is connected between the output end of the comparator and the input end of the first current mirror module; wherein
The first resistor is used for converting the first reference current into a first reference voltage;
the second resistor is used for converting the second reference current into a second reference voltage;
the comparator is used for comparing the first reference voltage with the second reference voltage and outputting a high-level or low-level judgment signal according to a comparison result.
The digital algorithm module is used for updating the value of the control word according to the judgment signal output by the comparator until the difference value between the first reference current and the second reference current output by the first current mirror module according to the updated value of the control word is within a preset range, and determining the final value of the control word.
The calibration module further comprises a first switch and a second switch; the first switch is connected between the output end of the first current mirror module and the other end of the first resistor; the second switch is connected between the output end of the first current mirror module and a normal application circuit; the first switch is closed, and the second switch is opened, so that the calibration stage is performed; the first switch is turned off, and the second switch is turned on in a working stage.
The calibration circuit further comprises a non-volatile memory; the nonvolatile memory is connected with the digital algorithm module and the input end of the first current mirror module; the digital algorithm module is used for saving the final value of the control word in the nonvolatile memory; the nonvolatile memory is used for saving the final value of the control word; the first current mirror module is used for acquiring the final value of the control word from the nonvolatile memory before the absolute temperature coefficient current generated by the current generation module before calibration is calibrated according to the final value of the control word.
The invention provides a method and a system for calibrating the process deviation of PTAT current, wherein the process deviation of IZT is very small and can be approximately ignored, and the PTAT current which contains a PTAT temperature coefficient and has approximately the same process deviation as IZT can be obtained by utilizing IZT to calibrate the PTAT current.
Furthermore, for most chips, in order to generate a relatively accurate IZT, a single pin and an off-chip resistor connected with the pin are generally required to be arranged on the chip, the technical scheme of the invention for calibrating the PTAT current by using IZT does not need to repeatedly arrange additional chip pins and auxiliary elements, and the multiplexing of components is realized;
furthermore, only when the chip leaves a factory, determining a final value of the control word according to the zero temperature coefficient current generated by the current generation module and the PTAT current before calibration, writing the final value into the nonvolatile memory for storage, directly reading the final value of the control word from the nonvolatile memory when the chip is normally used, and generating the PTAT current after calibration according to the final value of the control word;
furthermore, the calibration circuit provided by the invention has a simple structure and is easy to implement, and can work in a calibration mode and a normal application mode. In the normal application mode, the final value of the control word is directly read from the nonvolatile memory to generate a calibrated PTAT current, and the calibrated PTAT current is input to a corresponding circuit module on the chip through the control of the second switch to carry out normal application.
Drawings
FIG. 1 is a flow chart of a method for calibrating process variation of PTAT current in accordance with an embodiment of the present invention;
FIG. 2 is a flow chart of a method for calibrating process variation of PTAT current in accordance with another embodiment of the present invention;
FIG. 3 is a block diagram of a PTAT current process bias calibration system in accordance with one embodiment of the present invention;
fig. 4 is a flow chart of a method of operation of the system shown in fig. 3.
Detailed Description
Fig. 1 is a flowchart of a process deviation calibration method for PTAT current according to an embodiment of the present invention, please refer to fig. 1:
s11, the current generation module generates zero temperature coefficient current (IZT, current with zero temperature coefficient) and absolute temperature coefficient current (PTAT current or IPTAT, current which is positive to absolute temperature coefficient) before calibration;
and S12, calibrating the PTAT current before calibration by using the IZT current.
The calibration system involved in this embodiment comprises a current generation module and a calibration module, wherein the current generation module is used for generating IZT current and PTAT current before calibration; the calibration module is used for calibrating the PTAT current before calibration by using the IZT current generated by the current generation module.
The current generation module generates IZT current and the PTAT current before calibration using existing techniques. Preferably, the current generation module comprises a BandGap reference circuit and an IZT current generation circuit, the PTAT current is directly generated by the BandGap reference circuit (BandGap), and the resistors used in the PTAT current are all on-chip resistors; the band-gap reference circuit outputs a voltage VBG which is independent of temperature and accurate to the IZT current generating circuit, and the IZT current generating circuit generates IZT current by utilizing the voltage VBG and an off-chip resistor with higher accuracy.
The method for calibrating the PTAT current before calibration by using the IZT current includes various methods, and the invention is further described in detail by the following detailed description in conjunction with the accompanying drawings.
Fig. 2 is a flowchart illustrating a method for calibrating process variation of PTAT current according to another embodiment of the present invention, please refer to fig. 2:
s21, the current generation module generates IZT current and PTAT current before calibration;
a calibration stage:
s22, the first current mirror module converts the PTAT current before calibration generated by the current generation module into a first reference current Ix according to the value of the control word; the second current mirror module with the same structure as the first current mirror module converts IZT current generated by the current generation module into second reference current Iref;
s23, comparing the first reference current Ix with the second reference current Iref, updating the value of the control word according to the comparison result, and repeating the step S22 according to the updated value of the control word. Until the difference between the first reference current Ix and the second reference current Iref output by the first current mirror module according to the updated value of the control word is within a preset range. Preferably, the preset range is 1% of the second reference current Iref.
S24, taking the value of the control word according to the difference value between the first reference current Ix and the second reference current Iref in the preset range as the final value of the control word;
the working stage is as follows:
and S25, converting the PTAT current before calibration generated by the current generation module into the PTAT current after calibration by the first current mirror module according to the final value of the control word, and outputting the PTAT current after calibration.
Preferably, step S24 further includes saving the final value of the control word in a non-volatile memory; the final value of the control word is read from the nonvolatile memory in advance in step S25.
The calibration system of the embodiment comprises a current generation module and a calibration module, wherein the current generation module is used for generating IZT current and PTAT current before calibration; the calibration module is used for calibrating the PTAT current before calibration by using the IZT current generated by the current generation module. The calibration module comprises a first current mirror module, a second current mirror module and a control word updating module, wherein the first current mirror module is used for converting the PTAT current before calibration generated by the current generation module into a first reference current Ix according to the value of the control word; in the working stage, the PTAT current generated by the current generation module before calibration is converted into the PTAT current after calibration according to the final value of the control word determined by the control word updating module, and the PTAT current is output; the second current mirror module is used for converting the IZT current generated by the current generation module into a second reference current Iref in a calibration stage; the control word updating module is used for comparing the first reference current Ix and the second reference current Iref in the calibration stage, and updating the value of the control word according to the comparison result until the difference value between the first reference current Ix and the second reference current Iref, which is output by the first current mirror module according to the updated value of the control word, is within a preset range, so as to determine the final value of the control word.
Fig. 3 is a block diagram of a process variation calibration system for PTAT current according to an embodiment of the present invention, please refer to fig. 3:
a process deviation calibration system of PTAT current comprises a current generation module 1 and a calibration module, wherein the calibration module of the embodiment is specifically a calibration circuit 2, wherein the current generation module 1 is used for generating IZT current and PTAT current before calibration; the calibration circuit 2 is used for performing calibration by using IZT current generated by the current generation module 1 and PTAT current before calibration;
the calibration circuit 2 includes a first current mirror module 21, a second current mirror module 22, a control word update module 23, a first switch S1, a second switch S2 and a non-volatile memory 24, the first current mirror module 21 includes a first current-to-voltage conversion circuit 211 and a first voltage-to-current conversion circuit 212, the second current mirror module 22 includes a second current-to-voltage conversion circuit 221 and a second voltage-to-current conversion circuit 222, the control word update module 23 includes a first resistor R1, a second resistor R2 identical to the first resistor R1, a comparator 231 and a digital algorithm module 232, specifically:
the first current-to-voltage conversion circuit 211 is connected between the current generating module 1 and an input terminal of the first voltage-to-current conversion circuit 212, an output terminal of the first voltage-to-current conversion circuit 212 (i.e., an output terminal of the first current mirror module 21) is connected to an input terminal of the comparator 231 through the first switch S1, and is connected to the normal application circuit through the second switch S2, one end of the first resistor R1 is grounded, and the other end is connected between the first switch S1 and the input terminal of the comparator 231; the second current-to-voltage conversion circuit 221 is connected between the current generating module 1 and the input terminal of the second voltage-to-current conversion circuit 222, the output terminal of the second voltage-to-current conversion circuit 222 (i.e., the output terminal of the second current mirror module 22) is connected to the other input terminal of the comparator 231, one end of the second resistor R2 is grounded, and the other end is connected between the output terminal of the second voltage-to-current conversion circuit 222 and the other input terminal of the comparator 231; the digital algorithm module 232 is connected between the output of the comparator 231 and the input of the first voltage-to-current conversion circuit 212; the nonvolatile memory 24 is connected with the digital algorithm module 232 and the input end of the first voltage-to-current conversion circuit 212; if the calibration phase is entered, the first switch S1 is closed and the second switch S2 is open; if the working stage is entered, the first switch S1 is opened and the second switch S2 is closed; wherein,
the first current-to-voltage conversion circuit 211 is configured to convert the pre-calibration PTAT current generated by the current generation module 1 into a first intermediate voltage V1; the first voltage-to-current conversion circuit 212 is configured to convert the first intermediate voltage V1 converted by the first current-to-voltage conversion circuit 211 into the first reference current Ix according to the value of the control word during the calibration phase; the current generation module is further configured to, in the working phase, obtain a final value of the control word from the nonvolatile memory 24, convert the PTAT current before calibration generated by the current generation module 1 into a PTAT current after calibration according to the final value of the control word, and output the PTAT current;
the second current-to-voltage conversion circuit 221 is configured to convert the IZT current generated by the current generation module 1 into a second intermediate voltage V2 in the calibration phase; the second voltage-to-current conversion circuit 222 is configured to convert the second intermediate voltage V2 converted by the second current-to-voltage conversion circuit 221 into a second reference current Iref in the calibration phase;
the first resistor R1 is used for converting the first reference current Ix into a first reference voltage Vx;
the second resistor R2 is used for converting the second reference current Iref into a second reference voltage Vref;
the comparator 231 is configured to compare the first reference voltage Vx with the second reference voltage Vref in the calibration stage, and output a high-level or low-level determination signal to the digital algorithm module 232 according to the comparison result;
the digital algorithm module 232 is configured to update the value of the control word according to the determination signal output by the comparator 231 until a difference between a first reference current Ix and the second reference current Iref, which are output by the first voltage-to-current conversion circuit 212 according to the updated value of the control word, is within a preset range, and determine a final value of the control word; saving the final value of the control word in non-volatile memory 24;
the non-volatile memory 24 is used to store the final value of the control word determined by the digital algorithm module 232.
The digital algorithm module 232 may be coupled to the non-volatile memory 24 using an SPI bus.
Fig. 4 is a flowchart of a working method of the system shown in fig. 3, please refer to fig. 4:
s41, the current generation module 1 generates IZT current and PTAT current before calibration;
s42, judging the mode, if the mode is the calibration mode, namely entering the calibration stage, closing the first switch S1, opening the second switch S2, and entering the step S32; if the mode is the operation mode, i.e. the operation stage is entered, the first switch S1 is opened, the second switch S2 is closed, and the process proceeds to step S48.
S43, the first current-to-voltage converting circuit 211 converts the pre-calibration PTAT current generated by the current generating module 1 into a first intermediate voltage V1; the first voltage-to-current conversion circuit 212 converts the first intermediate voltage V1 into which the first current-to-voltage conversion circuit 211 converts into the first reference current Ix according to the value of the control word; the first reference current Ix flows through a first resistor R1 and is converted into a first reference voltage Vx;
s44, the second current-to-voltage converting circuit 221 converts the IZT current generated by the current generating module 1 into a second intermediate voltage V2; the second voltage-to-current conversion circuit 222 converts the second intermediate voltage V2 converted by the second current-to-voltage conversion circuit 221 into a second reference current Iref; the second reference current Iref flows through the second resistor R2 and is converted into a second reference voltage Vref;
s45, comparing the first reference voltage Vx with the second reference voltage Vref by the comparator 231, and outputting a determination signal Cmp _ out to the digital algorithm module 232 according to the comparison result;
the comparator 231 of the embodiment can be implemented by an open-loop high-gain operational amplifier, and when Cmp _ out is at a high level, Vx is greater than Vref, otherwise Vx is less than Vref; theoretically, a situation that Vx is Vref may occur during comparison, but actually, such a probability is almost 0, because a comparator implemented by an open-loop high-gain operational amplifier assumes that the gain of the operational amplifier is 1000 times, the power supply voltage is 1.2V, and as long as the difference between two ends of the input of the comparator is more than 1mV, the difference between the outputs of the comparator is more than 1mV × 1000 to 1V, which is enough to form a definite output logic level 0 or 1. An offset voltage may exist in an actual comparator, and a condition that Vx is Vref may occur with a very small probability, but a determination signal Cmp _ out output by the comparator is not an intermediate state but a logic 0, or a logic 1, specifically 0 or 1, which is determined by the offset voltage of the comparator, and different chips may be different;
s46, the digital algorithm module 232 updates the value of the control word by adopting a binary search method according to the judgment signal output by the comparator 231, and repeatedly executes the step S43;
and S47, finishing the binary search method, wherein the final result of the algorithm execution is that Vx is approximately equal to Vref, and the final value of the control word is determined according to the value of the control word when Vx is approximately equal to Vref and is stored in the nonvolatile memory 24.
In the execution of the binary search method, assuming that Vx ≈ Vref occurs with a very small probability, since the output of the comparator 321 is not an intermediate state, but a logic 0 or a logic 1, the logic 0 or the logic 1 of the output of the comparator will cause the algorithm to go along different paths, but will eventually converge to Vx ≈ Vref.
S48, the first voltage to current conversion circuit 212 obtains the final value of the control word from the non-volatile memory 24;
s49, the first voltage-to-current conversion circuit 212 calibrates the PTAT current generated by the current generation module 1 before calibration according to the final value of the control word, and outputs the PTAT current after calibration.
Preferably, the first current mirror module 21 and the second current mirror module 22 have the same structure, and the first current-to-voltage conversion circuit 211 constituting the first current mirror module and the second current-to-voltage conversion circuit 221 constituting the second current mirror module may be identical circuits, so as to achieve good matching in chip layout. The difference between the first voltage-to-current conversion circuit 212 constituting the first current mirror module 21 and the second voltage-to-current conversion circuit 222 constituting the second current mirror module 22 may be almost the same circuit, and good matching is achieved in terms of chip layout arrangement, in that the first voltage-to-current conversion circuit 212 is a circuit with variable output current, the output current of which is controlled by a control word, and the first voltage-to-current conversion circuit 212 may be simplified to a circuit identical to the second voltage-to-current conversion circuit 222 under the condition of a default control word value; according to the characteristics of the current mirror, a simple proportional relationship exists between the second reference current Iref obtained after conversion by the second current mirror module 22 and the IZT current generated by the current generation module 1 before conversion, the proportional coefficient is a fixed value, and a simple proportional relationship also exists between the first reference current Ix obtained after conversion by the first current mirror module 21 and the PTAT current before conversion, and the proportional coefficient is only variable and is adjusted by a control word.
Preferably, the first resistor R1 and the second resistor R2 are two same on-chip resistors, and have the same resistance, preferably, besides the same resistance, the same shape and type can be realized, good matching can be realized on chip layout arrangement, and the two resistors can be closely arranged together, even if process deviation exists in absolute resistance of the two resistors, the ratio of the resistance of the two resistors can be exactly 1, so that the sizes of the first reference voltage Vx and the second reference voltage Vref directly reflect the sizes of Ix and Iref. When Vx is approximately equal to Vref, Ix is approximately equal to Iref, because Iref is obtained by multiplying IZT by a proportionality coefficient and is current with small process deviation, Ix is approximately equal to Iref after the binary search method is executed, the calibrated PTAT current has approximately the same process deviation with IZT current, the process deviation is small and can be ignored, and meanwhile, because the calibrated PTAT current is still a multiple of the PTAT current before calibration and only the current value changes, the temperature coefficient is still consistent with the PTAT current before calibration.
The process variation of the PTAT current is mainly caused by the process variation of the on-chip passive devices that generate the current. Therefore, the PTAT current process deviation calibration method and the PTAT current process deviation calibration system provided by the invention are essentially used for calibrating the process deviation of the on-chip passive device. The final value of the control word obtained in the calibration process reflects the process deviation information of the passive device on the chip generating the PTAT current, and the two have one-to-one correspondence. Then, a group of control bits can be made adjustable by using the same type of passive devices at any place in the chip, the final value of the control word obtained in the PTAT current calibration process is read, and the group of control bits is controlled to realize the correction of the process deviation of the passive devices.
The foregoing is a more detailed description of the present invention that is presented in conjunction with specific embodiments, and the practice of the invention is not to be considered limited to those descriptions. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (12)
1. A method for calibrating process deviation of absolute temperature coefficient current is characterized by comprising the following steps:
the current generation module generates zero temperature coefficient current and absolute temperature coefficient current before calibration;
and calibrating the absolute temperature coefficient current before calibration by using the zero temperature coefficient current.
2. The method according to claim 1, wherein the method for calibrating the absolute temperature coefficient current before calibration by using the zero temperature coefficient current specifically comprises:
a calibration stage: the first current mirror module converts the absolute temperature coefficient current before calibration generated by the current generation module into a first reference current according to the value of the control word; the second current mirror module with the same structure as the first current mirror module converts the zero-temperature-coefficient current generated by the current generation module into a second reference current;
comparing the first reference current with the second reference current, and updating the value of the control word according to the comparison result until the difference value between the first reference current and the second reference current output by the first current mirror module according to the updated value of the control word is within a preset range, and determining the final value of the control word;
the working stage is as follows: and the first current mirror module converts the absolute temperature coefficient current before calibration generated by the current generation module into the absolute temperature coefficient current after calibration according to the final value of the control word and outputs the absolute temperature coefficient current after calibration.
3. The method of claim 2, wherein comparing the magnitudes of the first reference current and the second reference current is performed by:
converting the first reference current into a first reference voltage through a preset first resistor;
the second reference current flows through a preset second resistor which is the same as the first resistor, and is converted into a second reference voltage;
comparing the first reference voltage with the second reference voltage through a comparator;
and outputting a high-level or low-level judgment signal according to the comparison result.
4. A method according to claim 3, wherein the method of updating the value of the control word in dependence on the comparison result is embodied by: and updating the value of the control word by adopting a binary search method according to the judgment signal of the high level or the low level.
5. The method of claim 2, further comprising saving a final value of the control word in a non-volatile memory; and a working phase, wherein the final value of the control word is read from the nonvolatile memory in advance.
6. A process deviation calibration system of absolute temperature coefficient current is characterized by comprising a current generation module and a calibration module, wherein,
the current generation module is used for generating zero temperature coefficient current and absolute temperature coefficient current before calibration;
the calibration module is used for calibrating the absolute temperature coefficient current before calibration by using the zero temperature coefficient current generated by the current generation module.
7. The system of claim 6, wherein the calibration module comprises a first current mirror module, a second current mirror module, and a control word update module, wherein,
the first current mirror module is used for converting the absolute temperature coefficient current before calibration generated by the current generation module into a first reference current according to the value of the control word; converting the absolute temperature coefficient current before calibration generated by the current generation module into the absolute temperature coefficient current after calibration according to the final value of the control word determined by the control word updating module, and outputting the absolute temperature coefficient current after calibration;
the second current mirror module is used for converting the zero temperature coefficient current generated by the current generation module into a second reference current in a calibration stage;
the control word updating module is used for comparing the first reference current with the second reference current in a calibration stage, and updating the value of the control word according to a comparison result until the difference value between the first reference current and the second reference current output by the first current mirror module according to the updated value of the control word is within a preset range, so as to determine the final value of the control word.
8. The system of claim 7, wherein the first current mirror module comprises a first current-to-voltage conversion circuit and a first voltage-to-current conversion circuit, wherein,
the first current-to-voltage conversion circuit is used for converting the absolute temperature coefficient current generated by the current generation module before calibration into a first intermediate voltage;
the first voltage-to-current conversion circuit is used for converting a first intermediate voltage converted by the first current-to-voltage conversion circuit into a first reference current according to the value of a control word in a calibration stage; and the current generation module is also used for converting the absolute temperature coefficient current before calibration generated by the current generation module into the absolute temperature coefficient current after calibration according to the final value of the control word determined by the control word updating module in the working stage and outputting the absolute temperature coefficient current after calibration.
9. The system of claim 7, wherein the second current mirror module comprises a second current-to-voltage conversion circuit and a second voltage-to-current conversion circuit, wherein,
the second current-to-voltage conversion circuit is used for converting the zero temperature coefficient current generated by the current generation module into a second intermediate voltage in a calibration stage;
the second voltage-to-current conversion circuit is used for converting a second intermediate voltage converted by the second current-to-voltage conversion circuit into a second reference current in the calibration stage.
10. The system of claim 7, wherein the control word update module comprises a first resistor, a second resistor that is the same as the first resistor, a comparator, and a digital algorithm module; one end of the first resistor is grounded, and the other end of the first resistor is connected between the output end of the first current mirror module and the input end of the comparator; one end of the second resistor is grounded, and the other end of the second resistor is connected between the output end of the second current mirror module and the other input end of the comparator; the digital algorithm module is connected between the output end of the comparator and the input end of the first current mirror module; wherein
The first resistor is used for converting the first reference current into a first reference voltage;
the second resistor is used for converting the second reference current into a second reference voltage;
the comparator is used for comparing the first reference voltage with the second reference voltage and outputting a high-level or low-level judgment signal according to a comparison result;
the digital algorithm module is used for updating the value of the control word according to the judgment signal output by the comparator until the difference value between the first reference current and the second reference current output by the first current mirror module according to the updated value of the control word is within a preset range, and determining the final value of the control word.
11. The system of claim 10, wherein the calibration module further comprises a first switch and a second switch; the first switch is connected between the output end of the first current mirror module and the other end of the first resistor; the second switch is connected between the output end of the first current mirror module and a normal application circuit; the first switch is closed, and the second switch is opened, so that the calibration stage is performed; the first switch is turned off, and the second switch is turned on in a working stage.
12. The system of any of claims 7 to 11, wherein the calibration module further comprises a non-volatile memory; the nonvolatile memory is used for saving the final value of the control word; the first current mirror module is used for acquiring the final value of the control word from the nonvolatile memory before the absolute temperature coefficient current generated by the current generation module before calibration is calibrated according to the final value of the control word.
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| CN201110331764.5A CN103092236B (en) | 2011-10-27 | 2011-10-27 | Process deviation calibration method for absolute temperature coefficient current and system thereof |
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| CN201110331764.5A CN103092236B (en) | 2011-10-27 | 2011-10-27 | Process deviation calibration method for absolute temperature coefficient current and system thereof |
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| US8624661B2 (en) * | 2006-12-22 | 2014-01-07 | Texas Instruments Incorporated | Method and circuit for curvature correction in bandgap references with asymmetric curvature |
| CN100593768C (en) * | 2007-12-05 | 2010-03-10 | 西安标新电子科技有限责任公司 | Circuit outputting adjustable positive and negative or zero-temperature coefficient electrical current and voltage reference |
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