CN103078299A - Phase-shift controlled full-bridge half-cycle trip protection circuit and control method thereof - Google Patents
Phase-shift controlled full-bridge half-cycle trip protection circuit and control method thereof Download PDFInfo
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- CN103078299A CN103078299A CN2013100106073A CN201310010607A CN103078299A CN 103078299 A CN103078299 A CN 103078299A CN 2013100106073 A CN2013100106073 A CN 2013100106073A CN 201310010607 A CN201310010607 A CN 201310010607A CN 103078299 A CN103078299 A CN 103078299A
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Abstract
The invention discloses a phase-shift controlled full-bridge half-cycle trip protection circuit and a control method thereof. The circuit comprises a DSP (digital signal processor) and four dual-input AND gates, wherein second input ends of the four dual-input AND gates are connected together and are connected with a fifth PWM (Pulse-Width Modulation) signal PWME of the DSP, the other ends of the four dual-input AND gates are respectively connected with the other four PWM signals of the DSP, and the output signals of the four dual-input AND gates are used for driving four power switch tubes of the full-bridge circuit; and the fifth PWM signal PWME is a locking signal of the four dual-input AND gates. According to the control method, half-cycle effective trip protection can be realized through the circuit, and the phenomenon of bias magnet brought by single-cycle protection is completely eradicated. The circuit is simple and practical, the phenomenon that four PWM signals are still in pairwise opposite compensation when a trip signal of a DSP phase-shift control method is generated is effectively removed, and the requirement that the four PWM signals for trip protection are all closed is met.
Description
Technical field
The present invention relates to the switch power technology field of phase shifting control, be specifically related to a kind of full-bridge half period trip protection circuit and control method thereof of phase shifting control.
Background technology
Phase-shifting full-bridge is the normal power supply topologies that adopts of middle high-power DC power supply; TI 2000 series DSP processors are control chips commonly used in the digitlization power supply control chip; has easily phase shifting control scheme; oppositely export control by pwm signal band dead band; can produce easily the 4 road pwm signals required to the full-bridge circuit phase shifting control; and stop to occur with the straight-through phenomenon of brachium pontis; but this pwm signal trip protection or need to close PWM when output; can occur with the complementary phenomenon of brachium pontis pwm signal; namely always there is a pwm signal to be in opening state with brachium pontis; under the malfunction that requires; the pwm signal Close All is not inconsistent, and certain limitation is arranged in actual use.Monocycle trip protection control mode commonly used is when system's over-current signal produces in addition; pwm signal keeps closing until next pwm signal cycle starting point; when the overcurrent signal when first produces in cycle; pwm signal closes to close and causes transformer current to only have half-wave to occur; produce asymmetric electric current, bring the slight bias phenomenon of transformer, this is when being made as current-limiting protection with guard signal; protection can cause higher current spike continuously, and power device is produced damage.
Summary of the invention
The object of the present invention is to provide a kind of full-bridge half period trip protection circuit and control method of phase shifting control; when using phase-shift control mode to solve full-bridge circuit; when the PWM trip signal produces; 4 road pwm signals still keep in twos reverse complemental; the slight bias phenomenon that the problem of not closing fully and monocycle trip protection bring, this circuit is simple and reliable, control is convenient, easily realization.
The present invention is for achieving the above object, and the technical scheme that adopts is as follows:
A kind of full-bridge half period trip protection circuit of phase shifting control, it comprises dsp processor, the first dual input and door, the second dual input and door, the 3rd dual input and door and the 4th dual input and door; Export 5 road DSP pwm signals: the first pwm signal PWMA, the second pwm signal PWMB, the 3rd pwm signal PWMC, the 4th pwm signal PWMD, the 5th pwm signal PWME, the first dual input and door, the second dual input and door, the 3rd dual input and door and the 4th dual input all link together with the second input of door, and are connected the 5th pwm signal PWME connection with dsp processor; The first input end of described the first dual input and door be connected pwm signal PWMA and be connected, the first input end of the second dual input and door be connected pwm signal PWMB and be connected, the 3rd dual input is connected with the 3rd pwm signal PWMC with the first input end of door, and the 4th dual input is connected with the 4th pwm signal PWMD with the first input end of door; Described the first pwm signal PWMA, the second pwm signal PWMB, the 3rd pwm signal PWMC and the 4th pwm signal PWMD are used for driving 4 power switch pipes of full-bridge circuit; Described the 5th pwm signal PWME is the locking signal of 4 dual inputs and door; Described 4 dual inputs and the pwm signal of door for 4 power switch pipes of locking when full-bridge circuit overcurrent or the system failure; Described the 5th pwm signal PWME is a PWM output signal synchronous with the first pwm signal PWMA, and the cycle of the 5th pwm signal PWME is half of the first pwm signal PWMA.
Described 4 dual inputs and the pwm signal of door for 4 power switch pipes of locking when full-bridge circuit overcurrent or the system failure.
Described dual input adopts with door or door, dual input or many inputs form with door, NAND gate and NOR gate, or adopts CPLD, FPGA hardware to realize.
Described the first pwm signal PWMA, the second pwm signal PWMB, the 3rd pwm signal PWMC, the 4th pwm signal PWMD are combined into the waveform output of phase-shift control mode; Wherein the second pwm signal PWMB is oppositely exported by the first pwm signal PWMA and obtains, and the 4th pwm signal PWMD is oppositely exported by the 3rd pwm signal PWMC and obtains.
As preferably, described the first pwm signal PWMA, the second pwm signal PWMB, the 3rd pwm signal PWMC, the 4th pwm signal PWMD, the 5th pwm signal PWME can select the dsp processor of TI 2000 series to produce.
The control method that is used for the full-bridge half period trip protection circuit of above-mentioned a kind of phase shifting control is: when full-bridge circuit overcurrent or the system failure, described the 5th pwm signal PWME is output as low level, 4 dual inputs detect this low level with door and then lock for 4 pwm signals that drive 4 switching tubes of full-bridge circuit: the first pwm signal PWMA, the second pwm signal PWMB, the 3rd pwm signal PWMC and the 4th pwm signal PWMD, when namely the 5th pwm signal PWME was output as low level, 4 dual inputs were low level with door output;
When full-bridge circuit overcurrent and system failure recovery normal operation, the 5th pwm signal PWME recovers high level output at cycle starting point or the mid point of the first pwm signal PWMA, export with the signal of door thereby recover 4 dual inputs, realize that the half period locks the output control of the first pwm signal PWMA, the second pwm signal PWMB, the 3rd pwm signal PWMC and the 4th pwm signal PWMD.
Compare with the prior art scheme, the present invention has the following advantages and technique effect:
1, circuit is simple and practical, and efficient solution when producing except the trip signal of DSP phase-shifting control method 4 road pwm signals still keep the in twos phenomenon of reverse complemental, reach the purpose of 4 road PWM Close Alls;
2, improved the pwm signal control of DSP trip protection, can realize closing the practical application of more fitting fully to pwm signal;
3, by adopting half period trip protection method, make full-bridge circuit under phase-shift control mode, trip protection enters half period locking control, the slight bias phenomenon of having avoided trip protection to bring.
Description of drawings
Fig. 1 is the half period trip protection circuit diagram of execution mode.
Embodiment
Below in conjunction with accompanying drawing enforcement of the present invention further is described in detail.
As shown in Figure 1, a kind of full-bridge half period trip protection circuit of phase shifting control comprises 5 road DSP pwm signals that dsp processor produces: the first pwm signal PWMA, the second pwm signal PWMB, the 3rd pwm signal PWMC, the 4th pwm signal PWMD, the 5th pwm signal PWME among the figure; With 4 dual inputs with the door: the first dual input with the door the 1, second dual input with the door the 2, the 3rd dual input with the door the 3 and the 4th dual input with the door 4.Described 4 dual inputs link together with the second input of door 1-4, and connect with the 5th pwm signal PWME; Described the first dual input and door 1 first input end be connected pwm signal PWMA and be connected, the second dual input and door 2 first input end be connected pwm signal PWMB and be connected, the 3rd dual input is connected with the 3rd pwm signal PWMC with the first input end of door 3, and the 4th dual input is connected with the 4th pwm signal PWMD with the first input end of door 4; Described the first pwm signal PWMA, the second pwm signal PWMB, the 3rd pwm signal PWMC and the 4th pwm signal PWMD are used for driving 4 power switch pipes of full-bridge circuit; Described the 5th pwm signal PWME is the locking signal of 4 dual inputs and door 1-4.
Described 4 dual inputs and the pwm signal of door 1-4 for 4 power switch pipes of locking when full-bridge circuit overcurrent or the system failure.
Described 4 dual inputs can adopt similar with a door 1-4 or door, dual input or many inputs and the compositions such as door, NAND gate and NOR gate, and the logic gates that namely can lock output by an input signal forms, even can pass through CPLD, the realization of the hardware such as FPGA.
As preferably, the PWM phase-shifting full-bridge control waveform production method that adopts Texas Instruments (TI) to recommend, that is: the first pwm signal PWMA and the second pwm signal PWMB form the pwm signal of a brachium pontis, the first pwm signal PWMA is oppositely exported formation the second pwm signal PWMB, consist of the same brachium pontis pwm signal that can not lead directly to; In like manner, the 3rd pwm signal PWMC and the 4th pwm signal PWMD form the pwm signal of another brachium pontis, the 3rd pwm signal PWMC is oppositely exported form the 4th pwm signal PWMD.
Described the 5th pwm signal PWME is a PWM output signal synchronous with the first pwm signal PWMA, and the cycle of the 5th pwm signal PWME is half of the first pwm signal PWMA.
As preferably, described the first pwm signal PWMA, the second pwm signal PWMB, the 3rd pwm signal PWMC, the 4th pwm signal PWMD, the 5th pwm signal PWME can select the dsp processor of TI 2000 series to produce.
The control method that is used for the full-bridge half period trip protection circuit of above-mentioned a kind of phase shifting control is: when full-bridge circuit overcurrent or the system failure, described the 5th pwm signal PWME is output as low level, 4 dual inputs detect this low level with door 1-4 and then lock for 4 pwm signals that drive 4 switching tubes of full-bridge circuit: the first pwm signal PWMA, the second pwm signal PWMB, the 3rd pwm signal PWMC and the 4th pwm signal PWMD, when namely the 5th pwm signal PWME was output as low level, 4 dual inputs were low level with door 1-4 output;
When full-bridge circuit overcurrent and system failure recovery normal operation, the 5th pwm signal PWME recovers high level output at cycle starting point or the mid point of the first pwm signal PWMA, export with the signal of door 1-4 thereby recover 4 dual inputs, realize that the half period locks the output control of the first pwm signal PWMA, the second pwm signal PWMB, the 3rd pwm signal PWMC and the 4th pwm signal PWMD.
As seen; can realize effective trip protection of half period by described circuit; stop the bias phenomenon that when protection monocycle brings; this circuit is simple and practical; when efficient solution produces except the trip signal of DSP phase-shifting control method; 4 road pwm signals still keep the in twos phenomenon of reverse complemental, reach the requirement of 4 road PWM Close Alls of trip protection.
Those skilled in the art can make various modifications to this specific embodiment or replenish or adopt similar mode to substitute under the prerequisite of principle of the present invention and essence, but these are changed and all fall into protection scope of the present invention.Therefore the technology of the present invention scope is not limited to above-described embodiment.
Claims (4)
1. the full-bridge half period trip protection circuit of a phase shifting control is characterized in that comprising dsp processor, the first dual input and door, the second dual input and door, the 3rd dual input and door and the 4th dual input and door; Dsp processor is exported 5 road DSP pwm signals: the first pwm signal PWMA, the second pwm signal PWMB, the 3rd pwm signal PWMC, the 4th pwm signal PWMD, the 5th pwm signal PWME, the first dual input and door, the second dual input and door, the 3rd dual input and door and the 4th dual input all link together with the second input of door, and are connected the 5th pwm signal PWME connection with dsp processor; The first input end of described the first dual input and door be connected pwm signal PWMA and be connected, the first input end of the second dual input and door be connected pwm signal PWMB and be connected, the 3rd dual input is connected with the 3rd pwm signal PWMC with the first input end of door, and the 4th dual input is connected with the 4th pwm signal PWMD with the first input end of door; Described the first pwm signal PWMA, the second pwm signal PWMB, the 3rd pwm signal PWMC and the 4th pwm signal PWMD are used for driving 4 power switch pipes of full-bridge circuit; Described the 5th pwm signal PWME is the locking signal of 4 dual inputs and door; Described 4 dual inputs and the pwm signal of door for 4 power switch pipes of locking when full-bridge circuit overcurrent or the system failure; Described the 5th pwm signal PWME is a PWM output signal synchronous with the first pwm signal PWMA, and the cycle of the 5th pwm signal PWME is half of the first pwm signal PWMA.
2. the full-bridge half period trip protection circuit of a kind of phase shifting control according to claim 1 is characterized in that described dual input and door adopt or door, dual input or many inputs form with door, NAND gate and NOR gate, or adopts CPLD, FPGA hardware to realize.
3. the full-bridge half period trip protection circuit of a kind of phase shifting control according to claim 1 is characterized in that described the first pwm signal PWMA, the second pwm signal PWMB, the 3rd pwm signal PWMC, the 4th pwm signal PWMD are combined into the waveform output of phase-shift control mode; Wherein the second pwm signal PWMB is oppositely exported by the first pwm signal PWMA and obtains, and the 4th pwm signal PWMD is oppositely exported by the 3rd pwm signal PWMC and obtains.
4. the control method that is used for the full-bridge half period trip protection circuit of each described a kind of phase shifting control of claim 1-3, it is characterized in that, when full-bridge circuit overcurrent or the system failure, described the 5th pwm signal PWME is output as low level, 4 dual inputs detect this low level with door and then lock for 4 pwm signals that drive 4 switching tubes of full-bridge circuit: the first pwm signal PWMA, the second pwm signal PWMB, the 3rd pwm signal PWMC and the 4th pwm signal PWMD, when namely the 5th pwm signal PWME was output as low level, 4 dual inputs were low level with door output;
When full-bridge circuit overcurrent and system failure recovery normal operation, the 5th pwm signal PWME recovers high level output at cycle starting point or the mid point of the first pwm signal PWMA, export with the signal of door thereby recover 4 dual inputs, realize that the half period locks the output control of the first pwm signal PWMA, the second pwm signal PWMB, the 3rd pwm signal PWMC and the 4th pwm signal PWMD.
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| CN2013100106073A CN103078299A (en) | 2013-01-12 | 2013-01-12 | Phase-shift controlled full-bridge half-cycle trip protection circuit and control method thereof |
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| CN2013100106073A CN103078299A (en) | 2013-01-12 | 2013-01-12 | Phase-shift controlled full-bridge half-cycle trip protection circuit and control method thereof |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5291384A (en) * | 1991-06-20 | 1994-03-01 | Unitrode Corporation | Phase shifted switching controller |
| CN101462197A (en) * | 2008-10-22 | 2009-06-24 | 深圳市鸿栢科技实业有限公司 | High-frequency inversion stud welding equipment and controlling means thereof |
| CN203218866U (en) * | 2013-01-12 | 2013-09-25 | 华南理工大学 | Phase-shift controlled full-bridge half-cycle trip protection circuit |
-
2013
- 2013-01-12 CN CN2013100106073A patent/CN103078299A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5291384A (en) * | 1991-06-20 | 1994-03-01 | Unitrode Corporation | Phase shifted switching controller |
| CN101462197A (en) * | 2008-10-22 | 2009-06-24 | 深圳市鸿栢科技实业有限公司 | High-frequency inversion stud welding equipment and controlling means thereof |
| CN203218866U (en) * | 2013-01-12 | 2013-09-25 | 华南理工大学 | Phase-shift controlled full-bridge half-cycle trip protection circuit |
Non-Patent Citations (1)
| Title |
|---|
| 丁稳房等: "《低压大电流移相全桥开关电源的研究》", 《湖北工业大学学报》 * |
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Application publication date: 20130501 |