CN103065657A - Audio system with small scale integration (SSI) module and working method thereof - Google Patents
Audio system with small scale integration (SSI) module and working method thereof Download PDFInfo
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Abstract
The invention provides an audio system with a small scale integration (SSI) module. The audio system with the SSI module comprises a digital processor with the SSI module, and an inter-IC sound (I2S) audio digital-to-analog converter, wherein the digital processor controls the SSI module to send audio signals SCK0, audio signals MOSI0 and audio signals SSEL0 to the I2S audio digital-to-analog converter for audio playing, the audio signals SCK0 pass through a NOT gate to be input to a pin BCK of the I2S audio digital-to-analog converter, the audio signals MOSI0 are directly input to a pin DATA of the I2S audio digital-to-analog converter, and the audio signals SSEL0 pass through a D flip-flop for dividing frequency by two and then are input to a pin WS of the I2S audio digital-to-analog converter. The audio signals SCK0 are audio clock signals, the audio signals MOSI0 are audio data signals, and the audio signals SSEL0 are audio indicator signals. Due to the technical scheme, the audio system with the SSI module can output high-quality audio signals.
Description
Technical field
The present invention relates to a kind of digital processing circuit, relate in particular to a kind of audio system with the SSI module and method of work thereof.
Background technology
At present, DAB all is widely applied in every field, and for example toy, digital broadcasting, carried digital audio frequency player etc. transfer digital signal to analogue audio frequency and need digital to analog converter, and english abbreviation is DAC.The DAC that current audio is used all uses the I2S bus to connect, and can support the sampling rate of 4～192kHz, the highest 32 bit data precision, and the DAC sheet is interior with a lot of modules that are used for improving audio quality, and professional audio quality can be provided.The I2S bus is that PHILIPS Co. is a kind of bus standard that the audio data transmission between the digital audio-frequency apparatus is formulated, this bus is specialized in the data transmission between audio frequency apparatus, be widely used in various multimedia systems, it has adopted along the independently design of wire transmission clock and data-signal, by data are separated with clock signal, avoid the distortion brought out because of the time difference, saved the expense of the professional equipment of buying the shake of opposing audio frequency for the user.
Unfortunately, the I2S bus is positioned as a kind of higher bus, in a lot of single-chip microcomputers, flush bonding processor manufacturer, only has the multimedia processor of middle and high end just with this bus, and in the many Price Sensitive types, industrial processor, then without the I2S bus.(the SSI module all has use as a general module in present many processors containing the low side processor of SSI module, a lot of processor inside are all with this module, the SSI module belongs to a kind of hardware interface circuit, is also referred to as the SSP module in some processor.) the upper audio-frequency function that adds, generally adopt now inner universal DA C or use PWM to add low-pass filter analog D AC.The shortcoming of this two schemes maximum is lower tone, and precision is low, can't use in many occasions of high-fidelity that need.
Summary of the invention
The present invention is intended to solve the low side processor processing audio lower tone that contains the SSI module in the prior art, the technical matters that precision is low, and the audio system with the SSI module that a kind of tonequality is high, precision is high is provided.
A kind of audio system with the SSI module, comprise digital processing unit and I2S audio digital to analog converter with the SSI module, the described SSI module of described digital processor controls sends sound signal SCK0, MOSI0 and SSEL0 carries out the audio frequency broadcast to described I2S audio digital to analog converter;
Wherein, the SCK0 signal is input to the BCK pin of I2S audio digital to analog converter through a not gate, MOSI0 is directly inputted to the DATA pin of I2S audio digital to analog converter, and SSEL0 carries out being input to behind the two divided-frequency WS pin of I2S audio digital to analog converter through d type flip flop;
SCK0 is acoustic frequency clock signal, and MOSI0 is voiceband data signal, and SSEL0 is the audio frequency indicator signal.
Preferably, described SSI module comprises data register, and described data register is used for the sound signal that storage will send;
The described SSI module of described digital processor controls sends sound signal to described I2S audio digital to analog converter by data register.
Preferably, described digital processing unit also comprises comparing unit, and comparing unit is used for the constantly byte number of read data register, and compares with its default value, when described byte number during less than default value, the digital processor controls sound signal is inserted in the described data register.
Preferably, the pin CK of audio frequency indicator signal SSEL0 input d type flip flop, the pin S of d type flip flop links to each other with pin R, pin D and the pin of d type flip flop
Link to each other as output terminal, described output terminal is connected with the WS pin of I2S audio digital to analog converter.
Preferably, described I2S audio digital to analog converter is identified content and the sound channel of described sound signal according to the signal that BCK pin, DATA pin and WS pin receive according to the I2S standard.
Preferably, described digital processing unit is the chip of model LPC1114; Described I2S audio digital to analog converter is the chip of model TDA1543.
The present invention also provides a kind of method of work of above-mentioned audio system with the SSI module, and described audio system comprises that described method of work may further comprise the steps with the digital processing unit of SSI module and I2S audio digital to analog converter:
Step S10, system initialization;
Step S20, digital processor controls SSI module transmission sound signal SCK0, MOSI0 and SSEL0 are to described I2S audio digital to analog converter; The SCK0 signal is input to the BCK pin of I2S audio digital to analog converter through a not gate, and MOSI0 is directly inputted to the DATA pin of I2S audio digital to analog converter, and SSEL0 carries out being input to behind the two divided-frequency WS pin of I2S audio digital to analog converter through d type flip flop;
Step S30, the I2S audio digital to analog converter receives described sound signal SCK0, MOSI0 and SSEL0, and controls described sound signal SCK0, MOSI0 and SSEL0 and carry out audio frequency according to the I2S standard and play;
Wherein, SCK0 is acoustic frequency clock signal, and MOSI0 is voiceband data signal, and SSEL0 is the audio frequency indicator signal.
Preferably, described SSI module comprises data register, and described step S20 specifically comprises:
Step S21, the described sound signal SCK0 of digital processor controls, MOSI0 and SSEL0 store in the described data register;
Step S23, the described data register of digital processor controls sends described sound signal to the I2S audio digital to analog converter.
Preferably, described digital processing unit also comprises comparing unit, after step S21, also comprises before the step S23:
Step S22, comparing unit be the byte number in the read data register constantly, and compares with its default value, and when described byte number during less than default value, the digital processor controls sound signal is inserted in the described data register.
Preferably, the numerical value of described default value is 2.
The above technical scheme, the sound signal that will send with the digital processing unit of SSI module by a not gate and d type flip flop is converted into the waveform signal that meets the I2S standard, and the sound signal after will transforming sends to the I2S audio digital to analog converter and carries out audio frequency and play, signal after this conversion can effectively be identified and carry out accurate audio frequency and be play by the I2S audio digital to analog converter, high-quality, high-quality audio frequency output can be provided.
Description of drawings
Fig. 1 is a kind of example structure synoptic diagram of the audio system of band SSI module of the present invention;
Fig. 2 is the sound signal synoptic diagram that SSI module of the present invention sends;
Fig. 3 is the waveform synoptic diagram after the sound signal process among Fig. 2 transforms;
Fig. 4 is I2S reference waveform synoptic diagram;
Fig. 5 is the method for work process flow diagram of the audio system of band SSI module of the present invention.
Embodiment
In order to make technical matters solved by the invention, technical scheme and beneficial effect clearer, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, is not intended to limit the present invention.
As shown in Figure 1, embodiments of the invention provide a kind of audio system with SSI module 110, comprise digital processing unit 100 and I2S audio digital to analog converter 200 with SSI module 110, the described SSI module 110 of described digital processing unit 100 controls sends sound signal SCK0, MOSI0 and SSEL0 carries out the audio frequency broadcast to described I2S audio digital to analog converter 200; Wherein, SCK0 is acoustic frequency clock signal, and MOSI0 is voiceband data signal, and SSEL0 is the audio frequency indicator signal.
In conjunction with shown in Figure 2, the sound signal SCK0 that generally sends with the digital processing unit 100 of SSI module 110, the waveform of MOSI0 and SSEL0 as shown in Figure 2, it is different that this waveform is compared with the waveform that meets the I2S standard among Fig. 4, this sound signal SCK0 that digital processing unit 100 sends, the waveform of MOSI0 and SSEL0 can not satisfy the waveform of I2S standard code, thereby therefore can not can not be carried out correctly audio frequency broadcast by the 200 correct identifications of I2S audio digital to analog converter, this sound signal SCK0 of the present invention in order to realize digital processing unit 100 is sent, thereby the waveform of MOSI0 and SSEL0 is converted into and meets the I2S reference waveform and can correctly be identified by the I2S audio digital to analog converter, has mainly made the design of following technical scheme:
Acoustic frequency clock signal SCK0 signal is input to the BCK pin of I2S audio digital to analog converter 200 through a not gate 300.Comparison diagram 2 and Fig. 4 illustrate a bit that at first each voiceband data signal MOSI0 is take MSB as start bit, take LSB as stop bit.Shown in the waveform among Fig. 4, when beginning to send a voiceband data signal (signal at DATA pin place), the clock signal at BCK pin place all is to be in negative edge, that is to say, in the I2S reference waveform, when the clock signal at BCK pin place is sent a voiceband data signal in some cycles and in the moment of certain negative edge correspondence.And can see that in Fig. 2 the start bit MSB of voiceband data signal MOSI0 namely in the moment of acoustic frequency clock signal SCK0 for certain rising edge, begins to send a voiceband data signal MOSI0 corresponding to the rising edge of acoustic frequency clock signal SCK0.
Above embodiment has shown: if the acoustic frequency clock signal SCK0 that the SSI module 110 of digital processing unit 100 is sent meets the standard of I2S, the waveform that must control the acoustic frequency clock signal SCK0 that SSI module 110 sends reverses, and corresponding this acoustic frequency clock signal SCK0 constantly is in rising edge when guaranteeing whenever to send a voiceband data signal MOSI0.Can find out in conjunction with Fig. 2 and Fig. 4 simultaneously that the reference waveform signal that acoustic frequency clock signal SCK0 and BCK pin place receive is opposite on phase place, needs anti-phase.Therefore the acoustic frequency clock signal SCK0 signal that SSI module 110 is sent is input to the BCK pin of I2S audio digital to analog converter 200 through a not gate 300, just can guarantee that the acoustic frequency clock signal that the BCK pin receives meets the I2S reference waveform, the negative edge of the acoustic frequency clock signal after the corresponding conversion of the start bit of realization voiceband data signal.
Voiceband data signal MOSI0 has comprised the content information of voice data, voiceband data signal MOSI0 has comprised a plurality of continuous data-signals that contain audio data content information, each data-signal has 4-16 byte number, and each data-signal is take MSB as start bit, take LSB as stop bit.This voiceband data signal can be changed on the DATA pin that is directly inputted to I2S audio digital to analog converter 200, and the data-signal that the DATA pin of I2S audio digital to analog converter 200 receives is original voiceband data signal MOSI0.
Audio frequency indicator signal SSEL0 is used to refer to the channel information of sound, shown in the reference waveform of I2S among Fig. 4, can set and indicate that when the waveform of audio frequency indicator signal SSEL0 is in low level described audio frequency is L channel, indicate that when the waveform of audio frequency indicator signal SSEL0 is in low level described audio frequency is R channel; In fact, the conversion of high-low level is not the junction at two data-signals, in Fig. 4, can see, in the sound signal MOSI0 that DATA pin place receives, every sound signal enter stop bit LSB the time, the high-low level of audio frequency indicator signal SSEL0 begins conversion, and described sound channel is also carried out corresponding transformation.The signal waveform that shows according to Fig. 2 as can be known, at MSB place, the start bit of each voiceband data signal, audio frequency indicator signal SSEL0 carries out level conversion, is converted to low level by high level; And when voiceband data signal began to enter stop bit LSB, audio frequency indicator signal SSEL0 carried out again level conversion, was high level by low transition.
Level conversion for the above audio frequency indicator signal SSEL0, comparison diagram 2 and Fig. 4 are as can be known, the level conversion time of the audio frequency indicator signal that the WS pin receives in the I2S reference waveform is than the Zao stop bit LSB of the level conversion time of SSEL0 among Fig. 2, meet the I2S reference waveform that the WS pin receives for the audio frequency indicator signal SSEL0 that can realize SSI module 110 is sent is transformed to, the present invention is increasing the WS pin that is input to I2S audio digital to analog converter 200 after a d type flip flop 400 carries out two divided-frequency with audio frequency indicator signal SSEL0 between digital processing unit 100 and the I2S audio digital to analog converter 200.Audio frequency indicator signal SSEL0 can be converted to the I2S reference waveform through behind the two divided-frequency.The pin CK of described d type flip flop is signal input part, and pin S is for presetting end, and pin R is clear terminal, and pin D is trigger end, pin Q with
Be respectively the output terminal of d type flip flop.D type flip flop was accepted input signal before the signal rising edge of CK end, trigger the upset of input signal at the signal rising edge of CK end, then by pin Q and
Output signal presets respectively and clear operation by pin S and pin R in control procedure.
Preferably, embodiments of the invention are by being configured to described d type flip flop the function that a two-divider is realized its two divided-frequency.The pin S of d type flip flop is linked to each other pin D and the pin of d type flip flop with pin R
Link to each other as output terminal, the pin CK of audio frequency indicator signal SSEL0 input d type flip flop, the output terminal by d type flip flop sends signal on the WS pin of I2S audio digital to analog converter 200.
As shown in Figure 1, further, described SSI module 110 comprises a data register 111, and described data register 111 is used for sound signal SCK0, MOSI0 and the SSEL0 that storage will send; The described SSI module 110 of described digital processing unit 100 concrete controls sends sound signal to described I2S audio digital to analog converter 200 by data register 111.
As the further improvement to above-described embodiment, described digital processing unit 100 also comprises comparing unit 120, comparing unit 120 is used for reading constantly the byte number of the data register 111 of SSI module 110, and compare with its default value, when described byte number during less than default value, digital processing unit 100 control sound signals are inserted in the described data register 111; Can prevent effectively that by this kind mode disconnected joint phenomenon from appearring in the transmission of sound signal, guarantee that effectively the lasting uninterrupted of sound signal sends and report.Default value in the described comparing unit 120 is preferably 2, as long as when the byte number stored was less than 2 bytes in the data register 111, digital processing unit 100 was just controlled sound signal and inserted in the data register 111.
In the above example, described digital processing unit is preferably the chip that model is LPC1114; Described I2S audio digital to analog converter is preferably the chip that model is TDA1543.
Embodiment through the above scheme of the present invention, the sound signal that SSI module 110 is sent can be converted into the waveform that meets the I2S standard, thereby the I2S audio digital to analog converter 200 that can connect high tone quality carries out audio frequency to be play, and the waveform after the conversion as shown in Figure 3.Need explanation a bit, in the digital processing unit 100 with SSI module 110, SSI module 110 in the dissimilar digital processing units 100 may be sent the sound signal waveform of various modes, when utilizing technical scheme of the present invention, can adjust the waveform pattern that the SSI module 110 of this digital processing unit 100 sends is pattern shown in Figure 2, sends to I2S audio digital to analog converter 200 and carries out audio frequency and play thereby guarantee to make its sound signal of sending can be converted to smoothly the waveform that meets the I2S standard.
As shown in Figure 5, the present invention also provides a kind of method of work of above-mentioned audio system with the SSI module, and described method of work may further comprise the steps:
Step S10, system initialization guarantees that digital processing unit 100 and I2S audio digital to analog converter 200 normally power on, and begins to prepare to carry out the transmission of sound signal;
Step S20, digital processing unit 100 control SSI modules 110 transmission sound signal SCK0, MOSI0 and SSEL0 are to described I2S audio digital to analog converter 200;
As a kind of optimal technical scheme, process and send the efficient of sound signal in order to improve digital processing unit 100, step S20 specifically may further comprise the steps: step S21, and digital processing unit 100 control described sound signal SCK0, MOSI0 and SSEL0 store in the described data register 111;
Step S23, the described data register 111 of digital processing unit 100 controls sends described sound signal to I2S audio digital to analog converter 200.
Store and send sound signal by the data register 111 in the SSI module 110, can abdicate more internal memory for SSI module 110 and process other processes.
Step S30, I2S audio digital to analog converter 200 receives described sound signal SCK0, MOSI0 and SSEL0, and control described sound signal SCK0, MOSI0 and SSEL0 and carry out audio frequency according to the I2S standard and play, the low side processor of realizing containing the SSI module can connect the I2S audio digital to analog converter 200 of high tone quality.Realized when the low side processor increases the high quality audio function, need not to add extra companion chip, reduced design difficulty.
More preferably, in order to guarantee the continuity of audio signal transmission, after step S21, also comprise before the step S23:
Step S22, comparing unit 120 is the byte number of the sound signal of storing in the read data register 111 constantly, and compare with its default value, when described byte number during less than default value, digital processing unit 100 control sound signals are inserted in the described data register 111.Herein, the numerical optimization of described interior setting is 2, when the byte number of the sound signal of storing in the data register 111 during less than 2 bytes, digital processing unit 100 control sound signals are in time inserted in the described data register 111, effectively guaranteed the continuity of audio signal transmission, and can guarantee that the audio frequency of playing also is continuous.
The above only is preferred embodiment of the present invention, not in order to limiting the present invention, all any modifications of doing within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. audio system with the SSI module, comprise digital processing unit and I2S audio digital to analog converter with the SSI module, it is characterized in that: the described SSI module of described digital processor controls sends sound signal SCK0, MOSI0 and SSEL0 carries out the audio frequency broadcast to described I2S audio digital to analog converter;
Wherein, the SCK0 signal is input to the BCK pin of I2S audio digital to analog converter through a not gate, MOSI0 is directly inputted to the DATA pin of I2S audio digital to analog converter, and SSEL0 carries out being input to behind the two divided-frequency WS pin of I2S audio digital to analog converter through d type flip flop;
SCK0 is acoustic frequency clock signal, and MOSI0 is voiceband data signal, and SSEL0 is the audio frequency indicator signal.
2. the audio system with the SSI module according to claim 1, it is characterized in that: described SSI module comprises data register, described data register is used for the sound signal that storage will send;
The described SSI module of described digital processor controls sends sound signal to described I2S audio digital to analog converter by data register.
3. the audio system with the SSI module according to claim 2 is characterized in that:
Described digital processing unit also comprises comparing unit, comparing unit is used for the constantly byte number of read data register, and compare with its default value, when described byte number during less than default value, the digital processor controls sound signal is inserted in the described data register.
4. the audio system with the SSI module according to claim 1 is characterized in that: the pin CK of audio frequency indicator signal SSEL0 input d type flip flop, the pin S of d type flip flop links to each other with pin R, pin D and the pin of d type flip flop
Link to each other as output terminal, described output terminal is connected with the WS pin of I2S audio digital to analog converter.
5. the audio system with the SSI module according to claim 1 is characterized in that: described I2S audio digital to analog converter is identified content and the sound channel of described sound signal according to the signal that BCK pin, DATA pin and WS pin receive according to the I2S standard.
6. the audio system with the SSI module according to claim 1, it is characterized in that: described digital processing unit is the chip of model LPC1114; Described I2S audio digital to analog converter is the chip of model TDA1543.
7. method of work with the audio system of SSI module, described audio system comprises with the digital processing unit of SSI module and I2S audio digital to analog converter, it is characterized in that: described method of work may further comprise the steps:
Step S10, system initialization;
Step S20, digital processor controls SSI module transmission sound signal SCK0, MOSI0 and SSEL0 are to described I2S audio digital to analog converter; The SCK0 signal is input to the BCK pin of I2S audio digital to analog converter through a not gate, and MOSI0 is directly inputted to the DATA pin of I2S audio digital to analog converter, and SSEL0 carries out being input to behind the two divided-frequency WS pin of I2S audio digital to analog converter through d type flip flop;
Step S30, the I2S audio digital to analog converter receives described sound signal SCK0, MOSI0 and SSEL0, and controls described sound signal SCK0, MOSI0 and SSEL0 and carry out audio frequency according to the I2S standard and play;
Wherein, SCK0 is acoustic frequency clock signal, and MOSI0 is voiceband data signal, and SSEL0 is the audio frequency indicator signal.
8. method of work according to claim 7, it is characterized in that: described SSI module comprises data register, and described step S20 specifically comprises:
Step S21, the described sound signal SCK0 of digital processor controls, MOSI0 and SSEL0 store in the described data register;
Step S23, the described data register of digital processor controls sends described sound signal to the I2S audio digital to analog converter.
9. method of work according to claim 8, it is characterized in that: described digital processing unit also comprises comparing unit, after step S21, also comprises before the step S23:
Step S22, comparing unit be the byte number in the read data register constantly, and compares with its default value, and when described byte number during less than default value, the digital processor controls sound signal is inserted in the described data register.
10. method of work according to claim 9, it is characterized in that: the numerical value of described default value is 2.
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| CN103970693A (en) * | 2014-05-22 | 2014-08-06 | 三星半导体(中国)研究开发有限公司 | Integral integrated circuit sound circuit |
| CN108197051A (en) * | 2018-01-03 | 2018-06-22 | 深圳市玄羽科技有限公司 | Intelligence manufacture equipment and the data conversion system and method for external audio collecting device |
| CN115278458A (en) * | 2022-07-25 | 2022-11-01 | 邓剑辉 | Multi-channel digital audio processing system based on PCIE interface |
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| CN103970693B (en) * | 2014-05-22 | 2017-02-22 | 三星半导体(中国)研究开发有限公司 | Integral integrated circuit sound circuit |
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Application publication date: 20130424 |