CN103051228A - Method and device for balancing neutral point voltage deviation on direct current side of diode-clamped three-level inverter - Google Patents
Method and device for balancing neutral point voltage deviation on direct current side of diode-clamped three-level inverter Download PDFInfo
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- CN103051228A CN103051228A CN2012105331571A CN201210533157A CN103051228A CN 103051228 A CN103051228 A CN 103051228A CN 2012105331571 A CN2012105331571 A CN 2012105331571A CN 201210533157 A CN201210533157 A CN 201210533157A CN 103051228 A CN103051228 A CN 103051228A
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Abstract
The invention discloses a method and a device for balancing neutral point voltage deviation on the direct current side of a diode-clamped three-level inverter. The theory is that a neutral point of a capacitor on the direct current side of the diode-clamped three-level inverter is separated from a public neutral point of a three-phase bridge arm clamping diode, a voltage generator is connected in series between the neutral point of the capacitor on the direct current side of the diode-clamped three-level inverter and the public neutral point of the three-phase bridge arm clamping diode, so that the neutral point voltage of a three-phase bridge arm of the diode-clamped three-level inverter is kept at about one half of the voltage on the direct current side, and the fluctuation range meets the requirement of normal operation of the diode-clamped three-level inverter. The device comprises a single-phase full-bridge inverter circuit, a direct current power supply, a filter capacitor, a filter inductor, a transformer, a PWM (Pulse Width Modulation) controller, an IGBT (Insulated Gate Bipolar Transistor) drive circuit, a neutral point voltage transducer on the direct current side, a voltage transducer on the direct current side, a compensating voltage transducer and the diode-clamped three-level inverter. The device has the advantages of simple structure and higher control precision and synchronization.
Description
Technical field
The present invention relates to a kind of method and device of balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage, belong to the electronic power converter technical field.
Background technology
Diode clamp formula three-level inverter has been widely used in a plurality of fields such as compensation of the transmission of mesohigh alternating current machine, power system reactive power.Two dc capacitors of diode clamp formula three-level inverter DC side have provided the dc voltage mid point.Voltage on each dc capacitor is generally half of dc voltage.Because capacitance is limited, the mid point electric current can make the DC side mid-point voltage produce skew to capacitor charge and discharge, the DC side mid-point voltage also can change along with the service conditions of diode clamp formula three-level inverter simultaneously, even cause diode clamp formula three-level inverter when normal operation, DC side mid-point voltage and three-phase brachium pontis mid-point voltage also can be offset excessive, cause three-level inverter upper and lower bridge arm voltage skewness, damage too early with switching device thereby cause inverter output voltage THD to increase.Guarantee diode clamp formula three-level inverter for a long time, reliably operation, must guarantee that the skew of three-phase brachium pontis clamping diode common-midpoint voltage is in certain scope.Therefore study the device that a cover can guarantee diode clamp formula three-level inverter DC side neutral point voltage balance, in practical application in industry, be very important.
The method of at present the most frequently used balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage is the pulse-width modulation of usage space vector, the sequence of operation of the redundant vector of choose reasonable and the method for time." Proceedings of the CSEE " is in the 6th phase in 2006 publish thesis " neutral point clamped multi three-level inverter space vector modulation and middle point control research " thereof, this method has been made detailed elaboration, but the balanced capacity of the method is limited, its control algolithm is very complicated, require high to the control chip that is used for calculating, the real-time of system is poor, and can affect the quality of diode clamp formula three-level inverter output waveform.
Summary of the invention
The objective of the invention is in order to overcome above-mentioned the deficiencies in the prior art, a kind of device of balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage is provided, simple in structure, advanced the commercial Application of this inverter.
The present invention for the technical scheme that solves its technical problem and adopt is: with the dc bus capacitor mid point of diode clamp formula three-level inverter and three-phase brachium pontis clamping diode common-midpoint separately, and the voltage generator of connecting betwixt, this device comprises single-phase full bridge inverter circuit, DC power supply, filter capacitor, filter inductance, transformer, PWM controller, IGBT drive circuit, DC side mid-point voltage transducer, dc voltage transducer, bucking voltage transducer, diode clamp formula three-level inverter; DC power supply is parallel to the DC side of single-phase full bridge inverter circuit, the former limit series connection of single-phase full bridge inverter circuit and filter inductance and transformer, secondary by transformer is connected between diode clamp formula three-level inverter DC side mid point and the three-phase brachium pontis clamping diode common-midpoint, and filter capacitor is parallel to transformer primary side; DC side mid-point voltage transducer is parallel to the electric capacity midpoint of diode clamp formula three-level inverter DC side, the dc voltage transducer is parallel to diode clamp formula three-level inverter DC side, the bucking voltage transducer is parallel to the former limit of transformer, and the output signal of DC side mid-point voltage transducer, dc voltage transducer and bucking voltage transducer produces IGBT through the PWM controller and drives signal.
The control method of the device of balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage is, by diode clamp formula three-level inverter DC side unbalance of neutral-point voltage amount is detected, calculated for the needed bucking voltage of balance DC side unbalance of neutral-point voltage by DSP, produce IGBT by the PWM controller again and drive signal, drive the single-phase full bridge inverter circuit and produce bucking voltage, with the bucking voltage diode clamp formula three-level inverter DC side mid point that is added to, realize the balance to diode clamp formula three-level inverter DC side unbalance of neutral-point voltage through transformer.
Concrete technical scheme is as follows:
A kind of method of balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage, it is characterized in that: dc bus capacitor mid point and the three-phase brachium pontis clamping diode common-midpoint of diode clamp formula three-level inverter are separated, and the voltage generator of connecting betwixt, produce bucking voltage by control circuit control voltage generator, and with the bucking voltage diode clamp formula three-level inverter DC side mid point that is added to, realize the balance to diode clamp formula three-level inverter DC side unbalance of neutral-point voltage.
Described voltage generator is comprised of single-phase full bridge inverter circuit 1, DC power supply 2, filter capacitor 3, filter inductance 4, transformer 5, DC power supply 2 is parallel to the DC side of single-phase full bridge inverter circuit 1, the former limit series connection of single-phase full bridge inverter circuit 1 and filter inductance 4 and transformer 5, secondary by transformer 5 is connected between diode clamp formula three-level inverter DC side mid point and the three-phase brachium pontis clamping diode common-midpoint, and filter capacitor 3 is parallel to the former limit of transformer 5; Described control circuit is comprised of PWM controller 6, IGBT drive circuit 7, DC side mid-point voltage transducer 8, dc voltage transducer 9, bucking voltage transducer 10, DC side mid-point voltage transducer 8 is parallel to the electric capacity midpoint of diode clamp formula three-level inverter 11 DC side, dc voltage transducer 9 is parallel to diode clamp formula three-level inverter 11 DC side, and bucking voltage transducer 10 is parallel to the former limit of transformer 5; Output signal input PWM controller 6 with DC side mid-point voltage transducer 8, dc voltage transducer 9 and bucking voltage transducer 10, dsp chip in the PWM controller 6 calculates 4 independently pwm signals, for 4 IGBT of single-phase full bridge inverter circuit 1 provide the driving signal, driven 4 IGBT work of single-phase full bridge inverter circuit 1 by IGBT drive circuit 7, make single-phase full bridge inverter circuit 1 produce bucking voltage, balance diode clamp formula three-level inverter 11 DC side mid-point voltages.
Dsp chip in the described PWM controller 6 calculate 4 independently the process of pwm signal be achieved in that diode clamp formula three-level inverter 11 DC side mid-point voltages are offset when diode clamp formula three-level inverter 11 bringing onto loads move; DC side mid-point voltage transducer 8, dc voltage transducer 9, bucking voltage transducer 10 detect respectively dc bus capacitor mid point virtual voltage
U n, the DC side virtual voltage
U DcWith the compensation actual output voltage
U c, input PWM controller 6, the dsp chip in the PWM controller 6 is with 0.5
U DcDeduct
U nDraw compensated voltage instruction
U c*, use again
U c* deduct
U cObtain △
U cNamely
U c* with
U cOutput error signal and the compensating instruction voltage signal of error voltage calculate to need, error signal △
U cThrough obtaining 4 independently pwm signals with triangle wave after the PID modulation.
The device of the balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage that makes up according to balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage method, this device comprises voltage generator and control circuit; Described voltage generator is comprised of single-phase full bridge inverter circuit 1, DC power supply 2, filter capacitor 3, filter inductance 4, transformer 5, DC power supply 2 is parallel to the DC side of single-phase full bridge inverter circuit 1, the former limit series connection of single-phase full bridge inverter circuit 1 and filter inductance 4 and transformer 5, secondary by transformer 5 is connected between diode clamp formula three-level inverter DC side mid point and the three-phase brachium pontis clamping diode common-midpoint, and filter capacitor 3 is parallel to the former limit of transformer 5; Described control circuit is comprised of PWM controller 6, IGBT drive circuit 7, DC side mid-point voltage transducer 8, dc voltage transducer 9, bucking voltage transducer 10, DC side mid-point voltage transducer 8 is parallel to the electric capacity midpoint of diode clamp formula three-level inverter 11 DC side, dc voltage transducer 9 is parallel to diode clamp formula three-level inverter 11 DC side, and bucking voltage transducer 10 is parallel to the former limit of transformer 5; The output signal of DC side mid-point voltage transducer 8, dc voltage transducer 9 and bucking voltage transducer 10 produces IGBT through PWM controller 6 and drives signal, driven 4 IGBT work of single-phase full bridge inverter circuit 1 by IGBT drive circuit 7, make single-phase full bridge inverter circuit 1 produce bucking voltage, balance diode clamp formula three-level inverter 11 DC side mid-point voltages.
Dsp chip in the described PWM controller 6 calculate 4 independently the process of pwm signal be achieved in that diode clamp formula three-level inverter 11 DC side mid-point voltages are offset when diode clamp formula three-level inverter 11 bringing onto loads move; DC side mid-point voltage transducer 8, dc voltage transducer 9 and bucking voltage transducer 10 detect respectively dc bus capacitor mid point virtual voltage
U n, the DC side virtual voltage
U DcWith the compensation actual output voltage
U c, input PWM controller 6, the dsp chip in the PWM controller 6 is with 0.5
U DcDeduct
U nDraw compensated voltage instruction
U c*, use again
U c* deduct
U cObtain △
U cNamely
U c* with
U cOutput error signal and the compensating instruction voltage signal of error voltage calculate to need, error signal △
U cThrough obtaining 4 independently pwm signals with triangle wave after the PID modulation.
Described dsp chip can be TMS320F28335.
The present invention is compared with the prior art, and has following advantage:
1. existing usage space vector pulse-width modulation, the sequence of operation of the redundant vector of choose reasonable and the method for the balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage of time are so that control algolithm becomes very complicated, require very high to the computational speed that is used for the integrated circuit (IC) chip such as DSP that control algolithm calculates or ARM, and the control algolithm of this device is simple, lower to being used for the requirement of control algolithm computing hardware, improved the speed of calculating and the real-time of system.
2. existing usage space vector pulse-width modulation, the sequence of operation of the redundant vector of choose reasonable and the method for the balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage of time are limited to the balanced capacity of dc voltage skew, and can affect the quality of diode clamp formula three-level inverter output waveform, and the employing of this device is the mode of active compensation, can carry out the variation of DC side mid point accurately, real-time compensation, therefore the balanced capacity to the dc voltage skew is strong, has optimized the quality of diode clamp formula three-level inverter output waveform.
Description of drawings
Fig. 1 is the major loop figure of the device of balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage;
Fig. 2 is the structure chart of the device of balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage;
Fig. 3 is the control strategy schematic diagram;
Among the figure: 1. single-phase full bridge inverter circuit, 2. DC power supply, 3. filter capacitor, 4. filter inductance, 5. transformer, 6. PWM controller, 7. IGBT drive circuit, 8. DC side mid-point voltage transducer, 9. dc voltage transducer, 10. bucking voltage transducer, 11. diode clamp formula three-level inverters.
U nBe DC side mid point virtual voltage,
U DcBe the DC side virtual voltage,
U c* be compensated voltage instruction,
U cBe reality output bucking voltage, △
U cFor
U c* with
U cError voltage.
Embodiment
In order to deepen the understanding of the present invention, the present invention is described in further detail below in conjunction with embodiment and accompanying drawing, and this embodiment only is used for explaining the present invention, does not consist of the restriction to protection range of the present invention.
Show the embodiment of the device of a kind of balance diode clamp of the present invention formula three-level inverter DC side unbalance of neutral-point voltage such as Fig. 1 to Fig. 3: circuit and detection composition of the control system that the implementation method of the device of this balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage is comprised of single-phase full bridge inverter circuit, transformer:
Referring to Fig. 1, Fig. 2, this device is: comprise 1. single-phase full bridge inverter circuits, 2. DC power supply, 3. filter capacitor, 4. filter inductance, 5. transformer, 6. PWM controller, 7. IGBT drive circuit, 8. DC side mid-point voltage transducer, 9. dc voltage transducer, 10. bucking voltage transducer, 11. diode clamp formula three-level inverters; DC power supply 2 is parallel to the DC side of single-phase full bridge inverter circuit 1, the former limit series connection of single-phase full bridge inverter circuit 1, filter inductance 4 and transformer 5, secondary by transformer 5 is connected between the dc bus capacitor mid point and three-phase brachium pontis clamping diode common-midpoint of diode clamp formula three-level inverter 11, filter capacitor 3 is parallel to the former limit of transformer 5, DC side mid-point voltage transducer 8 is parallel to the electric capacity midpoint of diode clamp formula three-level inverter 11 DC side, and dc voltage sensing 9 is parallel to diode clamp formula three-level inverter 11 DC side; Bucking voltage transducer 10 is parallel to the former limit of transformer 5, and the output signal input PWM controller 6 of DC side mid-point voltage transducer 8, dc voltage transducer 9 and bucking voltage transducer 10 produces signal controlling IGBT drive circuit 7.
The method is: when diode clamp formula three-level inverter 11 bringing onto loads moved, diode clamp formula three-level inverter 11 DC side mid-point voltages were offset; DC side mid-point voltage transducer 8, dc voltage transducer 9 and bucking voltage transducer 10 detect respectively DC side mid-point voltage signal, dc voltage signal and compensation voltage signal, input PWM controller 6, to calculate output error signal and the compensating instruction voltage signal that needs, DSP in the PWM controller 6 calculates 4 independently pwm signals, for 4 IGBT of single-phase full bridge inverter circuit 1 provide the driving signal, driven 4 IGBT work of single-phase full bridge inverter circuits 1 by drive circuit 7; Single-phase full bridge inverter circuit 1 produces bucking voltage, balance diode clamp formula three-level inverter 11 DC side mid-point voltages.
Referring to Fig. 3, Fig. 3 is the implementation method of control strategy of the device of balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage, and DC side mid-point voltage transducer 8 is measured dc bus capacitor mid point virtual voltages
U n, dc voltage transducer 9 is measured the DC side virtual voltage
U Dc, bucking voltage transducer 10 metrophia compensation actual output voltages
U c, with 0.5
U DcDeduct
U nDraw compensated voltage instruction
U c*, use again
U c* deduct
U cObtain △
U cNamely
U c* with
U cError voltage, error signal △
U cThrough obtaining pwm signal with triangle wave after the PID modulation.
The present invention adopts TI company's T MS320F28335 chip as the main chip of PWM controller, dsp chip TMS320F28335 has 6 enhancement mode PWM modules, each module can be exported 2 independently pwm signals, can satisfy the independently needs of pwm control signal of 4 in device.
Claims (6)
1. the method for a balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage, it is characterized in that: dc bus capacitor mid point and the three-phase brachium pontis clamping diode common-midpoint of diode clamp formula three-level inverter are separated, and the voltage generator of connecting betwixt, produce bucking voltage by feedback circuit driving voltage generator, and with the bucking voltage diode clamp formula three-level inverter DC side mid point that is added to, realize the balance to diode clamp formula three-level inverter DC side unbalance of neutral-point voltage.
2. the method for a kind of balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage according to claim 1, it is characterized in that, described voltage generator is by single-phase full bridge inverter circuit (1), DC power supply (2), filter capacitor (3), filter inductance (4), transformer (5) forms, DC power supply (2) is parallel to the DC side of single-phase full bridge inverter circuit (1), the former limit series connection of single-phase full bridge inverter circuit (1) and filter inductance (4) and transformer (5), secondary by transformer (5) is connected between diode clamp formula three-level inverter DC side mid point and the three-phase brachium pontis clamping diode common-midpoint, and filter capacitor (3) is parallel to the former limit of transformer (5); Described control circuit is comprised of PWM controller (6), IGBT drive circuit (7), DC side mid-point voltage transducer (8), dc voltage transducer (9), bucking voltage transducer (10), DC side mid-point voltage transducer (8) is parallel to the electric capacity midpoint of diode clamp formula three-level inverter (11) DC side, dc voltage transducer (9) is parallel to diode clamp formula three-level inverter (11) DC side, and bucking voltage transducer (10) is parallel to the former limit of transformer (5); Output signal input PWM controller (6) with DC side mid-point voltage transducer (8), dc voltage transducer (9) and bucking voltage transducer (10), dsp chip in the PWM controller (6) calculates 4 independently pwm signals, for 4 IGBT of single-phase full bridge inverter circuit (1) provide the driving signal, driven 4 IGBT work of single-phase full bridge inverter circuit (1) by IGBT drive circuit (7), make single-phase full bridge inverter circuit (1) produce bucking voltage, balance diode clamp formula three-level inverter (11) DC side mid-point voltage.
3. the method for a kind of balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage according to claim 2, it is characterized in that, dsp chip in the described PWM controller (6) calculate 4 independently the process of pwm signal be to realize like this, when diode clamp formula three-level inverter (11) bringing onto load moved, diode clamp formula three-level inverter (11) DC side mid-point voltage was offset; DC side mid-point voltage transducer (8), dc voltage transducer (9), bucking voltage transducer (10) detects respectively dc bus capacitor mid point virtual voltage
U n, the DC side virtual voltage
U DcWith the compensation actual output voltage
U c, input PWM controller (6), the dsp chip in the PWM controller (6) is with 0.5
U DcDeduct
U nDraw compensated voltage instruction
U c*, use again
U c* deduct
U cObtain △
U cNamely
U c* with
U cOutput error signal and the compensating instruction voltage signal of error voltage calculate to need, error signal △
U cThrough obtaining 4 independently pwm signals with triangle wave after the PID modulation.
4. the device of the balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage that makes up of described balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage method according to claim 1, it is characterized in that: this device comprises voltage generator and control circuit; Described voltage generator is comprised of single-phase full bridge inverter circuit (1), DC power supply (2), filter capacitor (3), filter inductance (4), transformer (5), DC power supply (2) is parallel to the DC side of single-phase full bridge inverter circuit (1), the former limit series connection of single-phase full bridge inverter circuit (1) and filter inductance (4) and transformer (5), secondary by transformer (5) is connected between diode clamp formula three-level inverter DC side mid point and the three-phase brachium pontis clamping diode common-midpoint, and filter capacitor (3) is parallel to the former limit of transformer (5); Described control circuit is comprised of PWM controller (6), IGBT drive circuit (7), DC side mid-point voltage transducer (8), dc voltage transducer (9), bucking voltage transducer (10), DC side mid-point voltage transducer (8) is parallel to the electric capacity midpoint of diode clamp formula three-level inverter (11) DC side, dc voltage transducer (9) is parallel to diode clamp formula three-level inverter (11) DC side, and bucking voltage transducer (10) is parallel to the former limit of transformer (5); The output signal of DC side mid-point voltage transducer (8), dc voltage transducer (9) and bucking voltage transducer (10) produces IGBT through PWM controller (6) and drives signal, driven 4 IGBT work of single-phase full bridge inverter circuit (1) by IGBT drive circuit (7), make single-phase full bridge inverter circuit (1) produce bucking voltage, balance diode clamp formula three-level inverter (11) DC side mid-point voltage.
5. the device of balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage according to claim 4, it is characterized in that: the dsp chip in the described PWM controller (6) calculate 4 independently the process of pwm signal be to realize like this, when diode clamp formula three-level inverter (11) bringing onto load moved, diode clamp formula three-level inverter (11) DC side mid-point voltage was offset; DC side mid-point voltage transducer (8), dc voltage transducer (9) and bucking voltage transducer (10) detect respectively dc bus capacitor mid point virtual voltage
U n, the DC side virtual voltage
U DcWith the compensation actual output voltage
U c, input PWM controller (6), the dsp chip in the PWM controller (6) is with 0.5
U DcDeduct
U nDraw compensated voltage instruction
U c*, use again
U c* deduct
U cObtain △
U cNamely
U c* with
U cOutput error signal and the compensating instruction voltage signal of error voltage calculate to need, error signal △
U cThrough obtaining 4 independently pwm signals with triangle wave after the PID modulation.
6. the device of balance diode clamp formula three-level inverter DC side unbalance of neutral-point voltage according to claim 4, it is characterized in that: described dsp chip is TMS320F28335.
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| CN201210533157.1A CN103051228B (en) | 2012-12-12 | 2012-12-12 | Method and device for balancing neutral point voltage deviation on direct current side of diode-clamped three-level inverter |
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| CN201210533157.1A CN103051228B (en) | 2012-12-12 | 2012-12-12 | Method and device for balancing neutral point voltage deviation on direct current side of diode-clamped three-level inverter |
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Cited By (8)
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| CN103414367A (en) * | 2013-08-22 | 2013-11-27 | 江苏大学 | Method and device for restraining sudden direct-current side voltage changing and direct-current side mid-point voltage fluctuation of diode-clamped three-level inverter |
| CN103944167A (en) * | 2014-04-04 | 2014-07-23 | 武汉武新电气科技有限公司 | Method and device for balancing capacitor voltages |
| CN104065292A (en) * | 2014-06-26 | 2014-09-24 | 许继电气股份有限公司 | Three-level converter neutral point potential balancing control method and device |
| CN104506065A (en) * | 2015-01-12 | 2015-04-08 | 佛山市柏克新能科技股份有限公司 | Midpoint potential control method of three-level inverter |
| CN104967342A (en) * | 2015-06-03 | 2015-10-07 | 厦门理工学院 | Midpoint potential predictive control method for diode clamped three-level converter |
| US9755545B2 (en) | 2014-11-21 | 2017-09-05 | General Electric Company | System and method for unified common mode voltage injection |
| CN107240924A (en) * | 2017-07-31 | 2017-10-10 | 南京工程学院 | A kind of three-level inverter neutral balance circuit control algolithm |
| CN112838767A (en) * | 2021-03-18 | 2021-05-25 | 国电南瑞科技股份有限公司 | Hybrid three-level bidirectional DC-DC converter and neutral point voltage balance control method thereof |
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103414367A (en) * | 2013-08-22 | 2013-11-27 | 江苏大学 | Method and device for restraining sudden direct-current side voltage changing and direct-current side mid-point voltage fluctuation of diode-clamped three-level inverter |
| CN103944167A (en) * | 2014-04-04 | 2014-07-23 | 武汉武新电气科技有限公司 | Method and device for balancing capacitor voltages |
| CN103944167B (en) * | 2014-04-04 | 2016-04-20 | 武汉武新电气科技有限公司 | A kind of method and apparatus of balanced capacitor voltage |
| CN104065292A (en) * | 2014-06-26 | 2014-09-24 | 许继电气股份有限公司 | Three-level converter neutral point potential balancing control method and device |
| US9755545B2 (en) | 2014-11-21 | 2017-09-05 | General Electric Company | System and method for unified common mode voltage injection |
| CN104506065A (en) * | 2015-01-12 | 2015-04-08 | 佛山市柏克新能科技股份有限公司 | Midpoint potential control method of three-level inverter |
| CN104967342A (en) * | 2015-06-03 | 2015-10-07 | 厦门理工学院 | Midpoint potential predictive control method for diode clamped three-level converter |
| CN104967342B (en) * | 2015-06-03 | 2017-08-01 | 厦门理工学院 | The midpoint potential forecast Control Algorithm of diode-clamped three-level converter |
| CN107240924A (en) * | 2017-07-31 | 2017-10-10 | 南京工程学院 | A kind of three-level inverter neutral balance circuit control algolithm |
| CN107240924B (en) * | 2017-07-31 | 2023-08-11 | 南京工程学院 | Neutral point balance circuit control method for three-level inverter |
| CN112838767A (en) * | 2021-03-18 | 2021-05-25 | 国电南瑞科技股份有限公司 | Hybrid three-level bidirectional DC-DC converter and neutral point voltage balance control method thereof |
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