CN103036571B - Dual-mode-delta analog-to-digital converter and circuit thereof - Google Patents
Dual-mode-delta analog-to-digital converter and circuit thereof Download PDFInfo
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Abstract
The invention discloses a receiver with a bimodal-delta analog-to-digital converter (ADC), which can realize low intermediate frequency and near-zero intermediate frequency only under a hardware architecture. The dual-mode delta A/D converter comprises a first switched capacitor integrator for integrating an input signal and a first feedback signal; the second switched capacitor type integrator is used for integrating the output of the first switched capacitor type integrator and a second feedback signal; a quantizer, for providing an output signal of the adc, having at least first and second logic states corresponding to outputs of the second switched capacitor integrator; a feedback circuit for providing the first feedback signal to the first switched capacitor integrator and the second feedback signal to the second switched capacitor integrator; and the modal component is used for providing modal signals to control the action of the first switched capacitor integrator and the action of the second switched capacitor integrator.
Description
Technical field
The present invention relates to a kind of bimodal δ-Δ analog-to-digital converter (ADC), particularly relate to a kind of in order to operate in the bimodal δ-Δ analog-to-digital converter receiving and belong to Low Medium Frequency and/or the nearly nearly zero intermediate frequency of zero intermediate frequency.
Background technology
From nineteen sixty, δ-Δ analog-to-digital converter has been widely used in electronics industry.This δ-Δ technology is attractive is because it does not need assembly on exact matching chip by the control of precise time, thus achieves high-resolution.Therefore, δ-Δ technology is one of them the selection of technology of many Application of integrated circuits.
A kind of basic δ-Δ analog-to-digital converter receives an analog input signal and deducts a feedback signal to provide an erroneous signals.The process of this erroneous signals is through a low pass filter then via quantizing to form a digital output signal.This digital output signal is fed back to digital to analog converter (Digital-to-AnalogConverter, be called for short DAC) and changes after this feedback digital signal exports analog signal to, subtracts each other with front end receiver analog signal.Except this feedback digital to analog converter, the simulated assembly that this basic δ-Δ analog-to-digital converter can be traditional realizes, such as operational amplifier, comparator and switching type capacitor filter etc.Because integrated circuit frequency rate allows to adopt higher sampling rate, therefore general δ-Δ analog-to-digital converter can provide high-resolution usually.Basic δ-Δ analog-to-digital converter by Feedback Technology quantizing noise migration high band, therefore high signal noise ratio (SignaltoNoiseRatio can be had, be called for short SNR), and this out-of-band quantizing noise also fully can be eliminated by traditional filtering technique.
With reference to US Patent No. 5,461, No. 381, award to Seaberg, its title is " having feed-back compensation δ-Δ analog-to-digital converter (Analog-to-DigitalConverter is called for short ADC) and preparation method thereof ".It discloses one δ-Δ analog-to-digital converter and comprises first and second integrator, and a quantizer is connected to an output of this second integral device, and a feedback circuit is connected to the output of this quantizer.In order to avoid the delayed impact via actual circuit elements, this feedback circuit keep this feedback signal to this first integrator in a high impedance state until the output of this second integral device resolved by this quantizer.Therefore, this first integrator avoids and temporarily adds up the incorrect feedback signal of possibility.In addition, this feedback circuit also avoids this first integrator integration one input signal and this feedback signal until this feedback signal is ordered about correction to correct state to respond the output of this quantizer.In order to complete these results, this feedback circuit comprises a compensating circuit in order to judge when this quantizer has solution continuously.
With reference to US Patent No. 6,225, No. 928, award to Green, its title is " the logical modulator of plural number band and method are used in δ-Δ analog-to-digital converter (ADC) ".It discloses by providing one to have on the insensitive cross-couplings discrete time plural number loop filter structure of component matching and by providing a simple architecture to revise the unmatched impact of modulator, and a discrete time cross-couplings leads to δ-Δ conversion to plural bypass modulator to realize band.This plurality of band leads to modulator and comprises an a plurality of nonlinear resonator and to link together and as a linear complex operation device.Each resonator will as a linear complex operation device, when the input signal of an imaginary number to be delayed by and the output signal of an imaginary number is enhanced at half sample interval at half sample interval.In addition, tuner do not mate cause the impact of depression of order be by numeral adjustment real number and imaginary number path related gain and adjustment real number and imaginary number input signal related gain and eliminate, and this real number and imaginary number path system be connected on the output of this analog-to-digital converter after.
With reference to US Patent No. 6,954, No. 628, award to the people such as Minnis, its title is " radio receiver ".It discloses a radio receiver framework in operating in Low Medium Frequency (Lowintermediatefrequency, be called for short LIF) and nearly zero intermediate frequency (NearZeroIntermediateFrequency, be called for short NZIF) mode, it has the maximum recycling of simulation and digital loop between mode.This receiver comprises orthogonal falling and turns device to produce applying aspect (I) and orthogonal (Q) signal and a complex filter to eliminate image frequency in an intermediate frequency.In this Low Medium Frequency mode, one end of the output (Q) of this filter is untapped, but other (I) is digitized by a non-complex analog-to-digital converter, then this digital signal is again through digital filter process, so produce orthogonal intermediate frequency signal.In this nearly zero intermediate frequency mode, utilize that two non-complex digital to analog converters are parallel carries out digitlization., by carry out channel filtration and non-complex simulation to digital translation, this can avoid the loop of repetition and provide energy-conservation significantly.
With reference to US Patent No. 7,176, No. 817, award to Jensen, its title is " the δ continuous time-Δ analog-to-digital converter with shake ".Its mixing application disclosing a digital signal process and analog loopback is present in δ continuous time-Δ analog-to-digital converter to reduce residual noise.Add a noise random on a small quantity by special, remove from the relevant quantizing noise of input signal and significantly can not reduce signal noise ratio (SNR) characteristic.In each example, digital loop utilizes and produces required randomness, and the particular frequency spectrum of decorrelation and shake and simple analog loopback block are to be used for appropriate programming and this shake signal of interpolation to δ-Δ analog-to-digital converter loop continuous time.In an embodiment of this invention, random noise is added to the input of this quantizer, and in another embodiment of this invention, a smallest number electric current added at random maintains original signal noise ratio in order to remove relevant this quantizing noise from input signal.
Now, bluetooth standard expands from the application at a high speed to low power consumption.Develop the framework of different radio frequency receivers to reach this radio frequency link requirement simultaneously.But design engineer should provide different designs to meet the diversity of design specification, this is by very consuming time and lose the time point of first chance of winning the market.Such as, design engineer supports individually Low Medium Frequency and nearly zero intermediate frequency receiver in requisition for the analog-to-digital converter hardware that design two is different
So, be necessary to provide a kind of bimodal δ-Δ analog-to-digital converter, as long as a kind of hardware performs, Low Medium Frequency and nearly zero intermediate frequency receiver can be realized.
Summary of the invention
Namely main purpose of the present invention is to provide a kind of bimodal δ-Δ analog-to-digital converter (ADC), as long as a kind of hardware performs, can be implemented in Low Medium Frequency and nearly zero intermediate frequency receiver.By switching " mode " assembly in opening or closing, operator can change the state of analog-to-digital converter provided by the present invention easily; Can determine to receive Low Medium Frequency (LIF) or nearly zero intermediate frequency (NZIF) signal.
For reaching above-mentioned purpose, the invention provides a kind of bimodal δ-Δ analog-to-digital converter, it is characterized in that, comprise:
First switching capacitance integrator, for carrying out integral operation by an input signal and the first feedback signal;
Second switching capacitance integrator, is coupled to described first suitching type and holds integrator, for the output signal of described first switching capacitance integrator and the second feedback signal are carried out integral operation;
Quantizer, having input to be coupled to described second switching type capacitor integrator and output, for providing the output signal of described digital quantizer, having first and second kind of logical states at least, corresponding to the output of the second switching type capacitor integrator;
Feedback circuit, be coupled to described first switching type capacitor integrator and described second switching type capacitor integrator, for providing described first feedback signal to described first switching type capacitor integrator and described second feedback signal extremely described second switching type capacitor integrator; And mode assembly, be coupled to the input of described first switching type capacitor integrator and the output of described second switching type capacitor integrator, for providing mode signal with the action of the action and described second switching type capacitor integrator that control described first switching type capacitor integrator.
According to foregoing invention feature, described mode assembly comprises the first suitching type assembly to be had first end and is coupled to the input that the input of described first switching type capacitor integrator and the second end are coupled to described second switching type capacitor integrator; Second suitching type assembly has input and the second end that first end is coupled to described first switching type capacitor integrator; And the 3rd suitching type assembly there is first end be coupled to the output that the second end of the described second suitching type assembly of described mode assembly and the second end are coupled to described second switching type capacitor integrator; Wherein said mode assembly controls described first suitching type assembly, and described second suitching type assembly and described 3rd suitching type assembly are the states opened or closed to determine.
In addition, the present invention also proposes a kind of receiver circuit using disclosed bimodal δ-Δ analog-to-digital converter.
For above and other objects of the present invention, feature and advantage can be become apparent, several preferred embodiment cited below particularly, and coordinate accompanying drawing, be described in detail below.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the δ-Δ analog-to-digital converter of a foundation prior art;
Fig. 2 is open bimodal δ-Δ analog-to-digital converter according to prior inventions;
Fig. 3 is the calcspar of the receiver circuit of the bimodal δ-Δ analog-to-digital converter openly operating in nearly zero intermediate frequency;
Fig. 4 is the signal flow graph that open bimodal δ-Δ analog-to-digital converter operates in nearly zero intermediate frequency;
Fig. 5 is the calcspar of the receiver circuit of the bimodal δ-Δ analog-to-digital converter openly operating in Low Medium Frequency;
Fig. 6 is the signal flow graph that open bimodal δ-Δ analog-to-digital converter operates in Low Medium Frequency.
Description of reference numerals:
50 first switching capacitance integrators
60 second switching capacitance integrators
70 quantizers
100 bimodal δ-Δ analog-to-digital converter
102 suitching type assemblies
110 full differential operation amplifiers
111 ~ 115 capacitors
116 ~ 134 suitching type assemblies
150 full differential operation amplifiers
151 ~ 153 capacitors
156 ~ 159 suitching type assemblies
160 ~ 163 suitching type assemblies
170 feedback circuits
171,172 digital to analog converters
190 mode assemblies
191,192 inverters
200,201 receiver circuits
210 low noise amplifiers (LowNoiseAmplifier is called for short LNA)
220,221 frequency mixers
230 low pass filters (LowPassFilter is called for short LPF)
232 band pass filters (Band-PassFilter is called for short BPF)
240 frequency synthesizers
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
For understanding the solution of the present invention, as shown in Figure 1, for a kind of according to the δ-Δ analog-to-digital converter (ADC) of prior art, this δ-Δ analog-to-digital converter comprises the first switching capacitance integrator 50, for input signal and the first feedback signal are carried out integral operation; Second switching capacitance integrator 60, is coupled to described first switching capacitance integrator 50, for the output signal of described first switching capacitance integrator and the second feedback signal are carried out integral operation; Quantizer 70, there is input to be coupled to described second switching type capacitor integrator 60 and output, for providing the output signal (DOUT) of described digital quantizer, having first and second logical states at least, corresponding to the output to the second switching type capacitor integrator 60; Feedback circuit 170, be coupled to described first switching type capacitor integrator and this second switching type capacitor integrator, for providing described first feedback signal to described first switching type capacitor integrator 50 and described second feedback signal extremely described second switching type capacitor integrator 60;
These integrators 50,60 and feedback circuit 170 form a noise transfer function to filter out the noise quantized in the frequency band of this quantizer 70.By general switch-capacitor operation circuit method, this suitching type assembly presents not that overlaid frequency control switch is together with capacitor to form integrator, and the signal transfer function of this δ-Δ analog-to-digital converter is a Low-Pass Filter and noise transfer function is a high-pass type.The analog-to-digital converter advantage of this pattern is oversampling rate and high pass noise shape function, can obtain high signal noise ratio to meet general communication applications.But design engineer supports individually Low Medium Frequency (lowIF) and nearly zero intermediate frequency (NZIF) receiver in requisition for two kinds of different analog-to-digital converter hardware.This is time-consuming and easily loses the first chance of winning the market.
As shown in Figure 2, according to the invention discloses a pair of mode δ-Δ analog-to-digital converter, described bimodal δ-Δ analog-to-digital converter 100 comprises the first switching capacitance integrator 50; Second switching capacitance integrator 60; Quantizer 70; Feedback circuit 170; One mode assembly 190.
Described first switching capacitance integrator 50, for carrying out integral operation by input signal and the first feedback signal; Described second switching capacitance integrator 60, is coupled to described first switching type capacitor integrator 50, for the output signal of described first switching capacitance integrator 50 and the second feedback signal are carried out integral operation; Described quantizer 70, there is input to be coupled to this second switching type capacitor integrator 60 and output, for providing the output signal (DOUT) of described digital quantizer, have first and second kind of logical states at least, corresponding to the output of the second switching type capacitor integrator; Described feedback circuit 170, be coupled to described first switching type capacitor integrator 50 and described second switching type capacitor integrator 60, for providing described first feedback signal to described first switching type capacitor integrator 50 and described second feedback signal extremely described second switching type capacitor integrator 60; And described mode assembly 190, be coupled to the input of described first switching type capacitor integrator 50 and the output of described second switching type capacitor integrator 60, for providing mode signal with the action of the action and described second switching type capacitor integrator 60 that control described first switching type capacitor integrator 50.
Described feedback circuit 170 comprises the first digital to analog converter (DAC) 171, second digital to analog converter (DAC) 172, nine suitching type assemblies 116 ~ 119,156 ~ 159 and two capacitors 112,152.Described first digital to analog converter 171 has first end and is coupled to the input that the output of described quantizer 70 and the second end are coupled to described first switching type capacitor integrator 50, through described suitching type assembly 116 ~ 119 and described capacitor 112, for providing described first feedback signal to described first switching type capacitor integrator 50.
Described second digital to analog converter 172 has first end and is coupled to the input that described quantizer 70 output and the second end are coupled to described second switching type capacitor integrator 60, through described suitching type assembly 156 ~ 159 and described capacitor 152, for providing described second feedback signal to described second switching type capacitor integrator 60.
Described suitching type assembly 116 has output and the second end that first end is coupled to described first digital to analog converter 171.Described suitching type assembly 117 has first end and is coupled to the second end of described suitching type assembly 116 and the second end is coupled to ground connection.Described capacitor 112 has first end and the second end that first end is coupled to this suitching type assembly 117.Described suitching type assembly 118 has first end and is coupled to the second end of described capacitor 112 and the second end is coupled to ground connection.Described suitching type assembly 119 has first end and is coupled to the output that the second end of described capacitor 112 and the second end are coupled to the full differential operation amplifier 110 of described bimodal δ-Δ analog-to-digital converter 50.Described suitching type assembly 156 has output and the second end that first end is coupled to described second digital to analog converter 172.Described suitching type assembly 157 has first end and is coupled to the second end of described suitching type assembly 156 and the second end is coupled to ground connection.Described capacitor 152 has first end and the second end that first end is coupled to described suitching type assembly 157.Described suitching type assembly 158 has first end and is coupled to the second end of described capacitor 152 and the second end is coupled to ground connection.Described suitching type assembly 159 has first end and is coupled to the output that the second end of described capacitor 152 and the second end are coupled to the full differential operation amplifier 150 of described bimodal δ-Δ analog-to-digital converter 60.
Described mode assembly 190 comprises three suitching type assemblies 132 ~ 134, capacitor 115, four suitching type assemblies 128 ~ 131 and two inverters 191 ~ 192.Described suitching type assembly 132 has first end and is coupled to the output of described first switching type capacitor integrator 50 through plurality of capacitors group 113 and four suitching type assemblies 120 ~ 123, and the second end is coupled to the input of described first switching type capacitor integrator 50 through plurality of capacitors group 114 and four suitching type assemblies 124 ~ 127.Described suitching type assembly 133 has input and the second end that first end is coupled to described first switching type capacitor integrator 50.Described suitching type assembly 134 assembly has first end and the second end.Described inverter 191 has first end and is coupled to the input of described second switching type capacitor integrator 60 and the second end is coupled to described suitching type assembly 134.Described inverter 192 has first end and is coupled to described suitching type assembly 132 assembly and the second end is coupled to described suitching type assembly 133,134.Described suitching type assembly 128 has first end and is coupled to described suitching type assembly 134 assembly and the second end.Described suitching type assembly 129 has the second end and the second end that first end is coupled to described suitching type assembly 128.Described capacitor 115 has the second end and the second end that first end is coupled to described suitching type assembly 129.Described suitching type assembly 130 has first end and is coupled to the second end of described capacitor 115 and the second end is coupled to ground connection.Described suitching type assembly 131 has first end and is coupled to the second end that the second end of described capacitor 152 and the second end are coupled to described suitching type assembly 133.Described mode assembly 190 controls described first suitching type assembly 132, and described second suitching type assembly 133 and described 3rd suitching type assembly 134 are to determine the state opened or closed.
Described first switching type capacitor integrator 50 comprises full differential operation amplifier 110, capacitor 111, eight suitching type assemblies 120 ~ 123,124 ~ 127 and two capacitors 113,114.
Described full differential operation amplifier 110, have the second suitching type assembly 119,133 that first input end is coupled to described mode assembly, the second end is coupled to ground connection and output.Described first capacitor 111 has the first end that first end is coupled to the described full differential operation amplifier 110 of described first switching type capacitor integrator 50, and the second end is coupled to the output of the described full differential operation amplifier 110 of described first switching type capacitor integrator 50.
Described suitching type assembly 120 has first end and the second end that first end is coupled to described suitching type assembly 102.Described suitching type assembly 121 has the second end and the second end that first end is coupled to described suitching type assembly 120.Described capacitor 113 has the second end and one second end that first end is coupled to described suitching type assembly 113.Described suitching type assembly 114 has first end and is coupled to the second end of described capacitor 113 and the second end is coupled to ground connection.Described suitching type assembly 123 has first end and is coupled to the first output that the second end of described capacitor 113 and the second end are coupled to described full differential operation amplifier 110.
Described suitching type assembly 124 has the second end and the second end that first end is coupled to described suitching type assembly 102.Described suitching type assembly 125 has the second end and the second end that first end is coupled to described suitching type assembly 124.The second end and the second end that suitching type assembly 114 has that first end is coupled to described suitching type assembly 125.Described suitching type assembly 126 has first end and is coupled to the second end of described capacitor 114 and the second end is coupled to ground connection.Described suitching type assembly 127 has first end and is coupled to the first output that the second end of described capacitor 114 and the second end are coupled to described full differential operation amplifier 110.
Described second switching type capacitor integrator 60 comprises full differential operation amplifier 150, capacitor 151, four suitching type switches 160 ~ 163 and capacitor 153.
Described differential point of operational amplifier 150 has first input end and is coupled to described suitching type assembly 159,163, and the second input is coupled to ground connection and output.Described capacitor 151 has first end and is coupled to complete first output of differential operation amplifier 150 and the input of described quantizer 70 described in described second switching type capacitor integrator 60.
Described suitching type assembly 160 has the first output and the second end that first end is coupled to described full differential operation amplifier 110.Described suitching type assembly 161 has the second end and the second end that first end is coupled to described suitching type assembly 160.Described capacitor 153 has the second end and the second end that first end is coupled to described suitching type assembly 161.Described suitching type assembly 162 has first end and is coupled to the second end of described capacitor 153 and the second end is coupled to ground connection.Described suitching type assembly 163 has first end and is coupled to the first output that the second end of described capacitor 153 and the second end are coupled to described full differential operation amplifier 150.
According to the present invention, dual input AIN and BIN node are to provide and come from described mode assembly 190 in transmission signal to described bimodal δ-Δ analog-to-digital converter 100 and other and input mode (MODE) signal to determine described bimodal δ-Δ analog-to-digital converter 100 is for which kind of state.When mode signal equals 0, this bimodal δ-Δ analog-to-digital converter 100 operates in nearly zero intermediate frequency (NZIF) mode; When mode signal equals 1, this bimodal δ-Δ analog-to-digital converter 100 operates in Low Medium Frequency mode (lowIF).
As shown in Figure 3, for operating in the calcspar of the receiver circuit 200 of the bimodal δ-Δ analog-to-digital converter of nearly zero intermediate frequency.This radio frequency receiver framework is widely used in now.Described receiver circuit 200 comprises low noise amplifier 210; Frequency synthesizer 240; First frequency mixer 220; Second frequency mixer 221; Low pass filter 231, the first bimodal δ-Δ analog-to-digital converter 100 and the second bimodal δ-Δ analog-to-digital converter 100.Should be noted, although described mode assembly 190 is in bimodal δ-Δ analog-to-digital converter 100, in order to this receiver circuit 200 of clear expression, this mode assembly 190 is independently shown in the drawings.
This low noise amplifier (LNA) 210 amplifies received weak signals, and then this signal by frequency mixer 220,221 stage, then exceeds the interference of frequency band by low pass filter (LPF) 230 filtering.Described frequency synthesizer 240 has the first output to provide the first signal to described frequency mixer 220 and the second output to provide the second signal to described frequency mixer 221.Described frequency mixer 220 has the output that first input end is coupled to described low noise amplifier 210, and the second input is coupled to first input end and the output of described frequency synthesizer 240.Described second frequency mixer 221 has the output that first input end is coupled to described low noise amplifier 210, and the second input is coupled to described frequency synthesizer 24 second input, and output.Described low pass filter 230 has the output that first input end is coupled to described first frequency mixer 220, one second output is coupled to the output of the second frequency mixer 221, and the first output is coupled to the first bimodal δ-Δ analog-to-digital converter 100 (upper) and the second output and is coupled to one second bimodal δ-Δ analog-to-digital converter 100 (under).From the frequency reducing I of this low pass filter (LPF) 230 and Q signal transmission to this input node " AIN " and " BIN ", and individual other by analog-to-digital converter 100, but now only need to input " AIN " node.Two digital to analog converters (being positioned at below Fig. 3) are identical herein, and namely a digital to analog converter carries out I signal and another digital to analog converter carries out Q signal.
As shown in Figure 4, for described bimodal δ-Δ analog-to-digital converter 100 operates in the signal flow graph of nearly zero intermediate frequency.When the mode signal of described mode assembly 190 equals zero, now described δ-Δ analog-to-digital converter 100 operates in nearly zero intermediate frequency (NZIF) mode, described suitching type assembly 133,134 should be closed (off), and this upper strata feedback path should by open circuit, as shown in Figure 4, simultaneously, described suitching type assembly 132 should be opened (on), and input signal AIN equals BIN.So when signal feed-in, we can use its input node.Under this framework, this δ-Δ analog-to-digital converter 100 has its dead-center position of high pass noise transfer function and is seated on original frequency.
As shown in Figure 5, for operating in the calcspar of the receiver circuit 201 of the bimodal δ-Δ analog-to-digital converter of Low Medium Frequency.Same receiver architecture comprises described low noise amplifier 210 and described frequency mixer 220,221 but is linked to band pass filter (BPF) 232 and bimodal δ of the present invention-Δ analog-to-digital converter 100.Should be noted, although this mode assembly 190 is in bimodal δ-Δ analog-to-digital converter 100, in order to this receiver circuit 200 of clear expression, this mode assembly 190 is independently shown in the drawings.
Described frequency synthesizer 240 has first input end to provide the first signal to described frequency mixer 220 and the second output to provide the second signal to described frequency mixer 221.Described first frequency mixer 220 has the output that first input end is coupled to described low noise amplifier 210, and the second input is coupled to first input end and an output of described synthesizer 240.Described second frequency mixer 221 has the output that first input end is coupled to described low noise amplifier 210, and the second input is coupled to the second output and the output of described synthesizer 240.Described band pass filter 232 has the output of described first frequency mixer 220 of first input end coupling, second input is coupled to described second frequency mixer 221 output, and the first output is coupled to the first bimodal δ-Δ analog-to-digital converter 100 (above the 5th figure) and the second output is coupled to the second bimodal δ-Δ analog-to-digital converter 100 (below the 5th figure).
Frequency reducing signal before described band pass filter 232 perhaps has interfering energy and can by this second bimodal δ-Δ analog-to-digital converter 100 (below the 5th figure) institute's decipher.Described second bimodal δ-Δ digital to analog converter 100 has this detecting by monitor interference signal, once this signal is excessive and exceed the range of linearity of this band pass filter 232, this low noise amplifier 210 of prompting is reduced gain to avoid interference saturated this band pass filter (BPF) 232 of signal.Now, one δ-Δ analog-to-digital converter 100 (upper) should receive from usual I and the Q path of band pass filter (BPF) 232 by the signal of frequency reducing, then translate into the digital character code (Datastream) of data, read by Baseband processor.That is, even if this first bimodal δ-Δ analog-to-digital converter 100 (upper) and the second bimodal δ-Δ analog-to-digital converter 100 (under) are the same assembly, they receive different signals, when mode (MODE) signal of this mode assembly 190 equal 1 and this bimodal δ-Δ analog-to-digital converter 100 operate in Low Medium Frequency mode.
As shown in Figure 6, for bimodal δ-Δ analog-to-digital converter 100 operates in the signal flow graph of Low Medium Frequency.When this mode assembly 190 mode signal equal 1 and this bimodal δ-Δ analog-to-digital converter 100 operate in Low Medium Frequency mode, this suitching type assembly 133,134 should be opened (on) and this suitching type assembly 132 now should be closed (off), as shown in Figure 6.This upper strata feedback path be now link, now δ-Δ analog-to-digital converter 100 have a high pass noise transfer function wherein this dead-center position fall within intermediate frequency.The indivedual signal of " AIN " and " BIN " node processing under this framework also utilizes the operation of this switching type capacitor that input signal is summed into as " AIN+BIN ".
Although the present invention is open with aforementioned preferred embodiment, so itself and be not used to limit the present invention, anyly have the knack of this those skilled in the art, without departing from the spirit and scope of the present invention, when making various changes or modifications.Explanation described above, can do correction and the change of each pattern, and can not destroy the spirit of this creation.Therefore protection scope of the present invention is when being as the criterion depending on the accompanying claim person of defining.
Claims (14)
1. bimodal δ-Δ analog-to-digital converter, is characterized in that, comprise:
First switching type capacitor integrator, for carrying out integral operation by input signal and the first feedback signal;
Second switching type capacitor integrator, is coupled to described first switching type capacitor integrator, for the output signal of described first switching type capacitor integrator and the second feedback signal are carried out integral operation;
Quantizer, there is input to be coupled to described second switching type capacitor integrator, and there is output, for providing the output signal of described digital quantizer, this output signal has first and second logical states at least, and this first and second logical states corresponds to the output of the second switching type capacitor integrator;
Feedback circuit, be coupled to described first switching type capacitor integrator and described second switching type capacitor integrator, for providing described first feedback signal to described first switching type capacitor integrator and described second feedback signal extremely described second switching type capacitor integrator; And
Mode assembly, be coupled to the input of described first switching type capacitor integrator and the output of described second switching type capacitor integrator, for providing mode signal with the action of the action and described second switching type capacitor integrator that control described first switching type capacitor integrator.
2. bimodal δ according to claim 1-Δ analog-to-digital converter, is characterized in that, described feedback circuit comprises:
First digital to analog converter, is coupled to the input of described first switching type capacitor integrator, for providing described first feedback signal to described first switching type capacitor integrator; And
Second digital to analog converter, is coupled to the input of described second switching type capacitor integrator, for providing described second feedback signal to described second switching type capacitor integrator.
3. bimodal δ according to claim 1-Δ analog-to-digital converter, is characterized in that, described mode assembly comprises:
First suitching type assembly has first end and is coupled to the input that the input of described first switching type capacitor integrator and the second end are coupled to described second switching type capacitor integrator;
Second suitching type assembly has input and the second end that first end is coupled to described first switching type capacitor integrator; And
3rd suitching type assembly has first end and is coupled to the output that the second end of the second suitching type assembly of described mode assembly and one second end are coupled to described second switching type capacitor integrator;
Wherein said mode assembly controls described first suitching type assembly, and described second suitching type assembly and described 3rd suitching type assembly are the states opened or closed to determine.
4. bimodal δ according to claim 3-Δ analog-to-digital converter, is characterized in that, between described second suitching type assembly and the 3rd suitching type assembly, described mode assembly also comprises:
4th suitching type assembly has the second end points and the second end points that first end is coupled to described 3rd suitching type assembly; And
5th suitching type assembly has first end and is coupled to the second end points of described 4th suitching type assembly and the second endpoints couple to ground connection;
First electric capacity has first end and the second end that first end is coupled to described 5th suitching type assembly;
6th suitching type assembly has first end and is coupled to described second end of described first electric capacity and the second end is coupled to ground connection; And
7th suitching type assembly has first end and is coupled to the second end that the first end of described 6th suitching type assembly and the second end are coupled to described second suitching type assembly.
5. bimodal δ according to claim 1-Δ analog-to-digital converter, is characterized in that, described first switching type capacitor integrator comprises:
Full differential operation amplifier, has first input end, and it is coupled to the first end of the second suitching type assembly of described mode assembly; And
First electric capacity, there is first end, this first end is coupled to the described first input end of the full differential operation amplifier of described first switching type capacitor integrator, and has the second end, and this second end is coupled to the output of the full differential operation amplifier of described first switching type capacitor integrator.
6. bimodal δ according to claim 5-Δ analog-to-digital converter, is characterized in that, described first switching type capacitor integrator also comprises:
First suitching type assembly has first end and the second end that first end is coupled to described first suitching type assembly;
Second suitching type assembly has first end and is coupled to the second end of described first suitching type assembly and the second end is coupled to ground connection;
Second electric capacity has first end and the second end that first end is coupled to described second suitching type assembly;
3rd suitching type assembly has first end and is coupled to the second end of described second electric capacity and the second end is coupled to ground connection;
4th suitching type assembly has first end and is coupled to the input that the second end of described 3rd suitching type assembly and the second end are coupled to the full differential operation amplifier of described first switching type capacitor integrator;
5th suitching type assembly has the second end and the second end that first end is coupled to described first suitching type assembly;
6th suitching type assembly has first end and is coupled to the second end of described 5th suitching type assembly and the second end is coupled to ground connection;
3rd electric capacity has the second end and the second end that first end is coupled to described 6th suitching type assembly;
7th suitching type assembly has first end and is coupled to the second end of described 3rd electric capacity and the second end is coupled to ground connection;
8th suitching type assembly has first end and is bonded to the input that the second end of described 7th suitching type assembly and the second end are coupled to the full differential operation amplifier of described first switching type capacitor integrator.
7. bimodal δ according to claim 1-Δ analog-to-digital converter, wherein said second switching type capacitor integrator comprises:
Full differential operation amplifier, has first input end, and the second input is coupled to the output that ground connection and output are coupled to described quantizer; And
First electric capacity, have the first input end that first end is coupled to the full differential operation amplifier of described second switching type capacitor integrator, the second end is coupled to the output of described full differential operation amplifier.
8. bimodal δ according to claim 7-Δ analog-to-digital converter, is characterized in that, described second switching type capacitor integrator also comprises:
First suitching type assembly has first end and the second end that first end is coupled to described full differential operation amplifier;
Second suitching type assembly has first end and is coupled to the second end of described first suitching type assembly and the second end is coupled to ground connection;
Second electric capacity has first end and the second end that first end is coupled to described second suitching type assembly;
3rd suitching type assembly has first end and is coupled to the second end of described second electric capacity and the second end is coupled to ground connection;
4th suitching type assembly has first end and is coupled to the input that described second end of described 3rd suitching type assembly and the second end are coupled to the full differential operation amplifier of described second switching type capacitor integrator.
9. bimodal δ according to claim 3-Δ analog-to-digital converter, it is characterized in that, first suitching type switch between components of described mode assembly is to opening, second suitching type assembly and the 3rd suitching type assembly of described mode assembly will switch to pass, operate in nearly zero intermediate frequency mode for making described bimodal δ-Δ analog-to-digital converter.
10. bimodal δ according to claim 3-Δ analog-to-digital converter, it is characterized in that, first suitching type switch between components of described mode assembly is to closing, second suitching type assembly of described mode assembly and described 3rd suitching type switch between components, to opening, operate in Low Medium Frequency for making described bimodal δ-Δ analog-to-digital converter.
11. 1 kinds of bimodal δ-Δ simulation receiver circuits to digital circuit, comprise two bimodal δ as claimed in claim 1-Δ analog-to-digital converter, be respectively the first bimodal δ-Δ analog-to-digital converter and the second bimodal δ-Δ analog-to-digital converter, it is characterized in that, comprise:
Low noise amplifier, has output;
Frequency synthesizer, has the first output, for providing the first signal and the second output for providing the second output signal;
First frequency mixer, has the output that first input end is coupled to described low noise amplifier, and the second input is coupled to the first output of described frequency synthesizer, and output;
Second frequency mixer, has the output that first input end is coupled to described low noise amplifier, and the second input is coupled to the second output of described frequency synthesizer, and output;
Low pass filter, there is the output that first input end is coupled to the first frequency mixer, second input is coupled to the output of the second frequency mixer, and the first output is coupled to described first bimodal δ-Δ analog-to-digital converter and the second output is coupled to described second bimodal δ-Δ analog-to-digital converter.
The 12. bimodal δ according to claim 11-receiver circuit of Δ simulation to digital circuit, it is characterized in that, first suitching type switch between components of the described mode assembly of described first bimodal δ-Δ analog-to-digital converter and described second bimodal δ-Δ analog-to-digital converter is to opening, second suitching type assembly and the 3rd suitching type assembly of the described mode assembly of described first bimodal δ-Δ analog-to-digital converter and described second bimodal δ-Δ analog-to-digital converter will switch to pass, nearly zero intermediate frequency mode is operated in for making described first bimodal δ-Δ analog-to-digital converter and described second bimodal δ-Δ analog-to-digital converter.
13. 1 kinds of bimodal δ-Δ simulation receiver circuits to digital circuit, is characterized in that, comprise:
Low noise amplifier, has output;
Frequency synthesizer, has the first output, for providing the first signal and for providing the second output second output signal;
First frequency mixer, has the output that first input end is coupled to described low noise amplifier, and the second input is coupled to the first output of described frequency synthesizer, and output;
Second frequency mixer, has the output that first input end is coupled to described low noise amplifier, and the second input is coupled to the second output of described frequency synthesizer, and output;
Band pass filter, there is the output that first input end is coupled to the first frequency mixer, second input is coupled to the output of the second frequency mixer, and the first output is coupled to first bimodal δ-Δ analog-to-digital converter as claimed in claim 1 and the second output is coupled to second bimodal δ-Δ analog-to-digital converter as claimed in claim 1.
The 14. bimodal δ according to claim 13-receiver circuit of Δ simulation to digital circuit, it is characterized in that, first suitching type switch between components of the mode assembly of described first bimodal δ-Δ analog-to-digital converter as claimed in claim 1 and described second bimodal δ-Δ analog-to-digital converter as claimed in claim 1 is to closing, second suitching type assembly of the mode assembly of described first bimodal δ-Δ analog-to-digital converter as claimed in claim 1 and described second bimodal δ-Δ analog-to-digital converter as claimed in claim 1 and the 3rd suitching type switch between components are to opening, described first bimodal δ-Δ analog-to-digital converter as claimed in claim 1 and described second bimodal δ-Δ analog-to-digital converter as claimed in claim 1 is made to operate in Low Medium Frequency mode.
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| TW100136372A TWI477086B (en) | 2011-10-06 | 2011-10-06 | A dual mode sigma delta analog to digital converter and circuit using the same |
| TW100136372 | 2011-10-06 |
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| TWI513182B (en) * | 2013-06-19 | 2015-12-11 | Coretex Technology Corp | Switched capacitor filter device and filtering method thereof |
| US9041842B2 (en) * | 2013-07-12 | 2015-05-26 | Omnivision Technologies, Inc. | Image sensor pixel cell readout architecture |
| CN105007069A (en) * | 2015-06-26 | 2015-10-28 | 深圳市芯海科技有限公司 | Digital to analog converter and multiplexer for capacitance detection |
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| US6225928B1 (en) * | 1999-03-10 | 2001-05-01 | Cirrus Logic Inc. | Complex bandpass modulator and method for analog-to-digital converters |
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| JP2009534874A (en) * | 2006-01-11 | 2009-09-24 | クゥアルコム・インコーポレイテッド | Sigma-delta modulation with offset |
| US7792513B2 (en) * | 2007-09-19 | 2010-09-07 | The Regents Of The University Of California | Distributed RF front-end for UWB receivers |
| US8849226B2 (en) * | 2009-08-13 | 2014-09-30 | Cascoda Limited | Wireless receiver |
| TWI437826B (en) * | 2010-05-24 | 2014-05-11 | Infomax Comm Co Ltd | Shared switched-capacitor integrator, sigma-delta modulator, and operating method therefor |
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| US5461381A (en) * | 1993-12-13 | 1995-10-24 | Motorola, Inc. | Sigma-delta analog-to-digital converter (ADC) with feedback compensation and method therefor |
| US6225928B1 (en) * | 1999-03-10 | 2001-05-01 | Cirrus Logic Inc. | Complex bandpass modulator and method for analog-to-digital converters |
| US6954628B2 (en) * | 2000-11-24 | 2005-10-11 | Koninklijke Phillips Electronics N.V. | Radio receiver |
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| TW201316698A (en) | 2013-04-16 |
| CN103036571A (en) | 2013-04-10 |
| TWI477086B (en) | 2015-03-11 |
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