CN103036219A - Low-voltage micro-grid comprehensive protection method - Google Patents
Low-voltage micro-grid comprehensive protection method Download PDFInfo
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- CN103036219A CN103036219A CN2012105268775A CN201210526877A CN103036219A CN 103036219 A CN103036219 A CN 103036219A CN 2012105268775 A CN2012105268775 A CN 2012105268775A CN 201210526877 A CN201210526877 A CN 201210526877A CN 103036219 A CN103036219 A CN 103036219A
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Abstract
The invention relates to a low-voltage micro-grid comprehensive protection method which is used for solving the problem that a traditional protection method is not suitable for micro-grid. The low-voltage micro-grid comprehensive protection method is adapted to a micro-grid isolated island operation mode and a grid-connected operation mode and can be achieved through a logical function. Therefore, protection of the micro-grid under the two operation modes is achieved. No communication link is needed. The micro-grid comprehensive protection method is obviously different from a traditional self-adaption protection device. The micro-grid comprehensive protection method is characterized in that protection effectiveness is of an independent failure current level, a micro-grid operation mode and a distributed generation capacity and type to a large extent and is only related to different parameter settings of the two operation modes. Not only can single phase protection be achieved but also three-phase protection can be achieved. Safety of electrical energy supply is improved.
Description
Technical field
The present invention relates to little electric network protection field, particularly a kind of little electric network protection method.
Background technology
For electric power system, little electrical network is similar to an independently control unit, and wherein each little power supply has that simply namely to pull out be plugging function.A simple little electric network composition as shown in Figure 1.Main electrical network connects the open connection bus of little electrical network by QF, passes through respectively QF1, QF2 connexon bus 1 and primary and secondary line 2 on the public connection bus.Connect little power supply (DR1, DR2, DR3) and load on primary and secondary line 1 and the primary and secondary line 2.
The structure of little electrical network has proposed some special requirements to relaying protection.The tradition power distribution network mostly is greatly radial pattern, terminal non-transformer, and because little power supply has been arranged, the electric current of flowing through on the protective device may be for two-way.In case little electrical network islet operation, capacity of short circuit has large variation, has affected the normal operation of original some protective relaying device.Changed the mode of original single distributed power generation access electrical network, one of original intention that consists of little electrical network is to keep as much as possible some important loads can normally move when electric network fault and do not make its power failure, these important loads often are to voltage-sensitive, namely working voltage does not change excessive, overlong time, must adopt some QA switches, to replace the slower switch of original relative action for this reason.The problems referred to above all may make traditional protective device and strategy no longer be adapted to little electrical network, so must propose the new protection that is applicable to little electrical network and control strategy.
Explanation of nouns: distributed power generation DG(distributed generation) refer to for the specific demand of satisfying the terminal use, be connected near the small power generation system user's side.Little power supply, i.e. distributed power source DR(Distributed Resource) refer to distributed power generation and energy storage device ES(Energy Storage) association system (DR=DG+ES).
Summary of the invention
The purpose of this invention is to provide the little electric network synthetic guard method of a kind of low pressure, be not suitable for the problem of little electrical network in order to solve the traditional protection method.
For achieving the above object, the solution of the present invention is: the little electric network synthetic guard method of low pressure, and for the arbitrary circuit breaker in little electrical network, step is as follows:
1) gathers: gather three-phase voltage, the three-phase current signal of circuit breaker, obtain negative sequence voltage V2 by negative phase-sequence measuring component and zero sequence measuring component, negative-sequence current I2 and zero-sequence current I0;
2) signal logic processing: described negative sequence voltage V2 and negative-sequence current I2 obtain negative zero order direction logical signal PDU_L through power direction measuring unit PDU, and each phase current signal obtains transient state overcurrent protection logical signal AOC_L, BOC_L, the COC_L of corresponding phase by transient state overcurrent measuring unit TOCU; The electric current of arbitrary phase and voltage through power direction measuring unit PDU after and negative zero order direction logical signal PDU_L get or obtain direction logical signal PDU_La, PDU_Lb, the PDU_Lc of corresponding phase; Each phase voltage signal obtains under voltage logical signal UVU_La, UVU_Lb, the UVU_Lc of corresponding phase through under voltage protection unit UVU;
Transient state overcurrent protection logical signal AOC_L, BOC_L, COC_L and interface enable signal IE are mutually or obtain the first logical signal PDU_La1, PDU_Lb1, the PDU_Lc1 of corresponding phase, transient state overcurrent protection logical signal AOC_L, BOC_L, COC_L process
TD_IOCPostpone to get or obtain the second logical signal PDU_La2, PDU_Lb2, PDU_Lc2 with corresponding under voltage logical signal UVU_La, UVU_Lb, UVU_Lc mutually;
The first logical signal PDU_La1, PDU_Lb1, PDU_Lc1, the second logical signal PDU_La2, PDU_Lb2, PDU_Lc2 and direction logical signal PDU_La, PDU_Lb, PDU_Lc mutually with, then postpone to obtain the 3rd logical signal PDU_La3, PDU_Lb3, PDU_Lc3 through TD_IF;
After direction logical signal PDU_La, PDU_Lb, the PDU_Lc negate with the second logical signal PDU_La2, PDU_Lb2, PDU_Lc2 mutually with, then postpone to obtain the 4th logical signal PDU_La4, PDU_Lb4, PDU_Lc4 through TD_IR;
3) during islet operation, if the 3rd logical signal PDU_La3, PDU_Lb3, PDU_Lc3, any is 1 among the 4th logical signal PDU_La4, PDU_Lb4, the PDU_Lc4, and interface enable signal IE is 0, and then correspondence trips mutually;
When 4) being incorporated into the power networks; each phase current signal obtains the 5th logical signal PDU_La5, PDU_Lb5, PDU_Lc5 by the inverse-time overcurrent protection element; the 5th logical signal PDU_La5, PDU_Lb5, PDU_Lc5 and direction logical signal PDU_La, PDU_Lb, PDU_Lc mutually with, then pass through
TD_GFPostpone to obtain the 6th logical signal PDU_La6, PDU_Lb6, PDU_Lc6; After direction logical signal PDU_La, PDU_Lb, the PDU_Lc negate with the 5th logical signal PDU_La5, PDU_Lb5, PDU_Lc5 mutually with, then pass through
TD_GRPostpone to obtain the 7th logical signal PDU_La7, PDU_Lb7, PDU_Lc7; When being incorporated into the power networks, if the 6th logical signal PDU_La6, PDU_Lb6, PDU_Lc6, any is 1 among the 7th logical signal PDU_La7, PDU_Lb7, the PDU_Lc7, and interface enable signal IE is 0, and then correspondence trips mutually;
5) each phase current signal by behind the high impedance protection component through
TD_HIFPostpone to obtain the 8th logical signal PDU_La8, PDU_Lb8, PDU_Lc8, the 8th logical signal PDU_La8, PDU_Lb8, PDU_Lc8 and direction logical signal PDU_La, PDU_Lb, PDU_Lc get and obtain the 9th logical signal PDU_La9, PDU_Lb9, PDU_Lc9, if the 9th logical signal PDU_La9, PDU_Lb9, PDU_Lc9 are 1, and interface enable signal IE is 0, and then correspondence trips mutually; It is isolated island module forward direction time delay module that TD_IF postpones, and it is the backward time delay module of isolated island module that TD_IR postpones, and it is the module forward direction time delay module that is incorporated into the power networks that TD_GF postpones, and it is the backward time delay module of module that is incorporated into the power networks that TD_GR postpones.
The one or three phase logic signal is got or obtained to the 3rd, the 4th, the 6th, the 7th and the 9th logical signal of each phase;
Negative-sequence current I2 and zero-sequence current I0 get or obtain the two or three phase logic signal TP_L2 by the signal behind the transient state overcurrent measuring unit TOCU respectively, the transient state overcurrent protection logical signal AOC_L of each phase, BOC_L, COC_L get or obtain the three or three phase logic signal TP_L3, and the direction logical signal PDU_La of each phase, PDU_Lb, PDU_Lc and negative zero order direction logical signal PDU_L get or obtain the four or three phase logic signal PDU_Labc;
Second, third and the four or three phase logic signal get with, then pass through
TD_TFPostpone to obtain the five or three phase logic signal TP_Lm, after the four or the three phase logic signal negate and first, second three phase logic signal get with, then pass through
TD_TRPostpone to obtain the six or three phase logic signal TP_Ln;
Three-phase voltage signal obtains the seven or three phase logic signal after by neutral point voltage offset measurement unit NVS;
If any is 1 for the five or three phase logic signal TP_Lm, the six or three phase logic signal TP_Ln, then three-phase tripping operation; If the seven or three phase logic signal and interface enable signal IE are 1 simultaneously, then three-phase tripping operation; If the one or three phase logic signal and interface enable signal IE are 1 simultaneously, then three-phase tripping operation;
It is three-phase module forward direction time delay module that TD_TF postpones, and the TD_TR time-delay is the backward time delay module of three-phase module.
If main electrical network three-phase voltage signal Vabc-grid is synchronous with the three-phase voltage signal Vabc of the circuit breaker that is incorporated into the power networks, then
Circuit breaker is incorporated into the power networksClosed.
Method of the present invention can be adapted to little electrical network islet operation pattern and the pattern that is incorporated into the power networks; this protection scheme can be realized by logic function; efficiently solve the protection problem of little electrical network under these two kinds of operator schemes; this protection scheme does not need communication link, with traditional self-adaptive protector obvious difference is arranged.Its outstanding feature is that the validity of protection is independent failure levels of current, little operation of power networks pattern and distributed power generation cell capability size and type to a great extent, only from two kinds of operational modes under different parameter arrange relevant.Method of the present invention not only can realize single phasing protection, can also realize three-phase protective, has improved the fail safe of electric power energy supply.
Description of drawings
Fig. 1 is a kind of little configuration of power network.
Embodiment
The present invention will be further described in detail below in conjunction with accompanying drawing.
Little electrical network as shown in Figure 1, main electrical network connects a little electrical network by transformer, and the rapid static switch connects a bus of main electrical network and little electrical network, and this bus connects respectively two strip buses by QF1, QF2, is equipped with little power supply and respective load on the primary and secondary line.The rapid static switch is used for the isolated island/switching of being incorporated into the power networks, and QF1, QF2 are used for little power supply and load on the corresponding primary and secondary line of excision/input.Rapid static switch, QF1, QF2 all arrange protective device on the spot, three-phase voltage, the electric current of in-site collecting respective circuit breakers below.Protective device adopts micro-chip processor that Information Monitoring is processed, output control circuit breaker trip.
For arbitrary circuit breaker, its guard method for protective device comprises:
Gather:Gather three-phase voltage, the three-phase current signal of circuit breaker, obtain negative sequence voltage (V2) by negative phase-sequence measuring component and zero sequence measuring component, negative-sequence current (I2) and zero-sequence current (I0);
The signal logic processing:Described negative sequence voltage (V2) and negative-sequence current (I2) obtain negative zero order direction logical signal (PDU_L) through power direction measuring unit (PDU), and each phase current signal obtains the transient state overcurrent protection logical signal (AOC_L, BOC_L, COC_L) of corresponding phase by transient state overcurrent measuring unit (TOCU); The electric current of arbitrary phase and voltage through power direction measuring unit (PDU) after and negative zero order direction logical signal (PDU_L) get or obtain the direction logical signal (PDU_La, PDU_Lb, PDU_Lc) of corresponding phase; Each phase voltage signal obtains the under voltage logical signal (UVU_La, UVU_lb, UVU_Lc) of corresponding phase through under voltage protection unit (UVU);
Transient state overcurrent protection logical signal (AOC_L, BOC_L, COC_L) and interface enable signal (IE) are mutually or obtain first logical signal (PDU_La1, PDU_Lb1, PDU_Lc1) of corresponding phase, transient state overcurrent protection logical signal (AOC_L, BOC_L, COC_L) process
TD_IOCPostpone to get or obtain the second logical signal (PDU_La2, PDU_Lb2, PDU_Lc2) with corresponding under voltage logical signal (UVU_La, UVU_lb, UVU_Lc) mutually;
The first logical signal (PDU_La1, PDU_Lb1, PDU_Lc1), the second logical signal (PDU_La2, PDU_Lb2, PDU_Lc2) and direction logical signal (PDU_La, PDU_Lb, PDU_Lc) with, then pass through
TD_IFPostpone to obtain the 3rd logical signal (PDU_La3, PDU_Lb3, PDU_Lc3);
After direction logical signal (PDU_La, PDU_Lb, the PDU_Lc) negate with the second logical signal (PDU_La2, PDU_Lb2, PDU_Lc2) with, then pass through
TD_IRPostpone to obtain the 4th logical signal (PDU_La4, PDU_Lb4, PDU_Lc4);
Protection is divided into single phasing protection and three-phase protective, and single phasing protection comprises islet operation protection, the protection of being incorporated into the power networks, high impedance protection.
During islet operation,If the 3rd logical signal (PDU_La3, PDU_Lb3, PDU_Lc3), any is 1 in the 4th logical signal (PDU_La4, PDU_Lb4, PDU_Lc4), and interface enable signal (IE) is 0, and then correspondence trips mutually;
When being incorporated into the power networks,Each phase current signal obtains the 5th logical signal (PDU_La5, PDU_Lb5, PDU_Lc5) by the inverse-time overcurrent protection element; the 5th logical signal (PDU_La5, PDU_Lb5, PDU_Lc5) and direction logical signal (PDU_La, PDU_Lb, PDU_Lc) with, then pass through
TD_GFPostpone to obtain the 6th logical signal (PDU_La6, PDU_Lb6, PDU_Lc6); After direction logical signal (PDU_La, PDU_Lb, the PDU_Lc) negate with the 5th logical signal (PDU_La5, PDU_Lb5, PDU_Lc5) with, then pass through
TD_GRPostpone to obtain the 7th logical signal (PDU_La7, PDU_Lb7, PDU_Lc7); When being incorporated into the power networks, if the 6th logical signal (PDU_La6, PDU_Lb6, PDU_Lc6), any is 1 in the 7th logical signal (PDU_La7, PDU_Lb7, PDU_Lc7), and interface enable signal (IE) is 0, and then correspondence trips mutually;
The high impedance protection:Each phase current signal by behind the high impedance protection component through
TD_HIFPostpone to obtain the 8th logical signal (PDU_La8, PDU_Lb8, PDU_Lc8), the 8th logical signal (PDU_La8, PDU_Lb8, PDU_Lc8) and direction logical signal (PDU_La, PDU_Lb, PDU_Lc) are got and are obtained the 9th logical signal (PDU_La9, PDU_Lb9, PDU_Lc9), if the 9th logical signal (PDU_La9, PDU_Lb9, PDU_Lc9) is 1, and interface enable signal (IE) is 0, and then correspondence trips mutually;
Three-phase protective:The one or three phase logic signal is got or obtained to the 3rd, the 4th, the 6th, the 7th and the 9th logical signal of each phase;
The two or three phase logic signal (TP_L2) is got or obtained to negative-sequence current (I2) and zero-sequence current (I0) by the signal behind the transient state overcurrent measuring unit (TOCU) respectively, the three or three phase logic signal (TP_L3) is got or obtained to the transient state overcurrent protection logical signal (AOC_L, BOC_L, COC_L) of each phase, and the four or three phase logic signal (PDU_Labc) is got or obtained to the direction logical signal of each phase (PDU_La, PDU_Lb, PDU_Lc) and negative zero order direction logical signal (PDU_L2);
Second, third and the four or three phase logic signal get with, then pass through
TD_TFPostpone to obtain the five or three phase logic signal (TP_Lm), after the four or the three phase logic signal negate and first, second three phase logic signal get with, then pass through
TD_TRPostpone to obtain the six or three phase logic signal (TP_Ln);
Three-phase voltage signal obtains the seven or three phase logic signal after by neutral point voltage offset measurement element (NVS);
If any is 1 for the five or three phase logic signal (TP_Lm), the six or three phase logic signal (TP_Ln), then three-phase tripping operation; If the seven or three phase logic signal and interface enable signal (IE) they are 1 simultaneously, then three-phase tripping operation; If the one or three phase logic signal and interface enable signal (IE) they are 1 simultaneously, then three-phase tripping operation.
And network interface:If main electrical network three-phase voltage signal (Vabc-grid) is synchronous with the three-phase voltage signal (Vabc) that the rapid static switch gathers, the circuit breaker that then is incorporated into the power networks, i.e. rapid static switch closure among Fig. 1.
Power direction measuring unit (PDU), the physical significance of its output are the flow of power directions of measuring on the feeder line.Transient state overcurrent measuring unit (TOCU), the physical significance of its output are to measure transient state momentary excess current on the feeder line.Under voltage protection unit (UVU), its physical significance are to measure low-voltage landing on the feeder line.Interface enable signal IE be the whole protected location of the control control signal of whether working (with logic level 1 for effectively or 0 be invalid representation).The high impedance protected location changes the high impedance fault measuring unit into, and its physical significance is the electric current when measuring high impedance fault.It is isolated island module forward direction time delay module that TD_IF postpones, it is the backward time delay module of isolated island module that TD_IR postpones, it is the module forward direction time delay module that is incorporated into the power networks that TD_GF postpones, it is the backward time delay module of module that is incorporated into the power networks that TD_GR postpones, it is three-phase module forward direction time delay module that TD_TF postpones, and the TD_TR time-delay is the backward time delay module of three-phase module.More than various measuring units and module all belong to ordinary skill in the art means, so do not repeat them here.
Claims (3)
1. the little electric network synthetic guard method of low pressure is characterized in that, for the arbitrary circuit breaker in little electrical network, step is as follows:
1) gathers: gather three-phase voltage, the three-phase current signal of circuit breaker, obtain negative sequence voltage V2 by negative phase-sequence measuring component and zero sequence measuring component, negative-sequence current I2 and zero-sequence current I0;
2) signal logic processing: described negative sequence voltage V2 and negative-sequence current I2 obtain negative zero order direction logical signal PDU_L through power direction measuring unit PDU, and each phase current signal obtains transient state overcurrent protection logical signal AOC_L, BOC_L, the COC_L of corresponding phase by transient state overcurrent measuring unit TOCU; The electric current of arbitrary phase and voltage through power direction measuring unit PDU after and negative zero order direction logical signal PDU_L get or obtain direction logical signal PDU_La, PDU_Lb, the PDU_Lc of corresponding phase; Each phase voltage signal obtains under voltage logical signal UVU_La, UVU_Lb, the UVU_Lc of corresponding phase through under voltage protection unit UVU;
Transient state overcurrent protection logical signal AOC_L, BOC_L, COC_L and interface enable signal IE mutually or obtain the first logical signal PDU_La1, PDU_Lb1, the PDU_Lc1 of corresponding phase, transient state overcurrent protection logical signal AOC_L, BOC_L, COC_L postpone to get or obtain the second logical signal PDU_La2, PDU_Lb2, PDU_Lc2 with corresponding under voltage logical signal UVU_La, UVU_Lb, UVU_Lc mutually through TD_IOC;
The first logical signal PDU_La1, PDU_Lb1, PDU_Lc1, the second logical signal PDU_La2, PDU_Lb2, PDU_Lc2 and direction logical signal PDU_La, PDU_Lb, PDU_Lc mutually with, then postpone to obtain the 3rd logical signal PDU_La3, PDU_Lb3, PDU_Lc3 through TD_IF;
After direction logical signal PDU_La, PDU_Lb, the PDU_Lc negate with the second logical signal PDU_La2, PDU_Lb2, PDU_Lc2 mutually with, then postpone to obtain the 4th logical signal PDU_La4, PDU_Lb4, PDU_Lc4 through TD_IR;
3) during islet operation, if the 3rd logical signal PDU_La3, PDU_Lb3, PDU_Lc3, any is 1 among the 4th logical signal PDU_La4, PDU_Lb4, the PDU_Lc4, and interface enable signal IE is 0, and then correspondence trips mutually;
When 4) being incorporated into the power networks, each phase current signal obtains the 5th logical signal PDU_La5, PDU_Lb5, PDU_Lc5 by the inverse-time overcurrent protection element, the 5th logical signal PDU_La5, PDU_Lb5, PDU_Lc5 and direction logical signal PDU_La, PDU_Lb, PDU_Lc mutually with, then postpone to obtain the 6th logical signal PDU_La6, PDU_Lb6, PDU_Lc6 through TD_GF; After direction logical signal PDU_La, PDU_Lb, the PDU_Lc negate with the 5th logical signal PDU_La5, PDU_Lb5, PDU_Lc5 mutually with, then postpone to obtain the 7th logical signal PDU_La7, PDU_Lb7, PDU_Lc7 through TD_GR; When being incorporated into the power networks, if the 6th logical signal PDU_La6, PDU_Lb6, PDU_Lc6, any is 1 among the 7th logical signal PDU_La7, PDU_Lb7, the PDU_Lc7, and interface enable signal IE is 0, and then correspondence trips mutually;
5) each phase current signal postpones to obtain the 8th logical signal PDU_La8, PDU_Lb8, PDU_Lc8 through TD_HIF after by the high impedance protection component, the 8th logical signal PDU_La8, PDU_Lb8, PDU_Lc8 and direction logical signal PDU_La, PDU_Lb, PDU_Lc get and obtain the 9th logical signal PDU_La9, PDU_Lb9, PDU_Lc9, if the 9th logical signal PDU_La9, PDU_Lb9, PDU_Lc9 are 1, and interface enable signal IE is 0, and then correspondence trips mutually; It is isolated island module forward direction time delay module that TD_IF postpones, and it is the backward time delay module of isolated island module that TD_IR postpones, and it is the module forward direction time delay module that is incorporated into the power networks that TD_GF postpones, and it is the backward time delay module of module that is incorporated into the power networks that TD_GR postpones.
2. the little electric network synthetic guard method of low pressure according to claim 1 is characterized in that:
The one or three phase logic signal is got or obtained to the 3rd, the 4th, the 6th, the 7th and the 9th logical signal of each phase;
Negative-sequence current I2 and zero-sequence current I0 get or obtain the two or three phase logic signal TP_L2 by the signal behind the transient state overcurrent measuring unit TOCU respectively, the transient state overcurrent protection logical signal AOC_L of each phase, BOC_L, COC_L get or obtain the three or three phase logic signal TP_L3, and the direction logical signal PDU_La of each phase, PDU_Lb, PDU_Lc and negative zero order direction logical signal PDU_L get or obtain the four or three phase logic signal PDU_Labc;
Second, third and the four or three phase logic signal get with, then postpone to obtain the five or three phase logic signal TP_Lm through TD_TF, after the four or the three phase logic signal negate and first, second three phase logic signal get with, then postpone to obtain the six or three phase logic signal TP_Ln through TD_TR;
Three-phase voltage signal obtains the seven or three phase logic signal after by neutral point voltage offset measurement unit NVS;
If any is 1 for the five or three phase logic signal TP_Lm, the six or three phase logic signal TP_Ln, then three-phase tripping operation; If the seven or three phase logic signal and interface enable signal IE are 1 simultaneously, then three-phase tripping operation; If the one or three phase logic signal and interface enable signal IE are 1 simultaneously, then three-phase tripping operation;
It is three-phase module forward direction time delay module that TD_TF postpones, and the TD_TR time-delay is the backward time delay module of three-phase module.
3. the little electric network synthetic guard method of low pressure according to claim 1 is characterized in that: if main electrical network three-phase voltage signal Vabc-grid is synchronous with the three-phase voltage signal Vabc of the circuit breaker that is incorporated into the power networks, breaker closing then is incorporated into the power networks.
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| CN103401227A (en) * | 2013-06-26 | 2013-11-20 | 国家电网公司 | Fictitious load based rapid fault isolating method and system suitable for microgrid |
| CN103354354B (en) * | 2013-06-26 | 2016-03-02 | 国家电网公司 | Be applicable to impedance protecting method and the device of micro-capacitance sensor |
| CN103401227B (en) * | 2013-06-26 | 2016-11-23 | 国家电网公司 | The fault based on virtual load being applicable to micro-capacitance sensor quickly isolates method and system |
| CN104836214A (en) * | 2015-04-17 | 2015-08-12 | 国家电网公司 | Distributed generation-based grid connection transition operation mode coordination comprehensive protection method |
| CN104836214B (en) * | 2015-04-17 | 2016-02-17 | 国家电网公司 | A kind of based on distributed power generation grid-connected transition operational mode coordination comprehensive method of protection |
| CN108110738A (en) * | 2017-12-19 | 2018-06-01 | 北京天诚同创电气有限公司 | For method, relay and the system of micro-capacitance sensor protection |
| CN108110738B (en) * | 2017-12-19 | 2019-06-04 | 北京天诚同创电气有限公司 | Method, relay and system for micro-capacitance sensor protection |
| CN112152190A (en) * | 2019-06-28 | 2020-12-29 | 北京天诚同创电气有限公司 | Micro-grid interphase short-circuit fault protection method and system |
| CN112152190B (en) * | 2019-06-28 | 2023-11-03 | 北京天诚同创电气有限公司 | Micro-grid interphase short-circuit fault protection method and system |
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