CN103023445B - A kind ofly to detect and the difference analogue fore device of transmission system for low frequency signal - Google Patents

A kind ofly to detect and the difference analogue fore device of transmission system for low frequency signal Download PDF

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Publication number
CN103023445B
CN103023445B CN201010166191.0A CN201010166191A CN103023445B CN 103023445 B CN103023445 B CN 103023445B CN 201010166191 A CN201010166191 A CN 201010166191A CN 103023445 B CN103023445 B CN 103023445B
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resistance
differential amplifier
electric capacity
amplifier
output
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CN103023445A (en
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赵辉
潘文杰
蒋宇
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Nationz Technologies Inc
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Nationz Technologies Inc
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Priority to CN201010166191.0A priority Critical patent/CN103023445B/en
Priority to PCT/CN2010/073665 priority patent/WO2011140728A1/en
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45475—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B5/00—Near-field transmission systems, e.g. inductive loop type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45138—Two or more differential amplifiers in IC-block form are combined, e.g. measuring amplifiers

Abstract

The present invention relates to and a kind ofly to detect and the difference analogue fore device of transmission system for low frequency signal, be applied near field communication system, comprise at least one magnetic induction module, at least one low-pass filtering module, at least one amplifier, at least one digital/analog converter and at least one comparator, described magnetic induction module, low-pass filtering module, amplifier is connected in turn, the output of described amplifier is connected with the positive input of described comparator, the output of described digital/analog converter is connected with the reverse input end of described comparator, described amplifier is differential amplifier.The present invention can reduce circuit noise and ambient noise detects low frequency signal and the interference of low frequency signal received in transmission system, thus improves the precision of low frequency alternating magnetic field distance detection and control.

Description

A kind ofly to detect and the difference analogue fore device of transmission system for low frequency signal
Technical field
The present invention relates to the communications field, particularly relate to and a kind ofly to detect and the difference analogue fore device of transmission system for low frequency signal, and the method utilizing this device to detect low frequency signal.
Background technology
Nowadays, there is SIM (the Subscriber Identity Module in mobile phone, subscriber identification module) card increases radio-frequency enabled (being called radio-frequency SIM card) or on cell phone mainboard, increases proximity communication module to realize the method for mobile phone short-range communication, the appearance of this method makes mobile phone become one can to supplement with money, consume, conclude the business and the super intelligent terminal of authentication, greatly meet the active demand in market.
Wherein, based on radio-frequency SIM mobile phone closely solution simple with it, paid close attention to widely without the need to changing the advantages such as mobile phone, in this scenario, radio-frequency SIM adopts UHF (Ultra High Frequency, hyperfrequency) etc. technology when making radio-frequency SIM card be embedded in interior of mobile phone radiofrequency signal still can transmit from mobile phone, thus realize need not carrying out any structural change to existing mobile phone mobile phone just can be made to possess short-range communication function.But, different mobile phone causes radiofrequency signal transmission effects to there is very large difference because internal structure is different, strong its radio-frequency SIM card radio frequency communication distance of mobile phone of transmission may reach the distance of several meters far away, and weak its communication distance of radio frequency SIM card of mobile phone of transmission also can reach tens centimetres.In mobile payment application, as public transport subway is swiped the card, usually all can have strict requirement to guarantee the safety of concluding the business for transaction distance, required distance of such as concluding the business is limited in below 10cm, to prevent user from missing brush in unwitting situation, causes damage; On the other hand, the reliability ensureing to communicate below predetermined distance is also required, to improve the efficiency of transaction.Therefore, based on the mobile phone of radio-frequency SIM while increase short-range communication function, the distance range that it is concluded the business also must be effectively controlled.
Therefore also been proposed a kind of low frequency alternating magnetic field Near Field Communication in conjunction with the system and method for RF high frequency communications, solve the problems referred to above.This system utilizes low frequency alternating magnetic field to realize distance detection and control, and realizes the one-way communication of card reader and card, utilizes RF passage to realize the reliable binding of terminal in conjunction with low frequency communication, utilizes RF passage to realize the data communication of high speed between card reader and card simultaneously.But, in the program, low frequency signal detects and in transmission system (being in a side of card), received low frequency signal is mingled with circuit noise and ambient noise, have impact on the precision of distance detection and control, therefore, how effectively reduction circuit noise and the interference of ambient noise to low frequency signal become one of current problem demanding prompt solution.
Summary of the invention
Technical problem to be solved by this invention is to provide and a kind ofly detects and the difference analogue fore device of transmission system for low frequency signal, reduction circuit noise and ambient noise, to the interference of low frequency signal received in low frequency signal detection and transmission system, improve the precision of low frequency alternating magnetic field distance detection and control.
For solving the problems of the technologies described above, the present invention proposes and a kind ofly to detect and the difference analogue fore device of transmission system for low frequency signal, be applied near field communication system, comprise at least one magnetic induction module, at least one low-pass filtering module, at least one amplifier, at least one digital/analog converter and at least one comparator, described magnetic induction module, low-pass filtering module, amplifier is connected in turn, the output of described amplifier is connected with the positive input of described comparator, the output of described digital/analog converter is connected with the reverse input end of described comparator, described amplifier is differential amplifier.
Further, said apparatus also can have following characteristics, comprise a magnetic induction module, a low-pass filtering module, an amplifier, two digital/analog converters and two comparators, described magnetic induction module, low-pass filtering module, amplifier is connected in turn, the output of described amplifier is connected with the positive input of described two comparators respectively, described two digital/analog converters and described two comparators form two-way, in each road, the output of digital/analog converter is connected with the reverse input end of comparator, every two-way up and down partners, a pair totally.
Further, said apparatus also can have following characteristics, comprise a magnetic induction module, a low-pass filtering module, amplifier, six digital/analog converters and six comparators, the output of described amplifier is connected with the positive input of described six comparators respectively, described six digital/analog converters and described six comparators form six tunnels, in each road, the output of digital/analog converter is connected with the reverse input end of comparator, every two-way up and down partners, and totally three is right.
Further, said apparatus also can have following characteristics, and described magnetic induction module is difference magnetic induction coil, difference hall device or difference giant reluctivity device.
Further, said apparatus also can have following characteristics, and described magnetic induction module is difference magnetic induction coil, and two outputs of described difference magnetic induction coil are directly connected with two inputs of described low-pass filtering module.
Further, said apparatus also can have following characteristics, and described magnetic induction module is difference hall device, and two outputs of described difference hall device are connected by capacitance and described low-pass filtering module two inputs; Or described difference hall device output is connected by capacitance and described low-pass filtering module input, and another output of described difference hall device is directly connected with another input of low-pass filtering module; Or two outputs of described difference hall device are directly connected with two inputs of described low-pass filtering module.
Further, said apparatus also can have following characteristics, and described magnetic induction module is difference giant reluctivity device, and two outputs of described difference giant reluctivity device are connected with two inputs of described low-pass filtering module by capacitance; Or an output of described difference giant reluctivity device is connected with an input of described low-pass filtering module by capacitance, and another output of described difference giant reluctivity device is directly connected with another input of described low-pass filtering module; Or two outputs of described difference giant reluctivity device are directly connected with two inputs of described low-pass filtering module.
Further, said apparatus also can have following characteristics, and described amplifier is the simple-stage differential amplifier or the multi-stage cascade differential amplifier that are connected into resistive degeneration network.
Further, said apparatus also can have following characteristics, and described amplifier is level Four cascaded differential amplifier, consisting of of this level Four cascaded differential amplifier:
The first order comprises the first differential amplifier, resistance R a1, resistance R b1, resistance R a11, resistance R b11, electric capacity C 1with electric capacity C 11; Resistance R a1a termination positive signal input port AINP, other end connecting resistance R b1, resistance R b1another termination described in the inverse output terminal of the first differential amplifier, resistance R a1with resistance R b1contact connect the input in the same way of described first differential amplifier, electric capacity C 1with resistance R b1parallel connection, resistance R a11a termination inversion signal input port AINN, other end connecting resistance R b11, resistance R b11another termination described in the output in the same way of the first differential amplifier, resistance R a11with resistance R b11contact connect the reverse input end of described first differential amplifier, electric capacity C 11with resistance R b11in parallel;
The second level comprises the second differential amplifier, resistance R a2, resistance R b2, resistance R a21, resistance R b21, electric capacity C 2with electric capacity C 21; Electric capacity C 2a termination described in the inverse output terminal of the first differential amplifier, other end connecting resistance R a2, resistance R a2another termination described in the input in the same way of the second differential amplifier, resistance R b2be connected in the same way between input and inverse output terminal of described second differential amplifier, electric capacity C 21a termination described in the output in the same way of the first differential amplifier, other end connecting resistance R a21, resistance R a21another termination described in the reverse input end of the second differential amplifier, resistance R b21be connected on described second differential amplifier reverse input end and in the same way between output;
The third level comprises the 3rd differential amplifier, resistance R a3, resistance R b3, resistance R a31, resistance R b31, electric capacity C 3with electric capacity C 31; Resistance R a3be connected on inverse output terminal and in the same way between the input of described 3rd differential amplifier of described second differential amplifier, resistance R b3with electric capacity C 3be connected in parallel in the same way between input and inverse output terminal of described 3rd differential amplifier, resistance R a31be connected between the output in the same way of described second differential amplifier and the reverse input end of described 3rd differential amplifier, resistance R b31with electric capacity C 31be connected in parallel on described 3rd differential amplifier reverse input end and in the same way between output;
The fourth stage comprises the 4th amplifier, resistance R a4, resistance R b4, resistance R a41, resistance R b41, electric capacity C 4with electric capacity C 41; Electric capacity C 4a termination described in the inverse output terminal of the 3rd differential amplifier, other end connecting resistance R a4, resistance R a4another termination described in the reverse input end of the 4th amplifier, resistance R b4between the reverse input end being connected on described 4th amplifier and output, electric capacity C 41a termination described in the output in the same way of the 3rd differential amplifier, other end connecting resistance R a41, resistance R a41another termination described in the input in the same way of the 4th amplifier, resistance R b41be connected in the same way between input and ground of described 4th amplifier.
Further, said apparatus also can have following characteristics, and described amplifier is level Four cascaded differential amplifier, consisting of of this level Four cascaded differential amplifier:
The first order comprises the first differential amplifier, resistance R a1, resistance R b1, resistance R a11with resistance R b11; Resistance R a1a termination positive signal input port AINP, other end connecting resistance R b1, resistance R b1another termination described in the inverse output terminal of the first differential amplifier, resistance R a1with resistance R b1contact connect the input in the same way of described first differential amplifier, resistance R a11a termination inversion signal input port AINN, other end connecting resistance R b11, resistance R b11another termination described in the output in the same way of the first differential amplifier, resistance R a11with resistance R b11contact connect the reverse input end of described first differential amplifier;
The second level comprises the second differential amplifier, resistance R a2, resistance R b2, resistance R a21, resistance R b21, resistance R c1, resistance R c11, electric capacity C 1, electric capacity C 2, electric capacity C 11with electric capacity C 21; Resistance R c1, electric capacity C 2with resistance R a2inverse output terminal at described first differential amplifier in sequential series and in the same way between input of described second differential amplifier, electric capacity C 1be connected on resistance R c1with electric capacity C 2contact and ground between, resistance R b2be connected in the same way between input and inverse output terminal of described second differential amplifier, resistance R c11, electric capacity C 21with resistance R a21between the reverse input end of the output in the same way at described first differential amplifier in sequential series and described second differential amplifier, electric capacity C 11be connected on resistance R c11with electric capacity C 21contact and ground between, resistance R b21be connected on described second differential amplifier reverse input end and in the same way between output;
The third level comprises the 3rd differential amplifier, resistance R a3, resistance R b3, resistance R a31with resistance R b31; Resistance R a3a termination described in the inverse output terminal of the second differential amplifier, other end connecting resistance R b3, resistance R b3another termination described in the inverse output terminal of the 3rd differential amplifier, resistance R a3with resistance R b3contact connect the input in the same way of described 3rd differential amplifier, resistance R a31a termination described in the output in the same way of the second differential amplifier, other end connecting resistance R b31, resistance R b31another termination described in the output in the same way of the 3rd differential amplifier, resistance R 31with resistance R b31contact connect the reverse input end of described 3rd differential amplifier;
The fourth stage comprises the 4th amplifier, resistance R a4, resistance R b4, resistance R a41, resistance R b41, resistance R c2, resistance R c21, electric capacity C 3, electric capacity C 4, electric capacity C 31with electric capacity C 41; Resistance R c2, electric capacity C 4with resistance R a4between the reverse input end of the inverse output terminal at described 3rd differential amplifier in sequential series and described 4th amplifier, electric capacity C 3be connected on resistance R c2with electric capacity C 4contact and ground between, resistance R b4between the reverse input end being connected on described 4th amplifier and output, resistance R c21, electric capacity C 41with resistance R a41output in the same way at described 3rd differential amplifier in sequential series and in the same way between input of described 4th amplifier, electric capacity C 31be connected on resistance R c21with electric capacity C 41contact and ground between, resistance R b41be connected in the same way between input and ground of described 4th amplifier.
Further, said apparatus also can have following characteristics, and described amplifier is three-stage cascade differential amplifier, consisting of of this three-stage cascade differential amplifier:
The first order comprises the first differential amplifier, resistance R a1, resistance R b1, resistance R a11, resistance R b11, electric capacity C 1with electric capacity C 11; Resistance R a1a termination positive signal input port AINP, other end connecting resistance R b1, resistance R b1another termination described in the inverse output terminal of the first differential amplifier, resistance R a1with resistance R b1contact connect the input in the same way of described first differential amplifier, electric capacity C 1with resistance R b1parallel connection, resistance R a11a termination non-inverting signal input thereof mouth AINN, other end connecting resistance R b11, resistance R b11another termination described in the output in the same way of the first differential amplifier, resistance R a11with resistance R b11contact connect the reverse input end of described first differential amplifier, electric capacity C 11with resistance R b11in parallel;
The second level comprises the second differential amplifier, resistance R a2, resistance R b2, resistance R a21, resistance R b21, electric capacity C 2, electric capacity C 3, electric capacity C 21with electric capacity C 31; Electric capacity C 2with resistance R a2inverse output terminal at described first differential amplifier in sequential series and in the same way between input of described second differential amplifier, electric capacity C 3with resistance R b2be connected in parallel in the same way between input and inverse output terminal of described second differential amplifier, electric capacity C 21with resistance R a21between the reverse input end of the output in the same way at described first differential amplifier in sequential series and described second differential amplifier, electric capacity C 31with resistance R b21be connected in parallel on described second differential amplifier reverse input end and in the same way between output;
The third level comprises the 3rd amplifier, resistance R a3, resistance R b3, resistance R a31, resistance R b31, electric capacity C 4with electric capacity C 41; Electric capacity C 4with resistance R a3inverse output terminal at described second differential amplifier in sequential series and in the same way between input of described 3rd amplifier, electric capacity C 41with resistance R a31between the reverse input end of the output in the same way at described second differential amplifier in sequential series and described 3rd amplifier, resistance R b3be connected in the same way between input and output of described 3rd amplifier, resistance R b31between the reverse input end being connected on described 3rd amplifier and ground.
Further, said apparatus also can have following characteristics, and described digital/analog converter is current-mode R2R structure, and the output area of described digital/analog converter is 1/2nd GND Values to the maximum.
Further, said apparatus also can have following characteristics, and described digital/analog converter is current-mode R2R structure, and the output area of described digital/analog converter is greatly to GND Value, and common mode electrical level is adjustable.
Further, said apparatus also can have following characteristics, and described digital/analog converter is voltage mode R2R structure, and the output area of described digital/analog converter is greatly to GND Value.
Further, said apparatus also can have following characteristics, and described digital/analog converter is R2R network configuration, and the output area of described digital/analog converter is greatly to GND Value.
Further, said apparatus also can have following characteristics, for comprising three NMOS tube Mn0 than the comparator of higher level, Mn1, a Mn2 and two PMOS Mp1, Mp2, and a reverser, PMOS Mp1 is connected with the grid of PMOS Mp2, source electrode all connects power Vcc, the drain electrode of PMOS Mp1 connects the drain electrode of NMOS tube Mn1, the source electrode of NMOS tube Mn 1 and NMOS tube Mn2 all connects the drain electrode of NMOS tube Mn0, the drain electrode of NMOS tube Mn2 connects the drain electrode of PMOS Mp2, the source ground GND of NMOS tube Mn0, grid meets bias voltage Vbn, the drain electrode of the input termination PMOS Mp2 of reverser, the grid of NMOS tube Mn2 is the positive input Vin+ of comparator, the grid of NMOS tube Mn1 is the reverse input end Vin-of comparator, the output of reverser is the output end vo of comparator.
Further, said apparatus also can have following characteristics, three PMOS Mp0 are comprised for more low level comparator, Mp3, a Mp4 and two NMOS tube Mn3, Mn4 and one reverser, the source electrode of PMOS Mp0 connects power Vcc, grid meets bias voltage Vbp, drain electrode connects the source electrode of PMOS Mp3 and PMOS Mp4, the drain electrode of PMOS Mp3 connects the drain and gate of NMOS tube Mn3, the source ground GND of NMOS tube Mn3 and NMOS tube Mn4, the drain electrode of NMOS tube Mn4 connects the drain electrode of PMOS Mp4, the drain electrode of the input termination NMOS tube Mn4 of reverser, the grid of PMOS Mp4 is the positive input Vin+ of comparator, the grid of PMOS Mp3 is the reverse input end Vin-of comparator, the output of reverser is the output end vo of comparator.
For solving the problems of the technologies described above, the invention allows for a kind of low frequency signal detection method, to detect for low frequency signal and the difference analogue fore device of transmission system based on above-mentioned, comprising:
Step a, by experiment, measures magnetic induction module and sends the card reader of low frequency magnetic field at the voltage magnitude of induced voltage after amplifier amplifies of different distance point, determining the corresponding relation of this voltage magnitude and distance, and sets up the corresponding table of voltage magnitude and distance;
Step b, the needs of distance of swiping the card according to decoded low frequency signal transmission data and control, in conjunction with signal to noise ratio requirement, the two level threshold exported by one or more pairs of digital to analog converter are formed sluggish judgement voltage threshold and adjudicate analog signal, obtain the code stream information of low-frequency magnetic place transmission, or form sluggish judgement voltage threshold by single level threshold that one or more digital to analog converter exports to adjudicate analog signal, obtain the code stream information of low-frequency magnetic place transmission; The two level threshold exported by one or more pairs of digital to analog converter are formed non-hysteresis judgement voltage threshold and adjudicate analog signal, obtain the distance feature information that low-frequency magnetic place is transmitted, or form non-hysteresis judgement voltage threshold by single level threshold that one or more digital to analog converter exports to adjudicate analog signal, obtain the distance feature information that low-frequency magnetic place is transmitted;
Step c, signal after the judgement of non-hysteresis judgment condition is sampled, obtain 0,1 code stream sequence, 1 signal proportion thresholding is set, in the time window length of setting, this code stream sequence is added up, when code stream sequence ratio reaches preset ratio thresholding shared by 1 signal, then think and enter predeterminable range scope, otherwise think and do not enter this distance range; Burst after sluggish judgment condition judgement is decoded, extracts the code stream information of low frequency magnetic field, complete low-frequency magnetic field signal one-way communication.
Further, said method also can have following characteristics, in described step b, according to the corresponding table of voltage magnitude described in step a with distance, in conjunction with separating code distance, the requirement of distance controlling, the ratio thresholding that arranges 1 signal arrange the level that comparator exported to by digital to analog converter.
Further, said method also can have following characteristics, the level that comparator exported to by described paired digital to analog converter is non-hysteresis judgment condition, its method to set up is: set the distance of desired control as D1, search the corresponding table of voltage magnitude and distance, obtain signal intensity amplitude corresponding to distance D1 for+A1 to-A1, the ratio thresholding arranging 1 signal is R1, according to A1 and R1, the level L1 exporting to comparator is set, L2, meet in one-period, the percentage of time that analog front-end device amplitude output signal is greater than L1 or is less than L2 equals R1, namely being greater than R1 then enters within the scope of the distance D1 of requirement control, otherwise do not enter require command range D1 scope in.
Further, said method also can have following characteristics, the level that comparator exported to by described paired digital to analog converter is sluggish judgment condition, its method to set up is: set and expect to carry out the distance of decoding as D2, search the corresponding table of voltage magnitude and distance, obtain the amplitude of variation of distance D2 respective signal for+A2 to-A2, the amplitude recording the generation of most of noise is A3, level L3, L4 of exporting to comparator are set, make L3 be greater than+A3 and be less than+A2; L4 is less than-A3 and is greater than-A2, namely then allows decoding when distance is less than D2, otherwise does not allow decoding.
Further, said method also can have following characteristics, in described step b, carrying out logic OR process, obtaining the digital signal for extracting range information to two comparator output signals being input as non-hysteresis judgment condition comparative level.
Further, said method also can have following characteristics, in described step b, exporting and carries out sluggishness process, obtaining the digital signal for extracting magnetic field code stream information to two comparators being input as sluggish judgment condition comparative level.
Further, said method also can have following characteristics, in described step c, arranges the digital signal of digital burr filter to input and carries out burr filtering, from the signal of filtering burr, decode low frequency magnetic field data flow.
Further, said method also can have following characteristics, and in described step b, the single comparative level using single digital to analog converter to export extracts magnetic field range information and code stream information.
Further, said method also can have following characteristics, uses single comparator to export comparative level and extracts magnetic field code stream information, and the level that comparator exported to by digital to analog converter is set to amplifier input reference level.
Further, said method also can have following characteristics, uses the digital signal of single comparator or comparator output in pairs to decode.
Further, said method also can have following characteristics, uses the digital signal of single comparator or comparator output in pairs to carry out the judgement of single distance; The digital signal using multiple single comparator to export carries out the judgement of multiple distance, or the judgement using multiple paired comparator to carry out between multiple distance, multiple distance regions; The digital signal using multiple single comparator to export carries out the judgement of multiple distance, or the judgement using multiple paired comparator to carry out between multiple distance, multiple distance regions.
Further, said method also can have following characteristics, and multiple single comparator used in combination and the digital signal that comparator exports in pairs carry out the judgement between multiple distance, multiple distance regions.
The present invention can reduce circuit noise and ambient noise detects low frequency signal and the interference of low frequency signal received in transmission system, thus improves the precision of low frequency alternating magnetic field distance detection and control.
Accompanying drawing explanation
Fig. 1 detects for low frequency signal in the embodiment of the present invention and a kind of structure chart of difference analogue fore device of transmission system;
Fig. 2 detects for low frequency signal in the embodiment of the present invention and the another kind of structure chart of difference analogue fore device of transmission system;
Fig. 3 detects for low frequency signal in the embodiment of the present invention and another structure chart of difference analogue fore device of transmission system;
Fig. 4 is the structure chart of a kind of fully differential programmable gain amplifier in the embodiment of the present invention;
Fig. 5 is the structure chart of another kind of fully differential programmable gain amplifier in the embodiment of the present invention;
Fig. 6 is the structure chart of another fully differential programmable gain amplifier in the embodiment of the present invention;
Fig. 7 .1 is the structure chart of a kind of digital/analog converter in the embodiment of the present invention;
Fig. 7 .2 is the structure chart of another kind of digital/analog converter in the embodiment of the present invention;
Fig. 7 .3 is the structure chart of another digital/analog converter in the embodiment of the present invention;
Fig. 7 .4 is the structure chart of another digital/analog converter in the embodiment of the present invention;
Fig. 8 is the structure chart of a kind of comparator in the embodiment of the present invention;
Fig. 9 is the structure chart of another kind of comparator in the embodiment of the present invention;
Figure 10 .1 is the structure chart of the first magnetic induction module in the embodiment of the present invention;
Figure 10 .2 is the structure chart of the second magnetic induction module in the embodiment of the present invention;
Figure 10 .3 is the structure chart of the third magnetic induction module in the embodiment of the present invention;
Figure 10 .4 is the structure chart of the 4th kind of magnetic induction module in the embodiment of the present invention;
Figure 10 .5 is the structure chart of the 5th kind of magnetic induction module in the embodiment of the present invention;
Figure 10 .6 is the structure chart of the 6th kind of magnetic induction module in the embodiment of the present invention;
Figure 10 .7 is the structure chart of the 7th kind of magnetic induction module in the embodiment of the present invention;
Figure 11 is the flow chart of embodiment of the present invention medium and low frequency signal detecting method;
Figure 12 be record by experiment in the embodiment of the present invention magnetic induction module is inserted different mobile communication terminal, the corresponding relation schematic diagram of distance and low frequency induction signal amplitude value;
Figure 13 uses paired comparator to adopt magnetic field data low frequency signal detection method to carry out the schematic diagram processed of decoding in the embodiment of the present invention;
Figure 14 uses paired comparator to adopt low frequency signal detection method to carry out the schematic diagram of distance controlling process in the embodiment of the present invention;
Figure 15 uses single comparator to adopt magnetic field data low frequency signal detection method to carry out the schematic diagram processed of decoding in the embodiment of the present invention;
Figure 16 uses single comparator to adopt low frequency signal detection method to carry out the schematic diagram of distance controlling process in the embodiment of the present invention.
Embodiment
Central scope of the present invention is, detects and increases an analog front-end device in transmission system, reduce circuit noise and ambient noise to the interference of low frequency signal at low frequency signal, thus improves the precision of low frequency alternating magnetic field distance detection and control.
Be described principle of the present invention and feature below in conjunction with drawings and Examples, example, only for explaining the present invention, is not intended to limit scope of the present invention.
Fig. 1 detects for low frequency signal in the embodiment of the present invention and a kind of structure chart of difference analogue fore device of transmission system.As shown in Figure 1, in the present embodiment, the difference analogue fore device of low frequency signal detection and transmission system, comprise magnetic induction module 100, low-pass filtering module 104, amplifier 101, digital/analog converter 102 and comparator 103, wherein, magnetic induction module 100, low-pass filtering module 104, amplifier 101 are connected in turn, the output of amplifier 101 is connected with the positive input of comparator 103, the output of digital/analog converter 102 is connected with the reverse input end of comparator 103, and amplifier 101 is differential amplifier.It is large that the small-signal of amplifier 101 to input carries out prevention, the digital signal exported by digitial controller is converted to analog signal by digital/analog converter 102, then comparator 103 is utilized to compare two signals, obtain the digital signal needed, be transferred in digitial controller and process.Here mentioned digitial controller belongs to low frequency and detects and transmission system, but does not belong to AFE (analog front end), and its effect exports according to comparator to compare device and digital/analog converter opens the/control of shutdown mode.
Fig. 2 detects for low frequency signal in the embodiment of the present invention and the another kind of structure chart of difference analogue fore device of transmission system.As shown in Figure 2, in the present embodiment, the difference analogue fore device of low frequency signal detection and transmission system, comprise a magnetic induction module 100, a low-pass filtering module 104, an amplifier 101, digital/analog converter 102, digital/analog converter 105 and comparator 103, comparator 106, magnetic induction module 100, low-pass filtering module 104, amplifier 101 is connected in turn, the output of amplifier 101 respectively with comparator 103, the positive input of comparator 106 is connected, digital/analog converter 102, digital/analog converter 105 and comparator 103, comparator 106 forms two-way, in each road, the output of digital/analog converter is connected with the reverse input end of comparator, every two-way up and down partners, a pair totally.
Fig. 3 detects for low frequency signal in the embodiment of the present invention and another structure chart of difference analogue fore device of transmission system.As shown in Figure 3, in the present embodiment, the difference analogue fore device of low frequency signal detection and transmission system, comprise a magnetic induction module 100, a low-pass filtering module 104, an amplifier 201, six digital/analog converters 202, 203, 204 and six comparators 205, 206, 207, the output of amplifier 201 respectively with six comparators 205, 206, the positive input of 207 is connected, six digital/analog converters 202, 203, 204 compare 205 with six, 206, 207 devices form six tunnels, in each road, the output of digital/analog converter is connected with the reverse input end of comparator, every two-way up and down partners, totally three is right.
Fig. 4 is the structure chart of a kind of fully differential programmable gain amplifier in the embodiment of the present invention.As shown in Figure 4, in the embodiment of the present invention, amplifier is level Four cascaded differential amplifier, consisting of of this level Four cascaded differential amplifier: the first order comprises the first differential amplifier 301, resistance R a1, resistance R b1, resistance R a11, resistance R b11, electric capacity C 1with electric capacity C 11; Resistance R a1a termination positive signal input port AINP, other end connecting resistance R b1, resistance R b1the inverse output terminal of another termination first differential amplification 301 device, resistance R a1with resistance R b1contact connect the input in the same way of the first differential amplifier 301, electric capacity C 1with resistance R b1parallel connection, resistance R a11a termination inversion signal input port AINN, other end connecting resistance R b11, resistance R b11the output in the same way of another termination first differential amplifier 301, resistance R a11with resistance R b11contact connect the reverse input end of the first differential amplifier 301, electric capacity C 11with resistance R b11in parallel; The second level comprises the second differential amplifier 302, resistance R a2, resistance R b2, resistance R a21, resistance R b21, electric capacity C 2with electric capacity C 21; Electric capacity C 2the inverse output terminal of termination first differential amplifier 301, other end connecting resistance R a2, resistance R a2the input in the same way of another termination second differential amplifier 302, resistance R b2be connected on the second differential amplifier 302 reverse input end and in the same way between output, electric capacity C 21the output in the same way of termination first differential amplifier 301, other end connecting resistance R a21, resistance R a21the reverse input end of another termination second differential amplifier 302, resistance R b21be connected on the second differential amplifier 302 reverse input end and in the same way between output; The third level comprises the 3rd differential amplifier 303, resistance R a3, resistance R b3, resistance R a31, resistance R b31, electric capacity C 3with electric capacity C 31; Resistance R a3be connected on inverse output terminal and in the same way between the input of the 3rd differential amplifier 303 of the second differential amplifier 302, resistance R b3with electric capacity C 3be connected in parallel in the same way between input and inverse output terminal of the 3rd differential amplifier 303, resistance R a31be connected between the output in the same way of the second differential amplifier 302 and the reverse input end of the 3rd differential amplifier 303, resistance R b31with electric capacity C 31be connected in parallel on the 3rd differential amplifier 303 reverse input end and in the same way between output; The fourth stage comprises the 4th amplifier 304, resistance R a4, resistance R b4, resistance R a41, resistance R b41, electric capacity C 4with electric capacity C 41; Electric capacity C 4the inverse output terminal of a termination the 3rd differential amplifier 303, other end connecting resistance R a4, resistance R a4the reverse input end of another termination the 4th amplifier 304, resistance R b4between the reverse input end being connected on the 4th amplifier 304 and output, electric capacity C 41the output in the same way of a termination the 3rd differential amplifier 303, other end connecting resistance R a41, resistance R a41the input in the same way of another termination the 4th amplifier 304, resistance R b41be connected in the same way between input and ground of the 4th amplifier 304.
Amplifier shown in Fig. 4 is a kind of fully differential programmable gain amplifier, it has the function of low pass and high-pass filtering, be divided into 4 grades, circuit in each square frame is one-level, and AINP is positive signal input port, AINP is negative signal input port input port, Vout is signal output port.Differential input and output operational amplifier 301 (being also the first differential amplifier) is connected into resistive degeneration structure, the value of resistance Ra1 is equal with the value of resistance Ra11, the value of resistance Rb1 is equal with the value of resistance Rb11, its closed loop gain is determined by the ratio of Rb1 and Ra1, and the ratio of Rb1 and Ra1 is adjustable; The first order has lowpass function simultaneously, and electric capacity C1 and resistance Rb1 determines low-pass cut-off frequencies, and the value of electric capacity C1 is equal with the value of electric capacity C11.Electric capacity C2 has every straight effect, and the offset voltage cutting off first order circuit passes to the second level; Operational amplifier 302 (being also the second differential amplifier) is connected into resistive degeneration structure, the value of resistance Ra2 is equal with the value of resistance Ra21, the value of resistance Rb2 is equal with the value of resistance Rb21, its closed loop gain is determined by the ratio of Rb2 and Ra2, the gain of the second level is generally unit gain or gain is lower, and the ratio of Rb2 and Ra2 is adjustable; The second level has high pass function simultaneously, and electric capacity C2 and resistance Ra2 determines high pass cut off frequency, and the value of electric capacity C2 is equal with the value of electric capacity C21.Operational amplifier 303 (being also the 3rd differential amplifier) is connected into resistive degeneration structure, its closed loop gain is determined by the ratio of Rb3 and Ra3, the ratio of Rb3 and Ra3 is adjustable, and the value of resistance Ra3 is equal with the value of resistance Ra31, and the value of resistance Rb3 is equal with the value of resistance Rb31.Electric capacity C4 has every straight effect, and the offset voltage cutting off previous circuit passes to afterbody; Operational amplifier 304 (also i.e. the 4th amplifier) is connected into double-end signal and turns single-ended signal structure, and gain is lower or be unit gain.The offset voltage of whole PGA (Programmable Gain Amplifier, programmable gain amplifier) only has the offset voltage of afterbody.
Fig. 5 is the structure chart of another kind of fully differential programmable gain amplifier in the embodiment of the present invention.As shown in Figure 5, in the embodiment of the present invention, amplifier is level Four cascaded differential amplifier, consisting of of this level Four cascaded differential amplifier: the first order comprises the first differential amplifier 301, resistance R a1, resistance R b1, resistance R a11with resistance R b11; Resistance R a1a termination positive signal input port AINP, other end connecting resistance R b1, resistance R b1the inverse output terminal of another termination first differential amplifier 301, resistance R a1with resistance R b1contact connect the input in the same way of the first differential amplifier 301, resistance R a11a termination inversion signal input port AINN, other end connecting resistance R b11, resistance R b11the output in the same way of another termination first differential amplifier 301, resistance R a11with resistance R b11contact connect the reverse input end of the first differential amplifier 301; The second level comprises the second differential amplifier 302, resistance R a2, resistance R b2, resistance R a21, resistance R b21, resistance R c1, resistance R c11, electric capacity C 1, electric capacity C 2, electric capacity C 11with electric capacity C 21; Resistance R c1, electric capacity C 2with resistance R a2in sequential seriesly connecing inverse output terminal and in the same way between the input of the second differential amplifier 302 of the first differential amplifier 301, electric capacity C 1be connected on resistance R c1with electric capacity C 2contact and ground between, resistance R b2be connected in the same way between input and inverse output terminal of the second differential amplifier 302, resistance R c11, electric capacity C 21with resistance R a21in sequential seriesly connecing between the output in the same way of the first differential amplifier 301 and the reverse input end of the second differential amplifier 302, electric capacity C 11be connected on resistance R c11with electric capacity C 21contact and ground between, resistance R b21be connected on the second differential amplifier 302 reverse input end and in the same way between output; The third level comprises the 3rd differential amplifier 303, resistance R a3, resistance R b3, resistance R a31with resistance R b31; Resistance R a3the inverse output terminal of termination second differential amplifier 302, other end connecting resistance R b3, resistance R b3the inverse output terminal of another termination the 3rd differential amplifier 303, resistance R a3with resistance R b3contact connect the input in the same way of the 3rd differential amplifier 303, resistance R a31the output in the same way of termination second differential amplifier 302, other end connecting resistance R b31, resistance R b31the output in the same way of another termination the 3rd differential amplifier 303, resistance R 31with resistance R b31contact connect the reverse input end of the 3rd differential amplifier 303; The fourth stage comprises the 4th amplifier 304, resistance R a4, resistance R b4, resistance R a41, resistance R b41, resistance R c2, resistance R c21, electric capacity C 3, electric capacity C 4, electric capacity C 31with electric capacity C 41; Resistance R c2, electric capacity C 4with resistance R a4between the reverse input end of the inverse output terminal at the 3rd differential amplifier 303 in sequential series and the 4th amplifier 304, electric capacity C 3be connected on resistance R c2with electric capacity C 4contact and ground between, resistance R b4between the reverse input end being connected on the 4th amplifier 304 and output, resistance R c21, electric capacity C 41with resistance R a41output in the same way at the 3rd differential amplifier 303 in sequential series and in the same way between input of the 4th amplifier 304, electric capacity C 31be connected on resistance R c21with electric capacity C 41contact and ground between, resistance R b41be connected in the same way between input and ground of the 4th amplifier 304.
Amplifier shown in Fig. 5 is also a kind of programmable gain amplifier, and in itself and Fig. 4, being uniquely distinguished as of structure is placed on below and after the third level of the first order low pass in Fig. 4.
Fig. 6 is the structure chart of another fully differential programmable gain amplifier in the embodiment of the present invention.As shown in Figure 6, in the embodiment of the present invention, amplifier is three-stage cascade differential amplifier, consisting of of this three-stage cascade differential amplifier: the first order comprises differential amplifier 401, resistance R a1, resistance R b1, resistance R a11, resistance R b11, electric capacity C 1with electric capacity C 11; Resistance R a1a termination positive signal input port AINP, other end connecting resistance R b1, resistance R b1the inverse output terminal of another termination differential amplifier 401, resistance R a1with resistance R b1contact connect the input in the same way of differential amplifier 401, electric capacity C 1with resistance R b1parallel connection, resistance R a11a termination non-inverting signal input thereof mouth AINN, other end connecting resistance R b11, resistance R b11the output in the same way of another termination differential amplifier 401, resistance R a11with resistance R b11contact connect the reverse input end of differential amplifier 401, electric capacity C 11with resistance R b11in parallel; The second level comprises differential amplifier 402, resistance R a2, resistance R b2, resistance R a21, resistance R b21, electric capacity C 2, electric capacity C 3, electric capacity C 21with electric capacity C 31; Electric capacity C 2with resistance R a2inverse output terminal at differential amplifier 401 in sequential series and in the same way between input of differential amplifier 402, electric capacity C 3with resistance R b2be connected in parallel in the same way between input and inverse output terminal of differential amplifier 402, electric capacity C 21with resistance R a21between output in the same way at differential amplifier 401 in sequential series and the reverse input end of differential amplifier 402, electric capacity C 31with resistance R b21be connected in parallel on differential amplifier 402 reverse input end and in the same way between output; The third level comprises amplifier 403, resistance R a3, resistance R b3, resistance R a31, resistance R b31, electric capacity C 4with electric capacity C 41; Electric capacity C 4with resistance R a3inverse output terminal at differential amplifier 402 in sequential series and in the same way between input of amplifier 403, electric capacity C 41with resistance R a31between output in the same way at differential amplifier 402 in sequential series and the reverse input end of amplifier 403, resistance R b3be connected in the same way between input and output of amplifier 403, resistance R b31between the reverse input end being connected on amplifier 403 and ground.
Amplifier shown in Fig. 6 is also a kind of programmable gain amplifier, and in itself and Fig. 4, structure is uniquely distinguished as the second level second level in Fig. 4 and the third level being merged into Fig. 6.
Here, we provide several examples of digital/analog converter again.
Fig. 7 .1 is the structure chart of a kind of digital/analog converter in the embodiment of the present invention.As shown in Fig. 7 .1, in the present embodiment, digital/analog converter adopts current-mode R2R DAC to realize the conversion of digital to analogy, and output area is 1/2nd GND Values to the maximum.According to reference level demand of the present invention, corresponding connected mode can be used to produce the reference level of corresponding high electronegative potential.
Fig. 7 .2 is the structure chart of another kind of digital/analog converter in the embodiment of the present invention.As shown in Fig. 7 .2, in the present embodiment, digital/analog converter adopts current-mode R2R DAC to realize the conversion of digital to analogy, is that its output area is greatly to GND Value with the difference of DAC shown in Fig. 7 .1, and common mode electrical level is adjustable, determined by Vcom magnitude of voltage.Adopt this kind of DAC can reduce the design complexities of reference level generation circuit according to the present invention.
Fig. 7 .3 is the structure chart of another digital/analog converter in the embodiment of the present invention.Shown in Fig. 7 .3, in the present embodiment, digital/analog converter adopts voltage mode R2R DAC to realize the conversion of digital to analogy, and its output area is greatly to GND Value.Adopt this kind of DAC can reduce the design complexities of reference level generation circuit according to the present invention.
Fig. 7 .4 is the structure chart of another digital/analog converter in the embodiment of the present invention.Shown in Fig. 7 .4, in the present embodiment, digital/analog converter adopts the conversion of R2R real-time performance digital to analogy, and its output area is 2 times of Vref, maximumly can be GND Value.Adopt this kind of circuit according to the present invention, owing to reducing by an amplifier, design complexities and power consumption that reference level produces circuit can be reduced.
Here, we give the example of several comparator.
Fig. 8 is the structure chart of a kind of comparator in the embodiment of the present invention.As shown in Figure 8, in the present embodiment, comparator comprises three NMOS tube Mn0, Mn1, a Mn2 and two PMOS Mp1, Mp2, and a reverser, PMOS Mp1 is connected with the grid of PMOS Mp2, source electrode all connects power Vcc, the drain electrode of PMOS Mp1 connects the drain electrode of NMOS tube Mn1, the source electrode of NMOS tube Mn 1 and NMOS tube Mn2 all connects the drain electrode of NMOS tube Mn0, the drain electrode of NMOS tube Mn2 connects the drain electrode of PMOS Mp2, the source ground GND of NMOS tube Mn0, grid meets bias voltage Vbn, the drain electrode of the input termination PMOS Mp2 of reverser, the grid of NMOS tube Mn2 is the positive input Vin+ of comparator, the grid of NMOS tube Mn1 is the reverse input end Vin-of comparator, the output of reverser is the output end vo of comparator.Comparator shown in Fig. 8 is used for the comparison of high level in three pairs of comparators in Fig. 2, i.e. the comparison of VG1+, VG2+ and VM+.Because NMOS is as input pipe, high level comparing function can well be realized.
Fig. 9 is the structure chart of another kind of comparator in the embodiment of the present invention.As shown in Figure 9, in the present embodiment, comparator comprises three PMOS Mp0, Mp3, a Mp4 and two NMOS tube Mn3, Mn4 and one reverser, the source electrode of PMOS Mp0 connects power Vcc, grid meets bias voltage Vbp, drain electrode connects the source electrode of PMOS Mp3 and PMOS Mp4, the drain electrode of PMOS Mp3 connects the drain and gate of NMOS tube Mn3, the source ground GND of NMOS tube Mn3 and NMOS tube Mn4, the drain electrode of NMOS tube Mn4 connects the drain electrode of PMOS Mp4, the drain electrode of the input termination NMOS tube Mn4 of reverser, the grid of PMOS Mp4 is the positive input Vin+ of comparator, the grid of PMOS Mp3 is the reverse input end Vin-of comparator, the output of reverser is the output end vo of comparator.Comparator shown in Fig. 9 is used for low level comparison, the i.e. comparison of VG1-, VG2-and VM-in three pairs of comparators in Fig. 2.Because PMOS is as input pipe, low level comparing function can well be realized.
Figure 10 .1 is the structure chart of the first magnetic induction module in the embodiment of the present invention.In Figure 10 .1, magnetic induction module is difference magnetic induction coil.Two outputs of difference magnetic induction coil can directly be connected with two inputs of low-pass filtering module.
Figure 10 .2 is the structure chart of the second magnetic induction module in the embodiment of the present invention.In Figure 10 .2, magnetic induction module is difference hall device, and two of this difference hall device outputs are all connected by capacitance and low-pass filtering module two inputs.
Figure 10 .3 is the structure chart of the third magnetic induction module in the embodiment of the present invention.In Figure 10 .3, magnetic induction module is difference hall device, this difference hall device output is connected by capacitance and low-pass filtering module input, and another output of this difference hall device is directly connected with another input of low-pass filtering module.
Figure 10 .4 is the structure chart of the 4th kind of magnetic induction module in the embodiment of the present invention.In Figure 10 .4, magnetic induction module is difference hall device, and two outputs of this difference hall device are directly connected with two inputs of low-pass filtering module.
Figure 10 .5 is the structure chart of the 5th kind of magnetic induction module in the embodiment of the present invention.In Figure 10 .5, magnetic induction module is difference giant reluctivity device, and two outputs of this difference giant reluctivity device are all connected with two inputs of low-pass filtering module by capacitance.
Figure 10 .6 is the structure chart of the 6th kind of magnetic induction module in the embodiment of the present invention.In Figure 10 .6, magnetic induction module is difference giant reluctivity device, an output of this difference giant reluctivity device is connected with an input of low-pass filtering module by capacitance, and another output of this difference giant reluctivity device is directly connected with another input of low-pass filtering module.
Figure 10 .7 is the structure chart of the 7th kind of magnetic induction module in the embodiment of the present invention.In Figure 10 .7, magnetic induction module is difference giant reluctivity device, and two outputs of this difference giant reluctivity device are directly connected with two inputs of low-pass filtering module.
Provided by the inventionly to detect and the difference analogue fore device of transmission system for low frequency signal, circuit noise and ambient noise can be reduced detect low frequency signal and the interference of low frequency signal received in transmission system, thus improve the precision of low frequency alternating magnetic field distance detection and control.
Detect and the difference analogue fore device of transmission system for low frequency signal based on aforesaid, the invention allows for a kind of low frequency signal detection method.Figure 11 is the flow chart of embodiment of the present invention medium and low frequency signal detecting method, and as shown in figure 11, in the present embodiment, low frequency signal detection method comprises the steps:
Step 1101, the range value of induced voltage after different distance measuring and amplifying;
Means by experiment, different mobile phone terminal are measured magnetic induction module and the induced voltage range value through amplifier amplify after of card reader at different distance point sending magnetic field, and do corresponding record.Figure 12 be record by experiment in the embodiment of the present invention magnetic induction module is inserted different mobile communication terminal, the corresponding relation schematic diagram of distance and low frequency induction signal amplitude value.
Step 1102, sets up the corresponding table of voltage magnitude and distance;
The measurement data of multiple terminal is processed, obtains the corresponding table of voltage magnitude and distance, as shown in table 1.
The mapping table of table 1 low frequency induction signal amplitude value and distance
The distance (cm) of mobile communication terminal and card reader Induced signal amplitude (dBmV)
1cm 52
2cm 47
3cm 40
4cm 36
5cm 30
6cm 26
7cm 21
8cm 17
9cm 11
10cm 8
14cm 5
Step 1103, enters low frequency magnetic field data decode flow process;
Step 1105, arranges digital to analog converter output level;
If expect, the distance of carrying out decoding is D2, searches range value and the corresponding table of distance, obtains the amplitude of variation of D2 respective signal for+A2 to-A2, the amplitude recording the generation of most of noise is A3, level L3, L4 of exporting to comparator are set, make L3 to be greater than+A3, and be less than+A2; L4 is less than-A3, and is greater than-A2, namely then allows decoding when distance is less than D2, otherwise does not allow decoding.
Step 1107, the process of comparator output signal sluggishness;
Step 1109, decodes to signal after process;
Signal after logical process is decoded according to coded format by decoder, obtains low frequency magnetic field traffic flow information.Decoder arranges digital burr filter can carry out burr filtering to the digital signal of input.
Step 1111, completes the one-way communication of low-frequency magnetic field signal;
Decoded data is carried out the application of being correlated with, complete the one-way communication function of low-frequency magnetic field signal.
Step 1104, enters distance controlling flow process;
Step 1106, arranges digital to analog converter output level;
If the distance of desired control is D1, search the corresponding table of range value and distance, obtain signal intensity amplitude corresponding to D1 for+A1 to-A1, the ratio thresholding arranging 1 signal is R1, according to A1 and R1, level L1, L2 of exporting to comparator are set, meet in one-period, fore device amplitude output signal is greater than L1 or adds that the percentage of time being less than L2 equals R1, namely be greater than R1 then to enter within the scope of the described distance D1 requiring to control, otherwise do not enter in the described scope requiring command range D1.
Step 1108, the process of comparator output signal logic OR;
When the digital signal using paired comparator to obtain for carrying out Distance Judgment between card reader and card, then this paired digital signal is proceeded as follows: signal after the input output signal of high comparative level comparator and the output signal negate of low comparative level comparator is carried out or operates, obtains the digital signal for Distance Judgment.
Step 1110, carries out sampling to signal after logical process and obtains 0,1 data flow;
Step 1112, uses Preset Time window to add up 0,1 data;
Preset Time window length, and 0 in this time window, 1 data are added up, calculate 1 proportion.
Step 1114, step 1116, compare statistics and set 1 signal proportion thresholding, complete Distance Judgment, realize distance controlling.
Figure 13 uses paired comparator to adopt magnetic field data low frequency signal detection method to carry out the schematic diagram processed of decoding in the embodiment of the present invention.As shown in figure 13, AO is the output signal of amplifier.The high comparative level VG+ of input comparator, low comparative level VG-are according to separating code distance and arranging with the corresponding table of distance by searching range value.DO2 is the output signal of the comparator inputting high comparative level, and DO3 is signal after the output negate of the comparator inputting low comparative level.After sluggish process, digital signal is the signal after output signal DO2, DO3 to comparator carries out sluggish logical process.Digital burr filter can be set and can carry out burr filtering to this input signal.According to coded format, the signal after sluggishness process is decoded, just can obtain low frequency magnetic field traffic flow information.
Figure 14 uses paired comparator to adopt low frequency signal detection method to carry out the schematic diagram of distance controlling process in the embodiment of the present invention.As shown in figure 14, AO is the output signal of amplifier.Its rangeability is from-A1 to+A1, and the distance of its correspondence is L.The L that supposes to need to adjust the distance controls, then first search range value and the corresponding table of distance, obtain signal amplitude value over this distance.The ratio thresholding arranging 1 signal is again R1.According to R1, then high comparative level VG+, arranging of low comparative level VG-meet in one-period, and the percentage of time that fore device amplitude output signal is greater than VG+ or is less than VG-equals R1.Output signal DO2, the DO3 of paired comparator carried out or obtains signal DO4 after processing, this signal is sampled, obtaining 0,1 data flow after sampling.The time window that in figure, in 0,1 data flow, the representative of dotted line frame is preset, setup times window length equals a signal period, in time window 0,1 signal are added up, obtain 1 signal proportion, the ratio thresholding of this ratio and 1 signal is compared, if be greater than ratio thresholding, then within thinking that induction module enters distance L; Otherwise think and do not enter this distance.
Figure 15 uses single comparator to adopt magnetic field data low frequency signal detection method to carry out the schematic diagram processed of decoding in the embodiment of the present invention.As shown in figure 15, AO is the output signal of amplifier.The comparative level VG of input comparator is set to amplifier input reference level.The output signal of comparator is directly used as decoded signal.Digital burr filter can be set and can carry out burr filtering to this input signal.According to coded format, signal is decoded, obtain low frequency magnetic field traffic flow information.
Figure 16 uses single comparator to adopt low frequency signal detection method to carry out the schematic diagram of distance controlling process in the embodiment of the present invention.As shown in figure 16, AO is the output signal of amplifier.Its rangeability is from-A1 to+A1, and the distance of its correspondence is L.The L that supposes to need to adjust the distance controls, then first search range value and the corresponding table of distance, obtain signal amplitude value over this distance.The ratio thresholding arranging 1 signal is again R1.According to R1, arranging of comparative level VG meets in one-period, and the percentage of time that fore device amplitude output signal is greater than VG equals R1.The output signal of comparator is sampled, obtains 0,1 data flow after sampling.The time window that in figure, in 0,1 data flow, the representative of dotted line frame is preset, setup times window length equals a signal period, in time window 0,1 signal are added up, obtain 1 signal proportion, the ratio thresholding of this ratio and 1 signal is compared, if be greater than ratio thresholding, then within thinking that induction module enters distance L; Otherwise think and do not enter this distance.
6 comparators in Fig. 3 can be configured to 3 to using, carry out decoding simultaneously, multiple distance, the judgement between distance regions, control.Also independently can use as 6 independent comparators, carry out decoding simultaneously, multiple distance, the judgement between distance regions, control.Also wherein part comparator can be used in couples, carry out decoding or distance, the judgement between distance regions, control; To wherein use independently by part comparator, carry out decoding or distance, the judgement between distance regions, control.
In fact, fore device can configure one as required to multiple comparator, decodes for the Distance Judgment between multiple distance, multiple distance regions and control, low-frequency magnetic field signal.
Low frequency signal detection method provided by the invention, can reduce circuit noise and ambient noise detects low frequency signal and the interference of low frequency signal received in transmission system, thus improves the precision of low frequency alternating magnetic field distance detection and control.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (29)

1. one kind is detected and the difference analogue fore device of transmission system for low frequency signal, be applied near field communication system, it is characterized in that, comprise at least one magnetic induction module, at least one low-pass filtering module, at least one amplifier, at least one digital/analog converter and at least one comparator, described magnetic induction module, low-pass filtering module, amplifier is connected in turn, the output of described amplifier is connected with the positive input of described comparator, the output of described digital/analog converter is connected with the reverse input end of described comparator, described amplifier is differential amplifier.
2. according to claim 1ly to detect and the difference analogue fore device of transmission system for low frequency signal, it is characterized in that, comprise a magnetic induction module, a low-pass filtering module, an amplifier, two digital/analog converters and two comparators, described magnetic induction module, low-pass filtering module, amplifier is connected in turn, the output of described amplifier is connected with the positive input of described two comparators respectively, described two digital/analog converters and described two comparators form two-way, in each road, the output of digital/analog converter is connected with the reverse input end of comparator, every two-way up and down partners, a pair totally.
3. according to claim 1ly to detect and the difference analogue fore device of transmission system for low frequency signal, it is characterized in that, comprise a magnetic induction module, a low-pass filtering module, amplifier, six digital/analog converters and six comparators, the output of described amplifier is connected with the positive input of described six comparators respectively, described six digital/analog converters and described six comparators form six tunnels, in each road, the output of digital/analog converter is connected with the reverse input end of comparator, every two-way up and down partners, and totally three is right.
4. according to claim 1ly detect and the difference analogue fore device of transmission system for low frequency signal, it is characterized in that, described magnetic induction module is difference magnetic induction coil, difference hall device or difference giant reluctivity device.
5. according to claim 4ly to detect and the difference analogue fore device of transmission system for low frequency signal, it is characterized in that, described magnetic induction module is difference magnetic induction coil, and two outputs of described difference magnetic induction coil are directly connected with two inputs of described low-pass filtering module.
6. according to claim 4ly to detect and the difference analogue fore device of transmission system for low frequency signal, it is characterized in that, described magnetic induction module is difference hall device, and two outputs of described difference hall device are connected by capacitance and described low-pass filtering module two inputs; Or described difference hall device output is connected by capacitance and described low-pass filtering module input, and another output of described difference hall device is directly connected with another input of low-pass filtering module; Or two outputs of described difference hall device are directly connected with two inputs of described low-pass filtering module.
7. according to claim 4ly to detect and the difference analogue fore device of transmission system for low frequency signal, it is characterized in that, described magnetic induction module is difference giant reluctivity device, and two outputs of described difference giant reluctivity device are connected with two inputs of described low-pass filtering module by capacitance; Or an output of described difference giant reluctivity device is connected with an input of described low-pass filtering module by capacitance, and another output of described difference giant reluctivity device is directly connected with another input of described low-pass filtering module; Or two outputs of described difference giant reluctivity device are directly connected with two inputs of described low-pass filtering module.
8. according to claim 1ly detect and the difference analogue fore device of transmission system for low frequency signal, it is characterized in that, described amplifier is the simple-stage differential amplifier or the multi-stage cascade differential amplifier that are connected into resistive degeneration network.
9. according to claim 8ly detect and the difference analogue fore device of transmission system for low frequency signal, it is characterized in that, described amplifier is level Four cascaded differential amplifier, consisting of of this level Four cascaded differential amplifier:
The first order comprises the first differential amplifier, resistance R a1, resistance R b1, resistance R a11, resistance R b11, electric capacity C 1with electric capacity C 11; Resistance R a1a termination positive signal input port AINP, other end connecting resistance R b1, resistance R b1another termination described in the inverse output terminal of the first differential amplifier, resistance R a1with resistance R b1contact connect the input in the same way of described first differential amplifier, electric capacity C 1with resistance R b1parallel connection, resistance R a11a termination inversion signal input port AINN, other end connecting resistance R b11, resistance R b11another termination described in the output in the same way of the first differential amplifier, resistance R a11with resistance R b11contact connect the reverse input end of described first differential amplifier, electric capacity C 11with resistance R b11in parallel;
The second level comprises the second differential amplifier, resistance R a2, resistance R b2, resistance R a21, resistance R b21, electric capacity C 2with electric capacity C 21; Electric capacity C 2a termination described in the inverse output terminal of the first differential amplifier, other end connecting resistance R a2, resistance R a2another termination described in the input in the same way of the second differential amplifier, resistance R b2be connected in the same way between input and inverse output terminal of described second differential amplifier, electric capacity C 21a termination described in the output in the same way of the first differential amplifier, other end connecting resistance R a21, resistance R a21another termination described in the reverse input end of the second differential amplifier, resistance R b21be connected on described second differential amplifier reverse input end and in the same way between output;
The third level comprises the 3rd differential amplifier, resistance R a3, resistance R b3, resistance R a31, resistance R b31, electric capacity C 3with electric capacity C 31; Resistance R a3be connected on inverse output terminal and in the same way between the input of described 3rd differential amplifier of described second differential amplifier, resistance R b3with electric capacity C 3be connected in parallel in the same way between input and inverse output terminal of described 3rd differential amplifier, resistance R a31be connected between the output in the same way of described second differential amplifier and the reverse input end of described 3rd differential amplifier, resistance R b31with electric capacity C 31be connected in parallel on described 3rd differential amplifier reverse input end and in the same way between output;
The fourth stage comprises the 4th amplifier, resistance R a4, resistance R b4, resistance R a41, resistance R b41, electric capacity C 4with electric capacity C 41; Electric capacity C 4a termination described in the inverse output terminal of the 3rd differential amplifier, other end connecting resistance R a4, resistance R a4another termination described in the reverse input end of the 4th amplifier, resistance R b4between the reverse input end being connected on described 4th amplifier and output, electric capacity C 41a termination described in the output in the same way of the 3rd differential amplifier, other end connecting resistance R a41, resistance R a41another termination described in the input in the same way of the 4th amplifier, resistance R b41be connected in the same way between input and ground of described 4th amplifier.
10. according to claim 8ly detect and the difference analogue fore device of transmission system for low frequency signal, it is characterized in that, described amplifier is level Four cascaded differential amplifier, consisting of of this level Four cascaded differential amplifier:
The first order comprises the first differential amplifier, resistance R a1, resistance R b1, resistance R a11with resistance R b11; Resistance R a1a termination positive signal input port AINP, other end connecting resistance R b1, resistance R b1another termination described in the inverse output terminal of the first differential amplifier, resistance R a1with resistance R b1contact connect the input in the same way of described first differential amplifier, resistance R a11a termination inversion signal input port AINN, other end connecting resistance R b11, resistance R b11another termination described in the output in the same way of the first differential amplifier, resistance R a11with resistance R b11contact connect the reverse input end of described first differential amplifier;
The second level comprises the second differential amplifier, resistance R a2, resistance R b2, resistance R a21, resistance R b21, resistance R c1, resistance R c11, electric capacity C 1, electric capacity C 2, electric capacity C 11with electric capacity C 21; Resistance R c1, electric capacity C 2with resistance R a2inverse output terminal at described first differential amplifier in sequential series and in the same way between input of described second differential amplifier, electric capacity C 1be connected on resistance R c1with electric capacity C 2contact and ground between, resistance R b2be connected in the same way between input and inverse output terminal of described second differential amplifier, resistance R c11, electric capacity C 21with resistance R a21between the reverse input end of the output in the same way at described first differential amplifier in sequential series and described second differential amplifier, electric capacity C 11be connected on resistance R c11with electric capacity C 21contact and ground between, resistance R b21be connected on described second differential amplifier reverse input end and in the same way between output;
The third level comprises the 3rd differential amplifier, resistance R a3, resistance R b3, resistance R a31with resistance R b31; Resistance R a3a termination described in the inverse output terminal of the second differential amplifier, other end connecting resistance R b3, resistance R b3another termination described in the inverse output terminal of the 3rd differential amplifier, resistance R a3with resistance R b3contact connect the input in the same way of described 3rd differential amplifier, resistance R a31a termination described in the output in the same way of the second differential amplifier, other end connecting resistance R b31, resistance R b31another termination described in the output in the same way of the 3rd differential amplifier, resistance R 31with resistance R b31contact connect the reverse input end of described 3rd differential amplifier;
The fourth stage comprises the 4th amplifier, resistance R a4, resistance R b4, resistance R a41, resistance R b41, resistance R c2, resistance R c21, electric capacity C 3, electric capacity C 4, electric capacity C 31with electric capacity C 41; Resistance R c2, electric capacity C 4with resistance R a4between the reverse input end of the inverse output terminal at described 3rd differential amplifier in sequential series and described 4th amplifier, electric capacity C 3be connected on resistance R c2with electric capacity C 4contact and ground between, resistance R b4between the reverse input end being connected on described 4th amplifier and output, resistance R c21, electric capacity C 41with resistance R a41output in the same way at described 3rd differential amplifier in sequential series and in the same way between input of described 4th amplifier, electric capacity C 31be connected on resistance R c21with electric capacity C 41contact and ground between, resistance R b41be connected in the same way between input and ground of described 4th amplifier.
11. according to claim 8ly detect and the difference analogue fore device of transmission system for low frequency signal, and it is characterized in that, described amplifier is three-stage cascade differential amplifier, consisting of of this three-stage cascade differential amplifier:
The first order comprises the first differential amplifier, resistance R a1, resistance R b1, resistance R a11, resistance R b11, electric capacity C 1with electric capacity C 11; Resistance R a1a termination positive signal input port AINP, other end connecting resistance R b1, resistance R b1another termination described in the inverse output terminal of the first differential amplifier, resistance R a1with resistance R b1contact connect the input in the same way of described first differential amplifier, electric capacity C 1with resistance R b1parallel connection, resistance R a11a termination non-inverting signal input thereof mouth AINN, other end connecting resistance R b11, resistance R b11another termination described in the output in the same way of the first differential amplifier, resistance R a11with resistance R b11contact connect the reverse input end of described first differential amplifier, electric capacity C 11with resistance R b11in parallel;
The second level comprises the second differential amplifier, resistance R a2, resistance R b2, resistance R a21, resistance R b21, electric capacity C 2, electric capacity C 3, electric capacity C 21with electric capacity C 31; Electric capacity C 2with resistance R a2inverse output terminal at described first differential amplifier in sequential series and in the same way between input of described second differential amplifier, electric capacity C 3with resistance R b2be connected in parallel in the same way between input and inverse output terminal of described second differential amplifier, electric capacity C 21with resistance R a21between the reverse input end of the output in the same way at described first differential amplifier in sequential series and described second differential amplifier, electric capacity C 31with resistance R b21be connected in parallel on described second differential amplifier reverse input end and in the same way between output;
The third level comprises the 3rd amplifier, resistance R a3, resistance R b3, resistance R a31, resistance R b31, electric capacity C 4with electric capacity C 41; Electric capacity C 4with resistance R a3inverse output terminal at described second differential amplifier in sequential series and in the same way between input of described 3rd amplifier, electric capacity C 41with resistance R a31between the reverse input end of the output in the same way at described second differential amplifier in sequential series and described 3rd amplifier, resistance R b3be connected in the same way between input and output of described 3rd amplifier, resistance R b31between the reverse input end being connected on described 3rd amplifier and ground.
12. according to claim 1ly detect and the difference analogue fore device of transmission system for low frequency signal, it is characterized in that, described digital/analog converter is current-mode R2R structure, and the output area of described digital/analog converter is 1/2nd GND Values to the maximum.
13. according to claim 1ly detect and the difference analogue fore device of transmission system for low frequency signal, it is characterized in that, described digital/analog converter is current-mode R2R structure, and the output area of described digital/analog converter is greatly to GND Value, and common mode electrical level is adjustable.
14. according to claim 1ly detect and the difference analogue fore device of transmission system for low frequency signal, it is characterized in that, described digital/analog converter is voltage mode R2R structure, and the output area of described digital/analog converter is greatly to GND Value.
15. according to claim 1ly detect and the difference analogue fore device of transmission system for low frequency signal, and it is characterized in that, described digital/analog converter is R2R network configuration, and the output area of described digital/analog converter is greatly to GND Value.
16. according to claim 1ly detect and the difference analogue fore device of transmission system for low frequency signal, it is characterized in that, for comprising three NMOS tube Mn0 than the comparator of higher level, Mn1, a Mn2 and two PMOS Mp1, Mp2, and a reverser, PMOS Mp1 is connected with the grid of PMOS Mp2, source electrode all connects power Vcc, the drain electrode of PMOS Mp1 connects the drain electrode of NMOS tube Mn1, the source electrode of NMOS tube Mn1 and NMOS tube Mn2 all connects the drain electrode of NMOS tube Mn0, the drain electrode of NMOS tube Mn2 connects the drain electrode of PMOS Mp2, the source ground GND of NMOS tube Mn0, grid meets bias voltage Vbn, the drain electrode of the input termination PMOS Mp2 of reverser, the grid of NMOS tube Mn2 is the positive input Vin+ of comparator, the grid of NMOS tube Mn1 is the reverse input end Vin-of comparator, the output of reverser is the output end vo of comparator.
17. according to claim 1ly detect and the difference analogue fore device of transmission system for low frequency signal, it is characterized in that, three PMOS Mp0 are comprised for more low level comparator, Mp3, a Mp4 and two NMOS tube Mn3, Mn4 and one reverser, the source electrode of PMOS Mp0 connects power Vcc, grid meets bias voltage Vbp, drain electrode connects the source electrode of PMOS Mp3 and PMOS Mp4, the drain electrode of PMOS Mp3 connects the drain and gate of NMOS tube Mn3, the source ground GND of NMOS tube Mn3 and NMOS tube Mn4, the drain electrode of NMOS tube Mn4 connects the drain electrode of PMOS Mp4, the drain electrode of the input termination NMOS tube Mn4 of reverser, the grid of PMOS Mp4 is the positive input Vin+ of comparator, the grid of PMOS Mp3 is the reverse input end Vin-of comparator, the output of reverser is the output end vo of comparator.
18. 1 kinds of low frequency signal detection methods, based on detecting and the difference analogue fore device of transmission system for low frequency signal described in any one of claim 1 to 17, is characterized in that, comprising:
Step a, by experiment, measures magnetic induction module and sends the card reader of low frequency magnetic field at the voltage magnitude of induced voltage after amplifier amplifies of different distance point, determining the corresponding relation of this voltage magnitude and distance, and sets up the corresponding table of voltage magnitude and distance;
Step b, the needs of distance of swiping the card according to decoded low frequency signal transmission data and control, in conjunction with signal to noise ratio requirement, the two level threshold exported by one or more pairs of digital to analog converter are formed sluggish judgement voltage threshold and adjudicate analog signal, obtain the code stream information of low-frequency magnetic place transmission, or form sluggish judgement voltage threshold by single level threshold that one or more digital to analog converter exports to adjudicate analog signal, obtain the code stream information of low-frequency magnetic place transmission; The two level threshold exported by one or more pairs of digital to analog converter are formed non-hysteresis judgement voltage threshold and adjudicate analog signal, obtain the distance feature information that low-frequency magnetic place is transmitted, or form non-hysteresis judgement voltage threshold by single level threshold that one or more digital to analog converter exports to adjudicate analog signal, obtain the distance feature information that low-frequency magnetic place is transmitted;
Step c, signal after the judgement of non-hysteresis judgment condition is sampled, obtain 0,1 code stream sequence, 1 signal proportion thresholding is set, in the time window length of setting, this code stream sequence is added up, when code stream sequence ratio reaches preset ratio thresholding shared by 1 signal, then think and enter predeterminable range scope, otherwise think and do not enter this distance range; Burst after sluggish judgment condition judgement is decoded, extracts the code stream information of low frequency magnetic field, complete low-frequency magnetic field signal one-way communication.
19. low frequency signal detection methods according to claim 18, it is characterized in that, in described step b, according to the corresponding table of voltage magnitude described in step a with distance, in conjunction with separating code distance, the requirement of distance controlling, the ratio thresholding that arranges 1 signal arrange the level that comparator exported to by digital to analog converter.
20. low frequency signal detection methods according to claim 19, it is characterized in that, the level that comparator exported to by described paired digital to analog converter is non-hysteresis judgment condition, its method to set up is: set the distance of desired control as D1, search the corresponding table of voltage magnitude and distance, obtain signal intensity amplitude corresponding to distance D1 for+A1 to-A1, the ratio thresholding arranging 1 signal is R1, according to A1 and R1, the level L1 exporting to comparator is set, L2, meet in one-period, the percentage of time that analog front-end device amplitude output signal is greater than L1 or is less than L2 equals R1, namely being greater than R1 then enters within the scope of the distance D1 of requirement control, otherwise do not enter require command range D1 scope in.
21. low frequency signal detection methods according to claim 19, it is characterized in that, the level that comparator exported to by described paired digital to analog converter is sluggish judgment condition, its method to set up is: set and expect to carry out the distance of decoding as D2, search the corresponding table of voltage magnitude and distance, obtain the amplitude of variation of distance D2 respective signal for+A2 to-A2, the amplitude recording the generation of most of noise is A3, level L3, L4 of exporting to comparator are set, make L3 be greater than+A3 and be less than+A2; L4 is less than-A3 and is greater than-A2, namely then allows decoding when distance is less than D2, otherwise does not allow decoding.
22. low frequency signal detection methods according to claim 18, it is characterized in that, in described step b, logic OR process being carried out to two comparator output signals being input as non-hysteresis judgment condition comparative level, obtaining the digital signal for extracting range information.
23. low frequency signal detection methods according to claim 18, is characterized in that, in described step b, exporting and carry out sluggishness process, obtaining the digital signal for extracting magnetic field code stream information to two comparators being input as sluggish judgment condition comparative level.
24. low frequency signal detection methods according to claim 18, is characterized in that, in described step c, arrange the digital signal of digital burr filter to input and carry out burr filtering, from the signal of filtering burr, decode low frequency magnetic field data flow.
25. low frequency signal detection methods according to claim 18, is characterized in that, in described step b, use single comparator to export comparative level and extract magnetic field range information and code stream information.
26. low frequency signal detection methods according to claim 25, is characterized in that, the single comparative level using single digital to analog converter to export extracts magnetic field code stream information, and the level that comparator exported to by digital to analog converter is set to amplifier input reference level.
27. low frequency signal detection methods according to claim 18, is characterized in that, use the digital signal of single comparator or comparator output in pairs to decode.
28. low frequency signal detection methods according to claim 18, is characterized in that, use the digital signal of single comparator or comparator output in pairs to carry out the judgement of single distance; The digital signal using multiple single comparator to export carries out the judgement of multiple distance, or the judgement using multiple paired comparator to carry out between multiple distance, multiple distance regions; The digital signal using multiple single comparator to export carries out the judgement of multiple distance, or the judgement using multiple paired comparator to carry out between multiple distance, multiple distance regions.
29. low frequency signal detection methods according to claim 18, is characterized in that, multiple single comparator used in combination and the digital signal that comparator exports in pairs carry out the judgement between multiple distance, multiple distance regions.
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