CN103022281A - Manufacturing method for nanoscale patterned substrate - Google Patents
Manufacturing method for nanoscale patterned substrate Download PDFInfo
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- CN103022281A CN103022281A CN2012105643145A CN201210564314A CN103022281A CN 103022281 A CN103022281 A CN 103022281A CN 2012105643145 A CN2012105643145 A CN 2012105643145A CN 201210564314 A CN201210564314 A CN 201210564314A CN 103022281 A CN103022281 A CN 103022281A
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Abstract
The invention provides a manufacturing method for a nanoscale patterned substrate. The method includes: providing a substrate, and forming a conductive layer on the substrate; depositing metal on the conductive layer by using the electro-deposition process to form metal nano-particles, wherein materials of the metal and the conductive layer are different, and the time of the electro-deposition process is much less than the time for forming a film by the electro-deposition process; using the metal nano-particles as a covering film, and etching the conductive layer to form a patterned conductive layer; using the patterned conductive layer as a covering film to etch the substrate; and removing the patterned conductive layer and the metal nano-particles to form the nanoscale patterned substrate. The electro-deposition process is utilized to form regularly-arrayed marks on the conductive layer, the metal nano-particles are formed at the marks, the metal nano-particles are utilized as the covering film to etch the conductive layer, and the substrate is etched to form the nanoscale patterned substrate. The manufacturing method for the nanoscale patterned substrate has the advantages of simple process and low process cost.
Description
Technical field
The present invention relates to LED manufacturing technology field, relate in particular to a kind of manufacture method of nano patterned substrate.
Background technology
In the LED manufacturing technology process, because saphire substrate material and epitaxial material all differ greatly to refractive index from lattice constant, thermal expansion factor.These physical property differences directly cause the epitaxial material of Grown of low quality, cause LED internal quantum efficiency (IQE) to be restricted, and then affect the raising of external quantum efficiency (EQE) and light efficiency.
In order to improve LED efficient, industry has been introduced patterned low temperature buffer layer, and described patterned low temperature buffer layer can improve internal quantum efficiency, specifically, then epitaxial growth low temperature buffer layer on substrate carries out graphically other epitaxial loayer of afterwards regrowth to described low temperature buffer layer first.So, namely need three steps of epitaxial growth of epitaxial growth-graphical-again, so that complex process, time-consuming.
Therefore, graphical sapphire substrate (Patterned Sapphire Substrate, PSS) technology is introduced into, itself and method difference before are, the PSS technology has been accomplished the figure on the original low temperature buffer layer on the substrate, that is to say patterned substrate but not graphical low temperature buffer layer has so just overcome above-mentioned shortcoming.The principle that the PSS technology can improve LED efficient is effectively to reduce poor row's density, reduces the epitaxial growth defective, promotes the epitaxial wafer quality, reduces non-radiative recombination center, has improved interior quantum effect; In addition, the PSS structure has increased the order of reflection of photon at the sapphire interface place, the probability of photon effusion LED active area is increased, thereby light extraction efficiency is improved.PSS mainly makes flow process and comprises: mask layer is made, mask layer is graphical, mask pattern is removed four steps to transfer and the mask layer of substrate.Photoetching technique conventional on micron order just can satisfy the graphical process requirements of mask layer, but, along with the pattern of PSS technology is seted out towards nanoscale by micron order, cost and the difficulty of the process of conventional patterned substrate can't be applicable to large-scale production.
The patterned method of nanoscale PSS (NPSS:nano-PSS) technology mask layer is mainly nano impression at present.The basic thought of nano impression is by forming nano level pattern at mould, with die marks on the medium that is formed on the substrate, medium is the very thin polymer film of one deck normally, by mould the hot pressing of medium or the methods such as irradiation that see through mould are made the media structure sclerosis, thereby retain figure.Nano impression has very high requirement to the resolution of mould, planarization, uniformity, surface etc., and, in the moulding process, aiming between mould and the impression materials, the depth of parallelism, pressure uniformity, temperature homogeneity, ejection technique etc. all exist more problem.
Summary of the invention
The invention provides a kind of manufacture method of nano patterned substrate, utilization utilizes the electrodeposition technology mark that formation rule is arranged on conductive layer, then form metal nanoparticle in mark, and then utilize metal nanoparticle to be the mask etching conductive layer, then etched substrate is to form nano patterned substrate.The method has advantages of that technique is simple, process costs is low.
The invention provides a kind of manufacture method of nano patterned substrate, comprising:
Substrate is provided, forms conductive layer at described substrate;
The raised or sunken mark that formation rule is arranged on described conductive layer;
Use electrodeposition technology to form metal nanoparticle in described mark at described conductive layer, described metal is different from the material of conductive layer;
As mask, the described conductive layer of etching forms patterned conductive layer with described metal nanoparticle;
Take described patterned conductive layer as mask, the described substrate of etching;
Remove described patterned conductive layer and metal nanoparticle, form nano patterned substrate.
Optionally, described conductive layer is metal level or the ITO rete that Ag, Au, Cu form.
Optionally, the thickness of described conductive layer is 10nm ~ 100nm.
Optionally, the metal material of described electrodeposition technology deposition is Ag, Au or Cu.
Optionally, the electrodeposition technology time of formation metal nanoparticle is 5 seconds ~ 15 seconds.
Optionally, described wet-etching technology or the described conductive layer of plasma etching of utilizing.
Optionally, the etching liquid of described wet-etching technology is FeCl
3
Optionally, utilize focused ion beam microscope to form raised or sunken mark.
Optionally, utilize wet-etching technology or plasma etching industrial to come the described substrate of etching
Optionally, utilize the method for cmp or etching to remove described patterned conductive layer and metal nanoparticle.
The invention provides a kind of manufacture method of nano patterned substrate, the manufacture method of described nano patterned substrate forms conductive layer at substrate, then the raised or sunken mark that formation rule is arranged on conductive layer, then carry out electrodeposition technology, form metal nanoparticle by controlling the electrodeposition technology time in mark, afterwards with metal nanoparticle as the mask etching conductive layer, at last take conductive layer as the mask etching substrate, to form the nano patterned substrate of figure.The method need not be used high-precision photoetching equipment, also impresses without mould, has technique simple, the advantage that process costs is low.
Description of drawings
Fig. 1 is the flow chart of manufacture method of the nano patterned substrate of the embodiment of the invention;
Fig. 2 A ~ 2F is the generalized section of each step of manufacture method of the nano patterned substrate of the embodiment of the invention.
Embodiment
Mention in background technology, existing NPSS method has defective separately, and process costs is had higher requirement.The invention provides a kind of manufacture method of nano patterned substrate, the manufacture method of described nano patterned substrate forms conductive layer at substrate, then the raised or sunken mark that formation rule is arranged on conductive layer, then carry out electrodeposition technology, form metal nanoparticle by controlling the electrodeposition technology time in mark, afterwards with metal nanoparticle as the mask etching conductive layer, at last take conductive layer as the mask etching substrate, to form the nano patterned substrate of figure.The method need not be used high-precision photoetching equipment, also impresses without mould, has technique simple, the advantage that process costs is low.
Below in conjunction with accompanying drawing the present invention is described in more detail, has wherein represented the preferred embodiments of the present invention, should the described those skilled in the art of understanding can revise the present invention described here, and still realize advantageous effects of the present invention.Therefore, following description is appreciated that extensively knowing for those skilled in the art, and not as limitation of the present invention.
For clear, whole features of practical embodiments are not described.In the following description, be not described in detail known function and structure, the confusion because they can make the present invention owing to unnecessary details.Will be understood that in the exploitation of any practical embodiments, must make a large amount of implementation details to realize developer's specific objective, for example according to relevant system or relevant commercial restriction, change into another embodiment by an embodiment.In addition, will be understood that this development may be complicated and time-consuming, but only be routine work to those skilled in the art.
In the following passage, with way of example the present invention is described more specifically with reference to accompanying drawing.According to the following describes and claims, advantages and features of the invention will be clearer.It should be noted that, accompanying drawing all adopts very the form of simplifying and all uses non-accurately ratio, only in order to convenient, the purpose of the aid illustration embodiment of the invention lucidly.
Please refer to Fig. 1, it is the flow chart of manufacture method of the nano patterned substrate of the embodiment of the invention, and described method comprises the steps:
Step S021 provides substrate, forms conductive layer at described substrate;
Step S022, the raised or sunken mark that formation rule is arranged on conductive layer;
Step S023 uses the electrodeposition technology plated metal at described conductive layer, forms metal nanoparticle, and described metal is different from the material of conductive layer, and the described electrodeposition technology time is much smaller than the film forming time of electrodeposition technology;
Step S024, as mask, the described conductive layer of etching forms patterned conductive layer with described metal nanoparticle;
Step S025, take described patterned conductive layer as mask, the described substrate of etching;
Step S026 removes described patterned conductive layer and metal nanoparticle, forms nano patterned substrate.
The core concept of the method is, form conductive layer at substrate, then utilize the focused ion beam microscope raised or sunken mark that formation rule is arranged on conductive layer, carry out electrodeposition technology at conductive layer afterwards, form metal nanoparticle by controlling the electrodeposition technology time in mark, as the mask etching conductive layer, at last take conductive layer as the mask etching substrate, scheme nano patterned substrate to form with metal nanoparticle.
With reference to Fig. 2 A, execution in step S021 provides substrate, forms conductive layer at described substrate.In the present embodiment, described substrate 101 is Sapphire Substrate, and conductive layer provides the place for follow-up electrodeposition technology, be conductive material, be preferably Ag, Au, Cu or ITO(Indium tin oxide tin indium oxide), in the present embodiment, conductive layer is the ito thin film layer, and thickness is 10nm ~ 100nm.
With reference to figure 2B, execution in step S022, the raised or sunken mark 106 that formation rule is arranged on conductive layer 102.Can utilize focused ion beam microscope (FIB, Focused Ion beam) to form raised or sunken mark 106.Raised or sunken mark 106 places can form metal nanoparticle in the process of follow-up electro-deposition.Utilize the evaporation function of focused ion beam microscope, can form in the position of conductive layer 102 designs the mark of projection, concrete, provide organic metallic vapour on conductive layer 102 surfaces, utilize the ion beam of FIB to decompose organic metal steam, the corresponding region plated metal on conductive layer 102 surfaces.Utilize the selective etch function of focused ion beam microscope to form the mark that caves in the position in conductive layer 102 designs, concrete, utilize the position of Ions Bombardment conductive layer 102 surperficial appointments, simultaneously can provide corrosive gas on conductive layer 102 surfaces, accelerate the removal of conductive layer 102 materials.In the present embodiment, utilize FIB to form the mark 106 of projection on conductive layer 102 surfaces.
With reference to figure 2C, execution in step S023, use electrodeposition technology to form metal nanoparticle 103 at described conductive layer 102, electrodeposition technology usually is used for film forming, and in its incipient stage, metal ion is separated out from electric depositing solution at conductive layer 102 by electrochemical reaction and formed nucleus, metal ion continues to form nucleus at conductive layer on the one hand under electrochemical action, enter on the other hand nucleus, make nucleus growth, finally form continuous membrane structure at conductive layer.Electrodeposition technology is in order to form metal nanoparticle in the application's the scheme, need not to form continuous film, thereby the time of electrodeposition technology controlled, make it much smaller than the time that forms continuous membrane structure, only form nano level metallic crystal on conductive layer 102 surfaces like this, that is, metal nanoparticle 103.And, since before formed raised or sunken mark 106 at conductive layer, during electro-deposition, raised or sunken place current potential is higher, metal ion can be preferentially forms nucleus in these positions discharges, make metal nanoparticle 103 by indicia distribution on conductive layer 102.Make owing in subsequent step, need utilize metal nanoparticle 103 to come etching conductive layer 102 as mask, therefore the material of metal nanoparticle 103 need to be different from conductive layer 102 materials, be preferably Ag, Au or Cu, the material of metal nanoparticle 103 is elected Ag as in the present embodiment, and the time of electrodeposition technology is 5 seconds ~ 15 seconds.
With reference to figure 2C, execution in step S023, as mask, the described conductive layer 102 of etching forms patterned conductive layer 102 ' with described metal nanoparticle 103.Can utilize wet etching or plasma etching to come the described conductive layer 102 of etching, utilize wet-etching technology in the present embodiment, etching liquid is elected FeCl as
3Solution.Those skilled in the art can come selective etching mode and etching liquid or etching gas according to the concrete material of conductive layer 102 and metal nanoparticle 103.
With reference to figure 2D, execution in step S024, take described patterned conductive layer 102 ' as mask, the described substrate 101 of etching.Can utilize wet etching or plasma etching to come the described substrate 101 of etching.The preferred graphical described substrate 101 of wet-etching technology that adopts in the present embodiment, for example, can select described substrate 101 etch rates higher, and the etching liquid of the patterned conductive layer 102 ' of etching hardly, to form hole 104 at substrate smoothly, form patterned substrate 101 '.Certainly, as select the etching liquid that can both carry out etching to patterned conductive layer 102 and Sapphire Substrate 101, temperature and the process time of etching technics are controlled, can realize completing steps S023 and step S024 in a step.
With reference to figure 2E, execution in step S025 removes described patterned conductive layer 102 ' and metal nanoparticle 103, forms nano patterned substrate 101 '.Can remove by the method for cmp or etching described patterned conductive layer 102 ' and metal nanoparticle 103.Afterwards, finish patterned Sapphire Substrate 101 ' and can enter the follow-up techniques such as epitaxial growth.
In sum, the invention provides a kind of manufacture method of nano patterned substrate, the manufacture method of described nano patterned substrate forms conductive layer at substrate, then the raised or sunken mark that formation rule is arranged on conductive layer, then carry out electrodeposition technology, form metal nanoparticle by controlling the electrodeposition technology time in mark, afterwards with metal nanoparticle as the mask etching conductive layer, at last take conductive layer as the mask etching substrate, to form the nano patterned substrate of figure.The method need not be used high-precision photoetching equipment, also impresses without mould, has technique simple, the advantage that process costs is low.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.
Claims (10)
1. the manufacture method of a nano patterned substrate comprises:
Substrate is provided, forms conductive layer at described substrate;
The raised or sunken mark that formation rule is arranged on described conductive layer;
Use electrodeposition technology to form metal nanoparticle in described mark at described conductive layer, described metal is different from the material of conductive layer;
As mask, the described conductive layer of etching forms patterned conductive layer with described metal nanoparticle;
Take described patterned conductive layer as mask, the described substrate of etching;
Remove described patterned conductive layer and metal nanoparticle, form nano patterned substrate.
2. the manufacture method of nano patterned substrate as claimed in claim 1 is characterized in that: described conductive layer is metal level or the ITO rete that Ag, Au, Cu form.
3. the manufacture method of nano patterned substrate as claimed in claim 1, it is characterized in that: the thickness of described conductive layer is 10nm ~ 100nm.
4. the manufacture method of nano patterned substrate as claimed in claim 1 is characterized in that: the metal material of described electrodeposition technology deposition is Ag, Au or Cu.
5. the manufacture method of nano patterned substrate as claimed in claim 1 is characterized in that: the electrodeposition technology time that forms metal nanoparticle is 5 seconds ~ 15 seconds.
6. the manufacture method of nano patterned substrate as claimed in claim 1 is characterized in that: utilize focused ion beam microscope to form raised or sunken mark.
7. the manufacture method of nano patterned substrate as claimed in claim 1 is characterized in that: utilize the described conductive layer of wet-etching technology or plasma etching.
8. the manufacture method of nano patterned substrate as claimed in claim 7, it is characterized in that: the etching liquid of described wet-etching technology is FeCl
3
9. the manufacture method of nano patterned substrate as claimed in claim 1 is characterized in that: utilize wet-etching technology or the described substrate of plasma etching industrial etching.
10. the manufacture method of nano patterned substrate as claimed in claim 1 is characterized in that: utilize cmp or etching technics to remove described patterned conductive layer and metal nanoparticle.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104733569A (en) * | 2013-12-19 | 2015-06-24 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Manufacturing method of nano-sized patterned substrate |
| CN105984862A (en) * | 2015-02-16 | 2016-10-05 | 北京大学深圳研究生院 | Method for growing carbon nano-tubes |
| CN106206896A (en) * | 2016-08-22 | 2016-12-07 | 厦门市三安光电科技有限公司 | Compound pattern Sapphire Substrate and the manufacture method of epitaxial wafer thereof |
| CN109239815A (en) * | 2017-07-10 | 2019-01-18 | 上海箩箕技术有限公司 | Cover board and forming method thereof, cover board motherboard, electronic equipment |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101250719A (en) * | 2007-12-05 | 2008-08-27 | 南京大学 | Method for one-step synthesing and assembling cuprum nanometer particle |
| CN102447024A (en) * | 2011-10-27 | 2012-05-09 | 华灿光电股份有限公司 | Method for manufacturing nanometer-level PSS (Patterned Sapphire Substrate) |
| US20120299222A1 (en) * | 2010-12-22 | 2012-11-29 | Qingdao Technological University | Method and device for full wafer nanoimprint lithography |
-
2012
- 2012-12-21 CN CN201210564314.5A patent/CN103022281B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101250719A (en) * | 2007-12-05 | 2008-08-27 | 南京大学 | Method for one-step synthesing and assembling cuprum nanometer particle |
| US20120299222A1 (en) * | 2010-12-22 | 2012-11-29 | Qingdao Technological University | Method and device for full wafer nanoimprint lithography |
| CN102447024A (en) * | 2011-10-27 | 2012-05-09 | 华灿光电股份有限公司 | Method for manufacturing nanometer-level PSS (Patterned Sapphire Substrate) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104733569A (en) * | 2013-12-19 | 2015-06-24 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Manufacturing method of nano-sized patterned substrate |
| CN104733569B (en) * | 2013-12-19 | 2017-07-04 | 北京北方微电子基地设备工艺研究中心有限责任公司 | The preparation method of nanometer-scale pattern substrate |
| CN105984862A (en) * | 2015-02-16 | 2016-10-05 | 北京大学深圳研究生院 | Method for growing carbon nano-tubes |
| CN105984862B (en) * | 2015-02-16 | 2018-08-28 | 北京大学深圳研究生院 | Method for growing carbon nanotube |
| CN106206896A (en) * | 2016-08-22 | 2016-12-07 | 厦门市三安光电科技有限公司 | Compound pattern Sapphire Substrate and the manufacture method of epitaxial wafer thereof |
| CN106206896B (en) * | 2016-08-22 | 2019-03-26 | 厦门市三安光电科技有限公司 | The production method of compound pattern Sapphire Substrate and its epitaxial wafer |
| CN109239815A (en) * | 2017-07-10 | 2019-01-18 | 上海箩箕技术有限公司 | Cover board and forming method thereof, cover board motherboard, electronic equipment |
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| CN103022281B (en) | 2016-03-30 |
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Effective date of registration: 20180626 Address after: 201306 N1128 room 23, 2 New Town Road, mud town, Pudong New Area, Shanghai Patentee after: Gallium semiconductor technology (Shanghai) Co., Ltd. Address before: 201306 1889 Hong Yin Road, Lingang industrial area, Pudong New Area, Shanghai Patentee before: EnRay Tek Optoelectronics (Shanghai) Co., Ltd. |
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