CN103021968A - High-heat-resistance bonding material and semiconductor structure using same - Google Patents

High-heat-resistance bonding material and semiconductor structure using same Download PDF

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Publication number
CN103021968A
CN103021968A CN201210570250XA CN201210570250A CN103021968A CN 103021968 A CN103021968 A CN 103021968A CN 201210570250X A CN201210570250X A CN 201210570250XA CN 201210570250 A CN201210570250 A CN 201210570250A CN 103021968 A CN103021968 A CN 103021968A
Authority
CN
China
Prior art keywords
adhesives
chip
semiconductor structure
fire resistance
adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201210570250XA
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Chinese (zh)
Inventor
包兴坤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SUZHOU GUIZHIYUAN MICROELECTRONIC CO Ltd
Original Assignee
SUZHOU GUIZHIYUAN MICROELECTRONIC CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SUZHOU GUIZHIYUAN MICROELECTRONIC CO Ltd filed Critical SUZHOU GUIZHIYUAN MICROELECTRONIC CO Ltd
Priority to CN201210570250XA priority Critical patent/CN103021968A/en
Publication of CN103021968A publication Critical patent/CN103021968A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Adhesives Or Adhesive Processes (AREA)

Abstract

The invention discloses a high-heat-resistance bonding material and a semiconductor structure using the same. The high-heat-resistance bonding material used for making semiconductor chips comprises an adhesive such as epoxy resin or polyimide, high temperature resistant materials such as glass microspheres, glass beads, ceramic microspheres and ceramic beads are scattered in the adhesive, and particles of the high-heat-resistance material are used for screening to obtain particles which are uniform in size. Each of the semiconductor chips packaged by plastic is surrounded by the adhesive.

Description

High-fire resistance adhesives and its semiconductor structure of use
Technical field
Present invention relates in general to semiconductor device and structure thereof, the semiconductor chip in the semiconductor structure that more particularly the present invention relates to has better thermal technology and makes environment.
Background technology
Semiconductor chip generally is installed in a seal-packed cavity or the Plastic Package bag.This chip is by using suitable adhesive to be adhered on the support substrate.On power device, a considerable amount of heats are produced by this chip, and suitable heat reaches in the required encapsulation of substrate and heat radiation from chip.Yet some integrated circuit (IC) chip can not produce enough heats to reach the purpose by encapsulating to dispel the heat.The more important thing is that installing by whole chip or the encapsulation between chip needs a uniform temperature.Therefore, it is essential providing uniform, high heat-resisting resistance between chip and substrate and encapsulation.
Summary of the invention
One of the present invention to as if improved the semiconductor chip of the encapsulation of resistance to heat between chip and the encapsulation.Of the present invention another to as if a kind of binding material, it is used for semiconductor chip is bonded on the support substrate, and uniform, high heat-resisting resistance is provided between chip and substrate.A feature of the present invention is that a kind of adhesives comprises adhesive and resistant to elevated temperatures dispersion of materials wherein.
Technical solution of the present invention
Briefly, according to invention preparation binding material the time, need to provide a suitable binding agent such as epoxy resin, silicones or polyimides.The microballoon of high-fire resistance material such as glass, ceramic fine bead and generally unification size is added in the adhesive.Be applied between semiconductor chip and the support substrate and by hot curing after this adhesives.In a plastic packaged device, this curing adhesives is being encapsulated on the semiconductor chip before the Plastic Package.So the present invention and object and characteristics thereof will be by following detailed descriptions and more obvious according to the claim of the narration of drawing.
Documents,
Patent of invention: high performance chip packaging and method, application number: 99103943.2.
Description of drawings
Fig. 1 is the end view of a Partial Fragment, specifies according to of the present invention, uses adhesives that semiconductor chip is installed on the seal-packed substrate.
Fig. 2 be one according to the cutaway view that specifies the Partial Fragment of the plastic encapsulated semiconductor chip that uses adhesives of the present invention.
Embodiment
Fig. 1 is the end view of a Partial Fragment, and semiconductor chip 10 is installed in one as on the seal-packed support substrate 12.Chip 10 spatially from packing upper separation, uses adhesive (being shown as 14 among the figure) except its lower surface and is connected on the substrate 12.As mentioned above, to promote semiconductor chip to conduct heat to substrate and to reach the purpose of package cooling that this is desirable in power device.Yet, in many integrated circuits, prior in whole semiconductor chip and the temperature that is consistent between the semiconductor chip in same encapsulation.
According to the present invention, adhesive 14 comprises an adhesive such as epoxy resin or polyimides, represents that with 16 the high-fire resistance material of the inside is to disperse such as glass microsphere 18.Glass microsphere increases the thermal resistance of adhesive, and the even distribution of glass microsphere promotes the unified thermal resistance between semiconductor chip 10 and the substrate 12 to increase.
Fig. 2 is a cutaway view that another Plastic Package chip according to the present invention is realized.Summary of the present invention before these clock implementation chips 20 bases embeds and is encapsulated within the plastics package 24 with adhesives 22.After using die bonding material 22 with semiconductor chip 20 coatings, before the curing of adhesives, chip 20 is placed on the chip pedal 26.Therefore, semiconductor chip agglutination is on chip pedal 26, and before Plastic Package, use adhesives 22 encapsulates fully.
According to an embodiment of the present invention, in making the process of adhesives, employing be that composition is the adhesive of polyimides.Commercial glass microsphere is by screening to obtain the microballoon of unified size.Microballoon has diameter 3-4 mil, and 4-5 mil, and 5-6 mil have been used to different specific implementations.Polyimides at room temperature is solidified liquid, and after the high-fire resistance material joined binding agent, adhesives was applied to semiconductor chip as mentioned above.After this, in the process of solidifying adhesives, semiconductor device is temperature cycles.Use polyimides, with binding material and semiconductor device be heated to 90 ℃ about one hour, 150 ℃ about one hour, and 300 ℃ come respectively impact effect in about one hour.
Other adhesives such as epoxy resin and silicone adhesive can be used, and other high-fire resistance materials such as glass, ceramic fine bead and ceramic foam can be used.
The adhesives of making according to the present invention, being proved to be when the consistency of the working temperature that improves the encapsulated integrated circuit chip is successfully.Although the present invention is described by specific realization, this description be set forth character and should not be regarded as limitation of the present invention.State that as claim the related researcher that profound understanding arranged for this technology might propose various modifications and application not deviating under the prerequisite of essence spirit of the present invention and category.

Claims (5)

1. a high-fire resistance adhesives and use its semiconductor structure, a semiconductor structure combination, it is characterized in that: it provides a unified temperature to run through whole semiconductor chip, this combination comprises that places the support substrate between described chip and the adhesives, adhesives directly contacts with described substrate with described chip, this adhesives comprises adhesive and high-fire resistance material, it is the screening particle form of uniform size with diameter at least 2 mils, and described particle is dispersed in described adhesive and for unified spacing and uniform thermal insulation are provided between said chip and the substrate.
2. high-fire resistance adhesives according to claim 1 and its semiconductor structure of use is characterized in that: described adhesives covering said chip.
3. high-fire resistance adhesives according to claim 1 and use its semiconductor structure is characterized in that: described adhesive is by silica gel, the composition of epoxy resin and polyimides.
4. high-fire resistance adhesives according to claim 3 and use its semiconductor structure is characterized in that: described high heat proof material is by glass microsphere, bead, and ceramic microsphere, ceramic bead forms.
5. high-fire resistance adhesives according to claim 1 and use its semiconductor structure is characterized in that: described high heat proof material is by glass microsphere, bead, and ceramic microsphere, ceramic bead forms.
CN201210570250XA 2012-12-25 2012-12-25 High-heat-resistance bonding material and semiconductor structure using same Pending CN103021968A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201210570250XA CN103021968A (en) 2012-12-25 2012-12-25 High-heat-resistance bonding material and semiconductor structure using same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210570250XA CN103021968A (en) 2012-12-25 2012-12-25 High-heat-resistance bonding material and semiconductor structure using same

Publications (1)

Publication Number Publication Date
CN103021968A true CN103021968A (en) 2013-04-03

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Country Status (1)

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CN (1) CN103021968A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107869087A (en) * 2017-11-03 2018-04-03 广东松炀再生资源股份有限公司 A kind of method that reclaimed waste paper prepares highly intensified corrugated paper
CN108622845A (en) * 2017-03-16 2018-10-09 日月光半导体制造股份有限公司 Semiconductor device packages and its manufacturing method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4888634A (en) * 1987-07-24 1989-12-19 Linear Technology Corporation High thermal resistance bonding material and semiconductor structures using same
CN101305040A (en) * 2005-11-10 2008-11-12 汉高两合股份公司 Binding agent, sealant and paint containing glass particle as filling material

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4888634A (en) * 1987-07-24 1989-12-19 Linear Technology Corporation High thermal resistance bonding material and semiconductor structures using same
CN101305040A (en) * 2005-11-10 2008-11-12 汉高两合股份公司 Binding agent, sealant and paint containing glass particle as filling material

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108622845A (en) * 2017-03-16 2018-10-09 日月光半导体制造股份有限公司 Semiconductor device packages and its manufacturing method
CN108622845B (en) * 2017-03-16 2023-12-01 日月光半导体制造股份有限公司 Semiconductor device package and method of manufacturing the same
CN107869087A (en) * 2017-11-03 2018-04-03 广东松炀再生资源股份有限公司 A kind of method that reclaimed waste paper prepares highly intensified corrugated paper

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Application publication date: 20130403