CN103014838B - A kind of vertical pulling preparation method of ultra thin single crystalline silicon chip - Google Patents

A kind of vertical pulling preparation method of ultra thin single crystalline silicon chip Download PDF

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CN103014838B
CN103014838B CN201210577671.5A CN201210577671A CN103014838B CN 103014838 B CN103014838 B CN 103014838B CN 201210577671 A CN201210577671 A CN 201210577671A CN 103014838 B CN103014838 B CN 103014838B
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single crystal
tungsten filament
growing furnace
crystal growing
wire
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CN103014838A (en
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丁建宁
袁宁一
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Changzhou University
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Changzhou University
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Abstract

The present invention relates to ultra thin single crystalline silicon chip manufacturing technology field, particularly a kind of thickness is less than the preparation method of the monocrystalline silicon piece of 40um, is applied to semiconducter device and solar cell field.It is characterized in that the quartz crucible comprising the steps: raw material polysilicon block to be put into single crystal growing furnace; Single crystal growing furnace cuts out, and is evacuated down to 10 -2-10 -3torr, then pours high-purity argon, keep vacuum tightness in single crystal growing furnace to remain on 10 ~ 20? Torr; In single crystal growing furnace, the polycrystalline silicon raw material in heating and melting quartz crucible, in single crystal growing furnace, Heating temperature is 1412-1450 DEG C; After the temperature-stable of silicon melt, the wire seed crystal that is fixed on stretching structure being immersed in silicon melt, lift after insulation 5-10min, stretching structure is 10-30 by wire diameter? the tungsten filament wire frame of micron tungsten filament line composition, is pull rate at 20-50? mm/min; After stretching structure and liquid level separate, take out after rising to furnace chamber cooling 20-60min, ultra thin wafer covers on tungsten filament frame; Drive single crystal growing furnace and take out silicon chip.

Description

A kind of vertical pulling preparation method of ultra thin single crystalline silicon chip
Technical field
The present invention relates to ultra thin single crystalline silicon chip manufacturing technology field, particularly a kind of thickness is less than the preparation method of the monocrystalline silicon piece of 40um, is applied to semiconducter device and solar cell field.
Background technology
Current energy source crisis and environmental problem are on the rise, further urgent to the demand of Solar use, but relative to the petrochemical industry of routine, coal generating, solar energy power generating cost is still higher; Efficiently, low cost is the target of solar cell technology pursue, and in numerous solar cells, crystal silicon solar energy battery occupies about 85% of whole photovoltaic market; At present, the silicon wafer thickness of industrial community single crystal silicon solar cell used is 180 ~ 200 μm, and derive from silicon sheet material greatly in cost for solar power generation, one that reduces costs important and direct approach reduces silicon wafer thickness, in the near future, the expection of silicon chip solar cell thickness can be down to less than 40 μm, and this will bring a revolution to solar battery technology.
Current semicon industry and photovoltaic industry monocrystalline silicon piece used are all obtained by cutting silicon single crystal ingot.And thickness is lower than the ultra thin silicon wafers of 100 microns, SiliconGenesis company of the U.S. has started to research and develop in 2008 and utilizes the mode of Hydrogen implantation-stripping to carry out producing [A.Brailoveetal., FirstDemonstrationofHighVolumeManufacturingofKerf-FreePo lyMaxWafers, Proc.ofthe25thEuropeanPhotovoltaicSolarEnergyConf., p.1613,2010; A.Fujisaka, KeepingPacewithCostReductionasModulePricesContinuetoDecl ine, PhotovoltaicsWorld, pp38-41, July/August2010.], European microelectronics research centre IMEC(InteruniversityMicroelectronicsCentre) propose method-stress induced stripping means that another kind prepares ultra thin silicon wafers.
Summary of the invention
A kind of new thickness of content development of the present invention is lower than the manufacture method of 40 microns of ultra thin silicon wafers, and namely utilize the method for vertical pulling, directly prepare ultra thin silicon wafers, concrete steps comprise:
1, raw material polysilicon block is put into the quartz crucible of single crystal growing furnace.
2, single crystal growing furnace cuts out, and is evacuated down to 10 -2-10 -3torr, then pours high-purity argon, keeps vacuum tightness in single crystal growing furnace to remain on 10 ~ 20Torr.
3, in single crystal growing furnace, the polycrystalline silicon raw material in heating and melting quartz crucible, in single crystal growing furnace, Heating temperature is 1412-1450 DEG C
4, after the temperature-stable of silicon melt, immerse in silicon melt by the wire seed crystal be fixed on stretching structure, lift after insulation 5-10min, stretching structure is the tungsten filament wire frame that 10-30 micron tungsten filament line forms by wire diameter, and pull rate is at 20-50mm/min.
5, after stretching structure and liquid level separate, take out after rising to furnace chamber cooling 20-60min, ultra thin wafer covers on tungsten filament frame.
6, drive single crystal growing furnace and take out silicon chip.
Described wire single crystal seed is fixed on tungsten filament by the method for laser zone remelting, specific as follows: be placed on by tungsten filament under wire single crystal seed, utilizes laser to move along tungsten filament direction, and seed crystal melts, and envelopes tungsten filament, reaches the effect of fixing seed crystal.
Described wire single crystal seed is fixed on the tungsten filament in tungsten filament wire frame horizontal direction.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of stretching structure of the present invention.
Embodiment
embodiment 1
1, wide 180mm, the square quartz crucible of dark 180mm, long 200mm is put in single crystal growing furnace, and polycrystalline silicon raw material is placed in quartz crucible.
2, first vacuumize monocrystaline silicon stove, furnace pressure is evacuated to 10 -3torr, then pour high-purity argon (99.999%), in single crystal growing furnace, vacuum tightness remains on 10Torr.
3, then open graphite heater power supply, be heated to temperature of fusion 1420 oc, makes polycrystalline silicon raw material melt.
4, after the temperature-stable of silicon melt, slowly immersed in silicon melt by the tungsten filament frame (tungsten filament wire diameter 30 microns) being fixed with seed crystal, shift mechanism upwards promotes with the speed of 30mm/min.
5, after stretching structure and liquid level separate, take out after cooling 50min.
6, drive single crystal growing furnace and take out silicon chip, silicon wafer thickness is at 40 microns.
embodiment 2
1, with example one.
2, with example one.
3, then open graphite heater power supply, be heated to temperature of fusion 1450 oc, makes polycrystalline silicon raw material melt.
4, after the temperature-stable of silicon melt, slowly immersed in silicon melt by the tungsten filament frame (tungsten filament wire diameter 20 microns) being fixed with seed crystal, shift mechanism upwards promotes with the speed of 50mm/min.
5, after stretching structure and liquid level separate, take out after cooling 30min.
6, drive single crystal growing furnace and take out silicon chip, silicon wafer thickness is at 30 microns.

Claims (1)

1. a vertical pulling preparation method for ultra thin single crystalline silicon chip, is characterized in that comprising the steps:
(1) raw material polysilicon block is put into the quartz crucible of single crystal growing furnace;
(2) single crystal growing furnace cuts out, and is evacuated down to 10 -2-10 -3torr, then pours high-purity argon, and in single crystal growing furnace, vacuum tightness remains on 10 ~ 20Torr;
(3) in single crystal growing furnace, the polycrystalline silicon raw material in heating and melting quartz crucible, in single crystal growing furnace, Heating temperature is 1412-1450 DEG C;
(4) after the temperature-stable of silicon melt, immerse in silicon melt by the wire seed crystal be fixed on stretching structure, lift after insulation 5-10min, stretching structure is the tungsten filament wire frame that 10-30 micron tungsten filament line forms by wire diameter, and pull rate is at 20-50mm/min;
(5), after stretching structure and liquid level separate, take out after rising to furnace chamber cooling 20-60min, ultra thin wafer covers on tungsten filament frame;
(6) drive single crystal growing furnace and take out silicon chip;
Described wire single crystal seed is fixed on tungsten filament by the method for laser zone remelting, specific as follows: be placed on by tungsten filament under wire single crystal seed, utilizes laser to move along tungsten filament direction, and seed crystal melts, and envelopes tungsten filament, reaches the effect of fixing seed crystal;
Described wire single crystal seed is fixed on the tungsten filament in tungsten filament wire frame horizontal direction.
CN201210577671.5A 2012-12-27 2012-12-27 A kind of vertical pulling preparation method of ultra thin single crystalline silicon chip Active CN103014838B (en)

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CN104726932B (en) * 2015-04-09 2017-06-06 江苏盎华光伏工程技术研究中心有限公司 The silicon wafer to manufacture equipment and its control method guided using seed crystal
CN104818529B (en) * 2015-04-09 2017-04-19 江苏盎华光伏工程技术研究中心有限公司 Negative pressure type silicon chip production equipment and control method thereof
CN104805500B (en) * 2015-04-09 2017-04-19 江苏盎华光伏工程技术研究中心有限公司 Oxide layer assisted silicon chip making equipment and control method thereof
CN115478322B (en) * 2022-09-26 2023-11-21 包头美科硅能源有限公司 Charging method for re-returning ultrathin silicon wafer to furnace

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4594229A (en) * 1981-02-25 1986-06-10 Emanuel M. Sachs Apparatus for melt growth of crystalline semiconductor sheets
CN101798704A (en) * 2009-12-31 2010-08-11 峨嵋半导体材料研究所 Process for growing phi 8'' solar-grade Czochralski silicon by using 18-inch thermal field

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US8304057B2 (en) * 2007-08-31 2012-11-06 Max Era, Inc. Ribbon crystal end string with multiple individual strings

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4594229A (en) * 1981-02-25 1986-06-10 Emanuel M. Sachs Apparatus for melt growth of crystalline semiconductor sheets
CN101798704A (en) * 2009-12-31 2010-08-11 峨嵋半导体材料研究所 Process for growing phi 8'' solar-grade Czochralski silicon by using 18-inch thermal field

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