CN103014838A - Czochralski preparation method of ultrathin monocrystalline silicon wafer - Google Patents
Czochralski preparation method of ultrathin monocrystalline silicon wafer Download PDFInfo
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- CN103014838A CN103014838A CN2012105776715A CN201210577671A CN103014838A CN 103014838 A CN103014838 A CN 103014838A CN 2012105776715 A CN2012105776715 A CN 2012105776715A CN 201210577671 A CN201210577671 A CN 201210577671A CN 103014838 A CN103014838 A CN 103014838A
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Abstract
The invention relates to the technical field of manufacturing of ultrathin monocrystalline silicon wafers, particularly a preparation method of a monocrystalline silicon wafer with the thickness of less than 40 um, which is applied to the fields of semiconductor devices and solar cells. The method is characterized by comprising the following steps: putting a raw material polycrystalline silicon block in a quartz crucible of a monocrystalline furnace; closing the monocrystalline furnace, vacuumizing to 10<-2>-10<3->Torr, charging high-purity argon, and keeping the vacuum degree in the monocrystalline furnace at 10-20Torr; heating to melt the polycrystalline silicon raw material in the quartz crucible in the monocrystalline furnace, wherein the heating temperature in the monocrystalline furnace is 1412-1450; after the temperature of the silicon melt becomes stable, immersing linear seed crystal fixed on the pulling structure into the silicon melt, and pulling after keeping the temperature for 5-10 minutes, wherein the pulling structure is a tungsten wire frame composed of a tungsten wire with the diameter of 10-30 micrometers, and the pulling rate is 20-50mm/minute; after the pulling structure is separated from the liquid level, raising the pulling structure to the upper furnace chamber, cooling for 20-60 minutes, and taking out, wherein the ultrathin wafer is covered on the tungsten wire frame; and opening the monocrystalline furnace to take out the silicon wafer.
Description
Technical field
The present invention relates to ultra thin single crystalline silicon chip manufacturing technology field, particularly a kind of thickness is applied to semiconducter device and solar cell field less than the preparation method of the monocrystalline silicon piece of 40um.
Background technology
Current energy dilemma and environmental problem are on the rise, and be further urgent to the demand that sun power utilizes, but generate electricity with respect to petrochemical industry, the coal of routine, and the solar energy power generating cost is still higher; Efficiently, low cost is the target of solar cell technology pursue, in numerous solar cells, crystal silicon solar energy battery occupies about 85% of whole photovoltaic market; At present, the silicon wafer thickness of the used single crystal silicon solar cell of industrial community is 180～200 μ m, and a big chunk derives from silicon sheet material in the cost for solar power generation, an important and direct approach that reduces cost is to reduce silicon wafer thickness, in the near future, the expection of silicon chip solar cell thickness can be down to below the 40 μ m, and this will bring a revolution to solar battery technology.
Semicon industry and the used monocrystalline silicon piece of photovoltaic industry all are to obtain by the cutting silicon single crystal ingot at present.And thickness is lower than 100 microns ultra thin silicon wafers, U.S. Silicon Genesis company has begun to research and develop the mode of utilizing hydrogen ion to inject-peel off and has produced [A. Brailove et al. in 2008, First Demonstration of High Volume Manufacturing of Kerf-Free PolyMax Wafers, Proc. of the 25th European Photovoltaic Solar Energy Conf., p. 1613,2010; A. Fujisaka, Keeping Pace with Cost Reduction as Module Prices Continue to Decline, Photovoltaics World, pp 38-41, July/August 2010.], European microelectronics research centre IMEC(Interuniversity Microelectronics Centre) the another kind of method for preparing ultra thin silicon wafers-stress induced stripping means proposed.
Summary of the invention
A kind of new thickness of content development of the present invention is lower than the manufacture method of 40 microns ultra thin silicon wafers, namely utilizes the method for vertical pulling, directly prepares ultra thin silicon wafers, and concrete steps comprise:
1, the raw material polysilicon block is put into the quartz crucible of single crystal growing furnace.
2, single crystal growing furnace cuts out, and is evacuated down to 10
-2-10
-3Then Torr pours high-purity argon, keeps the interior vacuum keep of single crystal growing furnace at 10 ~ 20 Torr.
3, in single crystal growing furnace, the polycrystalline silicon raw material in the heating and melting quartz crucible, Heating temperature is 1412-1450 ℃ in the single crystal growing furnace
4, after the temperature-stable of silicon melt, the wire seed crystal that is fixed on the stretching structure is immersed in the silicon melt, lift behind the insulation 5-10min, stretching structure is the tungsten filament wire frame that 10-30 micron tungsten filament line forms by wire diameter, pull rate is at 20-50 mm/min.
5, after stretching structure separates with liquid level, rise to and take out after furnace chamber cools off 20-60min, ultra thin wafer covers on the tungsten filament frame.
6, drive single crystal growing furnace and take out silicon chip.
Described wire single crystal seed is that the method by laser zone remelting is fixed on the tungsten filament, and is specific as follows: tungsten filament is placed under the wire single crystal seed, utilizes laser to move along the tungsten filament direction, the seed crystal fusing envelopes tungsten filament, has reached the fixedly effect of seed crystal.
Described wire single crystal seed is on the tungsten filament that is fixed on the tungsten filament wire frame horizontal direction.
Description of drawings
Fig. 1 is the schematic diagram of stretching structure of the present invention.
Embodiment
Embodiment 1
1, wide 180 mm, dark 180 mm, the square quartz crucible of long 200 mm is put in the single crystal growing furnace, and polycrystalline silicon raw material is placed in the quartz crucible.
2, monocrystaline silicon stove is vacuumized first, furnace pressure is evacuated to 10
-3Then Torr pours high-purity argon (99.999%), and vacuum keep is at 10 Torr in the single crystal growing furnace.
3, then open the graphite heater power supply, be heated to temperature of fusion 1420
oC makes the polycrystalline silicon raw material fusing.
4, after the temperature-stable of silicon melt, the tungsten filament frame (30 microns of tungsten filament wire diameters) that is fixed with seed crystal is slowly immersed in the silicon melt, shift mechanism upwards promotes with the speed of 30 mm/min.
5, after stretching structure separates with liquid level, take out after cooling off 50 min.
6, drive single crystal growing furnace and take out silicon chip, silicon wafer thickness is at 40 microns.
Embodiment 2
1, with example one.
2, with example one.
3, then open the graphite heater power supply, be heated to temperature of fusion 1450
oC makes the polycrystalline silicon raw material fusing.
4, after the temperature-stable of silicon melt, the tungsten filament frame (20 microns of tungsten filament wire diameters) that is fixed with seed crystal is slowly immersed in the silicon melt, shift mechanism upwards promotes with the speed of 50 mm/min.
5, after stretching structure separates with liquid level, take out after cooling off 30 min.
6, drive single crystal growing furnace and take out silicon chip, silicon wafer thickness is at 30 microns.
Claims (3)
1. the vertical pulling preparation method of a ultra thin single crystalline silicon chip is characterized in that comprising the steps:
(1) the raw material polysilicon block is put into the quartz crucible of single crystal growing furnace;
(2) single crystal growing furnace cuts out, and is evacuated down to 10
-2-10
-3Then Torr pours high-purity argon, keeps the interior vacuum keep of single crystal growing furnace at 10 ~ 20 Torr;
(3) in single crystal growing furnace, the polycrystalline silicon raw material in the heating and melting quartz crucible, Heating temperature is 1412-1450 ℃ in the single crystal growing furnace;
(4) after the temperature-stable of silicon melt, the wire seed crystal that is fixed on the stretching structure is immersed in the silicon melt, lift behind the insulation 5-10min, stretching structure is the tungsten filament wire frame that 10-30 micron tungsten filament line forms by wire diameter, and pull rate is at 20-50 mm/min;
(5) after stretching structure separates with liquid level, rise to and take out after furnace chamber cools off 20-60min, ultra thin wafer covers on the tungsten filament frame;
(6) drive single crystal growing furnace and take out silicon chip.
2. the vertical pulling preparation method of a kind of ultra thin single crystalline silicon chip as claimed in claim 1, it is characterized in that: described wire single crystal seed is that the method by laser zone remelting is fixed on the tungsten filament, specific as follows: that tungsten filament is placed under the wire single crystal seed, utilize laser to move along the tungsten filament direction, the seed crystal fusing, envelope tungsten filament, reached the fixedly effect of seed crystal.
3. the vertical pulling preparation method of a kind of ultra thin single crystalline silicon chip as claimed in claim 1, it is characterized in that: described wire single crystal seed is on the tungsten filament that is fixed on the tungsten filament wire frame horizontal direction.
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| CN201210577671.5A CN103014838B (en) | 2012-12-27 | 2012-12-27 | A kind of vertical pulling preparation method of ultra thin single crystalline silicon chip |
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| CN201210577671.5A CN103014838B (en) | 2012-12-27 | 2012-12-27 | A kind of vertical pulling preparation method of ultra thin single crystalline silicon chip |
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| CN103014838A true CN103014838A (en) | 2013-04-03 |
| CN103014838B CN103014838B (en) | 2016-01-27 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104726932A (en) * | 2015-04-09 | 2015-06-24 | 江苏盎华光伏工程技术研究中心有限公司 | Seed crystal guiding silicon wafer manufacture equipment and control method thereof |
| CN104805500A (en) * | 2015-04-09 | 2015-07-29 | 江苏盎华光伏工程技术研究中心有限公司 | Oxide layer assisted silicon chip making equipment and control method thereof |
| CN104818529A (en) * | 2015-04-09 | 2015-08-05 | 江苏盎华光伏工程技术研究中心有限公司 | Negative pressure type silicon chip production equipment and control method thereof |
| CN115478322A (en) * | 2022-09-26 | 2022-12-16 | 包头美科硅能源有限公司 | Charging method for remelting ultrathin silicon wafer |
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| US4594229A (en) * | 1981-02-25 | 1986-06-10 | Emanuel M. Sachs | Apparatus for melt growth of crystalline semiconductor sheets |
| CN101798704A (en) * | 2009-12-31 | 2010-08-11 | 峨嵋半导体材料研究所 | Process for growing phi 8'' solar-grade Czochralski silicon by using 18-inch thermal field |
| CN102203329A (en) * | 2008-10-16 | 2011-09-28 | 长青太阳能股份有限公司 | Ribbon crystal end string with multiple individual strings |
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2012
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| US4594229A (en) * | 1981-02-25 | 1986-06-10 | Emanuel M. Sachs | Apparatus for melt growth of crystalline semiconductor sheets |
| CN102203329A (en) * | 2008-10-16 | 2011-09-28 | 长青太阳能股份有限公司 | Ribbon crystal end string with multiple individual strings |
| CN101798704A (en) * | 2009-12-31 | 2010-08-11 | 峨嵋半导体材料研究所 | Process for growing phi 8'' solar-grade Czochralski silicon by using 18-inch thermal field |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104726932A (en) * | 2015-04-09 | 2015-06-24 | 江苏盎华光伏工程技术研究中心有限公司 | Seed crystal guiding silicon wafer manufacture equipment and control method thereof |
| CN104805500A (en) * | 2015-04-09 | 2015-07-29 | 江苏盎华光伏工程技术研究中心有限公司 | Oxide layer assisted silicon chip making equipment and control method thereof |
| CN104818529A (en) * | 2015-04-09 | 2015-08-05 | 江苏盎华光伏工程技术研究中心有限公司 | Negative pressure type silicon chip production equipment and control method thereof |
| CN104805500B (en) * | 2015-04-09 | 2017-04-19 | 江苏盎华光伏工程技术研究中心有限公司 | Oxide layer assisted silicon chip making equipment and control method thereof |
| CN104818529B (en) * | 2015-04-09 | 2017-04-19 | 江苏盎华光伏工程技术研究中心有限公司 | Negative pressure type silicon chip production equipment and control method thereof |
| CN104726932B (en) * | 2015-04-09 | 2017-06-06 | 江苏盎华光伏工程技术研究中心有限公司 | The silicon wafer to manufacture equipment and its control method guided using seed crystal |
| CN115478322A (en) * | 2022-09-26 | 2022-12-16 | 包头美科硅能源有限公司 | Charging method for remelting ultrathin silicon wafer |
| CN115478322B (en) * | 2022-09-26 | 2023-11-21 | 包头美科硅能源有限公司 | Charging method for re-returning ultrathin silicon wafer to furnace |
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| CN103014838B (en) | 2016-01-27 |
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