CN102970004B - Pulse signal transmission method - Google Patents
Pulse signal transmission method Download PDFInfo
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- CN102970004B CN102970004B CN201210443616.7A CN201210443616A CN102970004B CN 102970004 B CN102970004 B CN 102970004B CN 201210443616 A CN201210443616 A CN 201210443616A CN 102970004 B CN102970004 B CN 102970004B
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- monostable flipflop
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Abstract
The invention discloses a pulse signal transmission method, and belongs to the field of signal processing. A signal conditioning circuit based on a synchronous bi-stable multivibrator conditions input signals, and a receiving terminal converts the conditioned signals into original signals. The signal conditioning circuit comprises an isolation transformer, an integrated pulse drive circuit and two repeatable triggered mono-stable integrated circuits, wherein the two repeatable triggered mono-stable integrated circuits form the bi-stable multivibrator, the integrated pulse drive circuit is used for achieving two-channel signal drive, and the isolation transformer is used for converting unipolar-pulse or direct-current signals into bipolar-pulse modulating signals. The pulse signal transmission method can meet pulse signal modulation requirements under high-voltage isolated transmission occasions, and is simple to implement and low in implementation cost.
Description
Technical field
The present invention relates to a kind of pulse signal transmission method, belong to signal processing technology field.
Background technology
In the equipment of some pulses or DC operation, there will be the situation of pulse persistance wide variation, pulse duration from ns to several ms between change, now, the transformer being conventionally used to impulsive quarantine transmission is no longer applicable, and the solution usually adopted is the isolation transmission utilizing optical fiber to realize pulse signals after utilizing photoelectric conversion mode that pulse signal is converted to light signal.
But, in high-voltage isolating transmission occasion, utilize the volume ratio shared by photoelectricity transmission unit comparatively large, when photoelectricity sends and receiving system adopts embedding to apply in High-Voltage Insulation, need the sealing problem solving the optical fiber connector.
Summary of the invention
Given this, the invention provides a kind of pulse signal transmission method, in high-voltage isolating transmission occasion, after utilizing the present invention that wide pulse signal is modulated into narrow pulse signal, adopt isolating transformer to realize the transmission of signal again, do not adopt photoelectricity transmission unit by the present invention, the volume thus taken is little, and realizing simple, cost is low.
The specific implementation step of the inventive method is as follows:
First, by the signal conditioning circuit of pulse signal input based on synchronous bistable multivibrator;
Secondly, pulse signal is converted to narrow pulse signal by described signal conditioning circuit, and is exported by isolating transformer;
Finally, the narrow pulse signal received is converted to former pulse signal by receiving terminal.
The described signal conditioning circuit based on synchronous bistable multivibrator comprises four monostable flipflops A-1, A-2, B-1 and B-2, four and door Y1, Y2, Y3 and Y4, a NAND gate X1, a pulse driving circuit and an isolating transformer T;
Wherein, be connected after the external electric capacity C1 of capacitive node end C of monostable flipflop A-1 with resistance-capacitance network intermediate node end RC, RC is connected with power vd D after holding an external resistance R1;
Be connected with resistance-capacitance network intermediate node end RC after the external electric capacity C2 of capacitive node end C of monostable flipflop A-2, RC is connected with power vd D after holding an external resistance R2;
Be connected with resistance-capacitance network intermediate node end RC after the external electric capacity C3 of capacitive node end C of monostable flipflop B-1, RC is connected with the trailing edge trigger end B of monostable flipflop A-1 after holding an external resistance R3;
Be connected with resistance-capacitance network intermediate node end RC after the external electric capacity C4 of capacitive node end C of monostable flipflop B-2, RC is connected with the trailing edge trigger end B of monostable flipflop A-2 after holding an external resistance R4;
The trailing edge trigger end B of monostable flipflop A-1 is connected with the trailing edge trigger end B of monostable flipflop B-2 with the trailing edge trigger end B of monostable flipflop A-2, the trailing edge trigger end B of monostable flipflop B-1 respectively;
Input signal sends into the clear terminal CLR of monostable flipflop A-1 and monostable flipflop A-2 respectively, the reversed-phase output of monostable flipflop A-1
be connected with the rising edge trigger end A of monostable flipflop A-2, the reversed-phase output of monostable flipflop A-2
be connected with the 1st input of door Y1 with first, first is connected with the rising edge trigger end A of monostable flipflop A-1 with the output of door Y1; The output Q of monostable flipflop A-1 is connected with the 1st input of door Y2 with second, and second is connected with the first input end IN1 of Pulse-width modulation drive circuit with the output of door Y2;
Meanwhile, input signal also send into respectively second with door Y2 and first the 2nd input with door Y1;
Input signal also sends into two inputs of NAND gate X1 respectively, and the output of NAND gate X1 is connected with the clear terminal CLR of monostable flipflop B-2 with monostable flipflop B-1 respectively, the reversed-phase output of monostable flipflop B-1
be connected with the rising edge trigger end A of monostable flipflop B-2, the reversed-phase output of monostable flipflop B-2
be connected with the 1st input of door Y4 with the 4th, the 4th is connected with the rising edge trigger end A of monostable flipflop B-1 with the output of door Y4; The output Q of monostable flipflop B-1 is connected with the 1st input of door with the 3rd, and the 3rd is connected with the 2nd input IN2 of Pulse-width modulation drive circuit with the output of door Y3;
Meanwhile, the output of NAND gate X1 is connected with the 2nd input of door Y4 with the 4th with door Y3 with the 3rd respectively;
The in-phase output end of Pulse-width modulation drive circuit is connected with the input of isolating transformer, the pulse signal after isolating transformer output transform.
Beneficial effect
After utilizing the signal conditioning circuit based on synchronous bistable multivibrator that wide pulse signal is nursed one's health into narrow pulse signal, the isolating transformer of technology maturation can be utilized to carry out isolation transmission to signal, due in signals transmission, do not use photoelectricity transmission unit, the volume thus taken is little and realizing circuit is simple.
Based on pulse signal modulation thought, utilize and common can weigh monostable integrated circuit, Pulse-width modulation drive circuit, AND circuit, not circuit again, by the combination between circuit, utilize isolating transformer that unipolar pulse or direct current signal are transformed to synchronous bipolar pulse modulation signal, wherein, utilize two can weigh monostable integrated circuit again, form bistable multivibrator; Utilize AND circuit, realize the synchronous working of bistable multivibrator; Utilize Pulse-width modulation drive circuit to realize simple two-way signal to drive.
The present invention can meet the requirement of pulse signal conditioning under high-voltage isolating transmission occasion, and realizes simple, and cost is low;
Accompanying drawing explanation
Fig. 1 is circuit theory diagrams of the present invention;
Fig. 2 is the corresponding signal waveforms pointed out in circuit of the present invention.
Embodiment
The invention provides a kind of pulse signal transmission method, the method can meet the requirement of pulse signal conditioning under high-voltage isolating transmission occasion, and realizes simple, and cost is low.
Below in conjunction with Figure of description and specific embodiment, the present invention is described in further detail.
A kind of pulse signal transmission method specific implementation step is as follows:
First, by the signal conditioning circuit of pulse signal input based on synchronous bistable multivibrator;
Secondly, pulse signal is converted to narrow pulse signal by described signal conditioning circuit, and is exported by isolating transformer;
Finally, the narrow pulse signal received is converted to former pulse signal by receiving terminal.
As shown in Figure 1, the described signal conditioning circuit based on synchronous bistable multivibrator comprises four monostable flipflops A-1, A-2, B-1 and B-2, four and door Y1, Y2, Y3 and Y4, a NAND gate X1, a pulse driving circuit and an isolating transformer T;
In the present embodiment, four monostable flipflops A-1, A-2, B-1 and B-2 can weigh monostable integrated circuit CD4098 again by two and realize, four are realized by a CD4081 with door Y1, Y2, Y3 and Y4, a NAND gate X1 is realized by a CD4011, and a pulse driving circuit is realized by TPS2812;
Wherein, be connected after the external electric capacity C 1 of capacitive node end C of monostable flipflop A-1 with resistance-capacitance network intermediate node end RC, RC is connected with power vd D after holding an external resistance R1;
Be connected with resistance-capacitance network intermediate node end RC after the external electric capacity C2 of capacitive node end C of monostable flipflop A-2, RC is connected with power vd D after holding an external resistance R2;
Be connected with resistance-capacitance network intermediate node end RC after the external electric capacity C3 of capacitive node end C of monostable flipflop B-1, RC is connected with the trailing edge trigger end B of monostable flipflop A-1 after holding an external resistance R3;
Be connected with resistance-capacitance network intermediate node end RC after the external electric capacity C4 of capacitive node end C of monostable flipflop B-2, RC is connected with the trailing edge trigger end B of monostable flipflop A-2 after holding an external resistance R4;
The trailing edge trigger end B of monostable flipflop A-1 is connected with the trailing edge trigger end B of monostable flipflop B-2 with the trailing edge trigger end B of monostable flipflop A-2, the trailing edge trigger end B of monostable flipflop B-1 respectively;
Input signal sends into the clear terminal CLR of monostable flipflop A-1 and monostable flipflop A-2 respectively, the reversed-phase output of monostable flipflop A-1
be connected with the rising edge trigger end A of monostable flipflop A-2, the reversed-phase output of monostable flipflop A-2
be connected with the 1st input of door Y1 with first, first is connected with the rising edge trigger end A of monostable flipflop A-1 with the output of door Y1; The output Q of monostable flipflop A-1 is connected with the 1st input of door Y2 with second, and second is connected with the first input end IN1 of Pulse-width modulation drive circuit TPS2812 with the output of door Y2;
Meanwhile, input signal also send into respectively second with door Y2 and first the 2nd input with door Y1;
Input signal also sends into two inputs of NAND gate X1 respectively, and the output of NAND gate X1 is connected with the clear terminal CLR of monostable flipflop B-2 with monostable flipflop B-1 respectively, the reversed-phase output of monostable flipflop B-1
be connected with the rising edge trigger end A of monostable flipflop B-2, the reversed-phase output of monostable flipflop B-2
be connected with the 1st input of door Y4 with the 4th, the 4th is connected with the rising edge trigger end A of monostable flipflop B-1 with the output of door Y4; The output Q of monostable flipflop B-1 is connected with the 1st input of door with the 3rd, and the 3rd is connected with the 2nd the input IN2 of Pulse-width modulation drive circuit TPS2812 with the output of door Y3;
Meanwhile, the output of NAND gate X1 is connected with the 2nd input of door Y4 with the 4th with door Y3 with the 3rd respectively;
Two in-phase output ends of Pulse-width modulation drive circuit TPS2812 are connected with two inputs of isolating transformer respectively, the pulse signal after isolating transformer output transform.
Workflow of the present invention is as follows:
(1) when input signal transfers high level to by low level
The signal being added in the clear terminal of monostable flipflop A-1 and monostable flipflop A-2 becomes high level, and monostable flipflop A-1 and monostable flipflop A-2 is in normal operating conditions; The anti-phase output of input signal and monostable flipflop A-2 get with after become high level from low level, the rising edge trigger end A of input monostable flipflop A-1, makes its output Q export high level, the reversed-phase output of monostable flipflop A-1
output low level, the low level exported sends into the rising edge trigger end B of monostable flipflop A-2, the high level signal that monostable flipflop A-1 exports and input signal are got with rear, send into the first input end IN1 of Pulse-width modulation drive circuit TPS2812, high level signal, after isolating transformer, exports by the signal of the in-phase output end OUT1 output of Pulse-width modulation drive circuit TPS2812;
After a period of time t1, the signal that the output Q of monostable flipflop A-1 exports becomes low level, reversed-phase output
the signal exported becomes high level, high level sends into the rising edge trigger end B of monostable flipflop A-2, low level and input signal are got with rear, the signal of the first input end IN1 sending into Pulse-width modulation drive circuit TPS2812 is made to become low level, the output signal of isolating transformer is finally made to become low level, meanwhile, because the input signal of the rising edge trigger end B of monostable flipflop A-2 becomes high level from low level, the reversed-phase output of monostable flipflop A-2 is made
output low level, with input signal get with after low level deliver to the rising edge trigger end A of monostable flipflop A-1, output Q and the reversed-phase output of monostable flipflop A-1 can not be changed
the level of output signal, after a period of time t2, the reversed-phase output of A-2
export high level, with input signal get with after high level deliver to the rising edge trigger end A of monostable flipflop A-1, make the output signal of the output Q of monostable flipflop A-1 become high level;
Input signal is after NAND gate negate, the signal being added in the clear terminal of monostable flipflop B-1 and monostable flipflop B-2 all becomes low level, the output of monostable flipflop B-1 and monostable flipflop B-2 is all forced to reset, output output low level, reversed-phase output exports high level;
(2) when input signal transfers low level to by high level
The signal being added in the clear terminal of monostable flipflop A-1 and monostable flipflop A-2 all becomes low level, and the output of monostable flipflop A-1 and monostable flipflop A-2 is all forced to reset, output output low level, and reversed-phase output exports high level;
Input signal is after not gate negate, and the signal being added in the clear terminal of monostable flipflop B-1 and monostable flipflop B-2 all becomes high level, and monostable flipflop B-1 and monostable flipflop B-2 is all in normal operating conditions; The anti-phase output of input signal and monostable flipflop B-2 get with after become high level from low level, the rising edge trigger end A of input monostable flipflop B-1, make the output Q of monostable flipflop B-1 export high level, reversed-phase output
output low level, the low level exported sends into the rising edge trigger end A of monostable flipflop B-2, the high level signal exported and input signal are got with rear, send into the second input IN2 of Pulse-width modulation drive circuit TPS2812, the signal that the in-phase output end OUT1 of Pulse-width modulation drive circuit TPS2812 exports after isolating transformer, by anti-phase for high level signal output;
After a period of time t3, the signal that the output Q of monostable flipflop B-1 exports becomes low level, and reversed-phase output
the signal exported becomes high level, high level sends into the rising edge trigger end A of monostable flipflop B-2, low level and input signal are got with rear, the signal of the second input IN2 sending into Pulse-width modulation drive circuit TPS2812 is made to become low level, the output signal of isolating transformer is finally made to become low level, meanwhile, because the input signal of the rising edge trigger end A of monostable flipflop B-2 becomes high level from low level, the reversed-phase output of monostable flipflop B-2 is made
output low level, with input signal get with after low level deliver to the rising edge trigger end A of monostable flipflop B-1, the output of monostable flipflop B-1 and the level of reversed-phase output output signal can not be changed, after a period of time t4, the reversed-phase output of monostable flipflop B-2
export high level, with input signal get with after high level deliver to the rising edge trigger end A of monostable flipflop B-1, make the output signal of the output Q of monostable flipflop B-1 become high level;
The described time is determined by each resistance value and corresponding capacitance forming timing resistance-capacitance network.
In sum, these are only a kind of preferred embodiments of the present invention, be not intended to limit protection scope of the present invention.Within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (2)
1., based on the signal conditioning circuit of synchronous bistable multivibrator, it is characterized in that:
Comprise four monostable flipflops A-1, A-2, B-1 and B-2, four and door Y1, Y2, Y3 and Y4, a NAND gate X1, a pulse driving circuit and an isolating transformer T;
Wherein, be connected after the external electric capacity C1 of capacitive node end C of monostable flipflop A-1 with resistance-capacitance network intermediate node end RC, RC is connected with power vd D after holding an external resistance R1;
Be connected with resistance-capacitance network intermediate node end RC after the external electric capacity C2 of capacitive node end C of monostable flipflop A-2, RC is connected with power vd D after holding an external resistance R2;
Be connected with resistance-capacitance network intermediate node end RC after the external electric capacity C3 of capacitive node end C of monostable flipflop B-1, RC is connected with the trailing edge trigger end B of monostable flipflop A-1 after holding an external resistance R3;
Be connected with resistance-capacitance network intermediate node end RC after the external electric capacity C4 of capacitive node end C of monostable flipflop B-2, RC is connected with the trailing edge trigger end B of monostable flipflop A-2 after holding an external resistance R4;
The trailing edge trigger end B of monostable flipflop A-1 is connected with the trailing edge trigger end B of monostable flipflop B-2 with the trailing edge trigger end B of monostable flipflop A-2, the trailing edge trigger end B of monostable flipflop B-1 respectively;
Input signal sends into the clear terminal CLR of monostable flipflop A-1 clear terminal CLR and monostable flipflop A-2 respectively, the reversed-phase output of monostable flipflop A-1
be connected with the rising edge trigger end A of monostable flipflop A-2, the reversed-phase output of monostable flipflop A-2
be connected with the 1st input of door Y1 with first, first is connected with the rising edge trigger end A of monostable flipflop A-1 with the output of door Y1; The output Q of monostable flipflop A-1 is connected with the 1st input of door Y2 with second, and second is connected with the first input end IN1 of Pulse-width modulation drive circuit with the output of door Y2;
Meanwhile, input signal also send into respectively second with door Y2 and first the 2nd input with door Y1;
Input signal also sends into two inputs of NAND gate X1 respectively, and the output of NAND gate X1 is connected with the clear terminal CLR of monostable flipflop B-2 with monostable flipflop B-1 clear terminal CLR respectively, the reversed-phase output of monostable flipflop B-1
be connected with the rising edge trigger end A of monostable flipflop B-2, the reversed-phase output of monostable flipflop B-2
be connected with the 1st input of door Y4 with the 4th, the 4th is connected with the rising edge trigger end A of monostable flipflop B-1 with the output of door Y4; The output Q of monostable flipflop B-1 is connected with the 1st input of door Y3 with the 3rd, and the 3rd is connected with the 2nd input IN2 of Pulse-width modulation drive circuit with the output of door Y3;
Meanwhile, the output of NAND gate X1 is connected with the 2nd input of door Y4 with the 4th with door Y3 with the 3rd respectively;
The in-phase output end of Pulse-width modulation drive circuit is connected with the input of isolating transformer, the pulse signal after isolating transformer output transform.
2. a pulse signal transmission method, is characterized in that: the method adopts the signal conditioning circuit based on synchronous bistable multivibrator according to claim 1;
First, pulse signal is inputted described signal conditioning circuit;
Secondly, pulse signal is converted to narrow pulse signal by described signal conditioning circuit, and is exported by isolating transformer;
Finally, the narrow pulse signal received is converted to former pulse signal by receiving terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210443616.7A CN102970004B (en) | 2012-11-07 | 2012-11-07 | Pulse signal transmission method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210443616.7A CN102970004B (en) | 2012-11-07 | 2012-11-07 | Pulse signal transmission method |
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| Publication Number | Publication Date |
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| CN102970004A CN102970004A (en) | 2013-03-13 |
| CN102970004B true CN102970004B (en) | 2015-01-07 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201210443616.7A Expired - Fee Related CN102970004B (en) | 2012-11-07 | 2012-11-07 | Pulse signal transmission method |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6456496B2 (en) * | 2015-06-08 | 2019-01-23 | 三菱電機株式会社 | Signal transmission circuit and power conversion device |
| CN112147481B (en) * | 2020-11-27 | 2021-02-05 | 杭州飞仕得科技有限公司 | IGBT fault return circuit and electronic equipment |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3714540A (en) * | 1970-11-10 | 1973-01-30 | Oxy Metal Finishing Corp | Isolation and transforming circuit |
| CN1050476A (en) * | 1989-09-21 | 1991-04-03 | 陈坚胜 | Broad-band electronic pulse transformer |
| RU2208864C1 (en) * | 2002-02-21 | 2003-07-20 | ОАО "Чебоксарский электроаппаратный завод" | Frequency relay |
| CN101640527A (en) * | 2009-08-19 | 2010-02-03 | 广州金升阳科技有限公司 | IGBT driving circuit capable of realizing signal transmission by pulse modulation demodulation system |
-
2012
- 2012-11-07 CN CN201210443616.7A patent/CN102970004B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3714540A (en) * | 1970-11-10 | 1973-01-30 | Oxy Metal Finishing Corp | Isolation and transforming circuit |
| CN1050476A (en) * | 1989-09-21 | 1991-04-03 | 陈坚胜 | Broad-band electronic pulse transformer |
| RU2208864C1 (en) * | 2002-02-21 | 2003-07-20 | ОАО "Чебоксарский электроаппаратный завод" | Frequency relay |
| CN101640527A (en) * | 2009-08-19 | 2010-02-03 | 广州金升阳科技有限公司 | IGBT driving circuit capable of realizing signal transmission by pulse modulation demodulation system |
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Owner name: CHINA SHIPBUILDING INDUSTRY HAIBOWEI (JIANGSU) TEC Free format text: FORMER OWNER: NO. 723 RESEARCH INSTITUTE OF CHINA SHIPBUILDING INDUSTRY CORPORATION Effective date: 20150729 |
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