CN102931070B - Silicon substrate isotropic wet etching process - Google Patents

Silicon substrate isotropic wet etching process Download PDF

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Publication number
CN102931070B
CN102931070B CN201210446145.5A CN201210446145A CN102931070B CN 102931070 B CN102931070 B CN 102931070B CN 201210446145 A CN201210446145 A CN 201210446145A CN 102931070 B CN102931070 B CN 102931070B
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corrosion
photoresist
layer
sacrifice layer
silicon chip
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CN102931070A (en
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徐谦刚
杜林德
王永功
刘惠林
谢文元
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TIANSHUI TIANGUANG SEMICONDUCTOR CO Ltd
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TIANSHUI TIANGUANG SEMICONDUCTOR CO Ltd
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Abstract

The invention provides a novel silicon substrate isotropic wet etching process. The process includes forming two sacrificial layers on the surfaces of silicon substrates by adding SiO2 and negative 450CP photo-resists, forming graphs needed to be machined through a surface micromachining photolithography technique, and using isotropic etching to obtain two-dimensional machined graphs with small depth-to-width ratios. According to the silicon substrate isotropic wet etching process, a certain quantity of acetic acids and water are added in a HF+HNO3 corrosion system selecting reasonable proportioning to serve as buffer agents to stabilize corrosion rates, and a corrosion solution is placed in an ice water mixture to control the reaction temperature to obtain a silicon corrosion system with an optimum corrosion rate, depth-to-width ratio and surface quality.

Description

A kind of silica-based isotropism wet-etching technology
Technical field
The present invention relates to semiconductor silicon material surface micro-fabrication and manufacturing technology field, particularly a kind of silica-based isotropism wet-etching technology.
Background technology
Current Micro-machining based on silicon can be divided into surperficial silica-based micro-processing technology (Surface Micromachining) and the silica-based micro-processing technology of body (Bulk Micromachining) two main flows.The Micro-machining based on silicon feature different from traditional machining always first arranges from whole system the design of operation, adopts top-down method for designing.Dark (thickness) that can accomplish due to the micro-machined motion of silicon face is very little with the ratio of width (lateral dimension), therefore is called as two dimension processing.
The wet etching course of general silicon is in corrosive liquid, first make material surface be oxidized, and then make one or more oxide dissolution by chemical reaction, this is actually electrochemical corrosion course.Electrochemical corrosion refers to the corrosion process that metal or semi-conducting material are suffered in electrolyte aqueous solution.Owing to being mixed with various reagent in same corrosive liquid, so above-mentioned two processes are carried out simultaneously.For isotropism chemistry corrosion influencing factor mainly contain some:
1) reagent is selected
The wet etching course of silicon is generally in corrosive liquid, first make material surface be oxidized, and then make one or more oxide dissolution by chemical reaction, this is actually electrochemical corrosion course.Owing to being mixed with various reagent in same corrosive liquid, so above-mentioned two processes are carried out simultaneously.Reagent for the corrosion of isotropism chemistry is a lot, comprises various salt (as CN base, NH 4base etc.) and acid, HF+HNO 3etching system can obtain high purity reagent, but needs in corrosion process to add buffer.CrO 3there is metal ion to stain, limit its electronic device preparation in use.
2) impact of buffer
Buffer is generally weak acid or weak base, as NH 4oH etc.In strong acid or strong base solution, add certain buffer just can play adjustment acidity (H +concentration) and basicity (OH -) effect.At HNO 3h in solution +concentration is higher, because HNO 3almost all ionize, but glacial acetic acid is that weak acid degree of ionization is less.Its ionization reaction formula is as follows:
At HNO 3+ CH 3in COOH solution, though should HNO be had 3make H +concentration is higher, but adds CH 3after COOH, H +with CHCOO -ionization generates CH 3cOOH molecule.Because CH 3the degree of ionization of COOH is little, so at HNO 3+ CH 3h in COOH solution +concentration is lower, and this is the result being subject to buffer adjustment.
3) corrosion treatment temperature and impact that is ultrasonic or that stir
Corrosion treatment temperature is higher, and corrosion rate is faster.But wish that corrosion treatment temperature is lower to improve corrosion surface quality.The ultrasonic transmission speed can accelerating material, makes reactant be transported to the surface of solids in time and leave in time, is conducive to the carrying out reacted.When not stirring, material relies on diffusion to transmit, slowly, more unfavorable to reaction.Often at erosional surface bubbing in corrosion process, and hinder reaction to carry out, and make local overheating.Ultrasonic process can be adopted for this reason, accelerate gas evolution, to improve corrosion surface quality.
Summary of the invention
Technical problem to be solved by this invention is: selecting the HF+HNO of rational proportion 3a certain amount of acetic acid is added and water stablizes corrosion rate as buffer in etching system, corrosive liquid is placed in mixture of ice and water and controls reaction temperature, thus the corrosion realized silicon, thus provide a kind of silica-based isotropism wet-etching technology of one with best corrosion rate, depth-to-width ratio and surface quality.
The technical scheme that technical solution problem of the present invention is taked is:
A kind of silica-based isotropism wet-etching technology, processing step is as follows:
The formation of a, sacrifice layer:
A.1, oxidation furnace is adopted to grow one deck SiO at silicon chip surface 2, form ground floor sacrifice layer,
Process conditions:
Temperature: 1120 DEG C; Time: 10 '+85 '+10 '
SiO 2thickness: 800 ± 50nm;
a.2, SiO is had in growth 2the silicon chip of layer is coated with one deck negative photoresist, thus forms second layer sacrifice layer, process conditions:
Photoresist spinner rotating speed: 2000 turns/min,
Photoresist colloidality: negativity;
Photoresist thickness: 20000 ± 1000nm;
Photoresist viscosity: 450CP
The formation of b, figure:
Adopt photoetching process on second layer sacrifice layer, form required figure,
Etching condition: light intensity=1.4 ± 0.2mW/cm 2; Time for exposure=10 ± 2sec;
C, isotropic etch:
Under temperature 18 DEG C of conditions, the silicon chip forming required figure is immersed in corrosive liquid, etching time: 20min; Corrosion thickness: 2um;
Corrosive liquid composition described in step c and proportioning volume ratio are:
HNO 3+HF+CH 3COOH+ H 2O 2=16:10:4:1 (V/V)
Concentration is: HNO 368%(V/V), HF 48%(V/V), CH 3cOOH 99.8%(V/V).
The mechanical performance that the present invention utilizes silicon fabulous, comprises intensity, hardness, thermal conductance and thermal expansion etc., obtains required two-dimentional graphics processing at its surface micro-fabrication.The present invention is selecting the HF+HNO of rational proportion 3add a certain amount of acetic acid in etching system and water stablizes corrosion rate as buffer, corrosive liquid is placed in mixture of ice and water and controls reaction temperature, obtained the silicon etching system of best corrosion rate, depth-to-width ratio and surface quality by test.
Embodiment
Embodiment 1
1, the formation of sacrifice layer:
(1), silicon chip is put in oxidation furnace generate one deck 800SiO by high-temperature oxydation 2, form ground floor sacrifice layer, oxidation furnace temperature: 1120 DEG C; Time: 10 '+85 '+10 ', SiO 2thickness: 800nm;
(2), automatic glue application platform is adopted to have SiO in growth 2the silicon chip of layer is coated with the negative photoresist that one deck viscosity is 450CP, forms second layer sacrifice layer, photoresist thickness: 20000nm;
2, the formation of figure:
Adopt negative-working photoresist technique, second layer sacrifice layer is formed required figure; Photoetching process condition: light intensity=1.6mW/cm 2; Time for exposure=10sec; Negative adhesiveness: 450CP.
3, isotropic etch
Preparation corrosive liquid: first measure 160mL HNO respectively with graduated cylinder 3with 100mL HF, two kinds of solvents are fully mixed, then add 40mL glacial acetic acid (CH wherein respectively 3and 10mL deionized water (H COOH) 2o), abundant mixing is made it with plastic products stirring.Finally the corrosive liquid configured is placed in mixture of ice and water, makes it cooling at least 30 minutes.Use in order to corrosion.
Wherein: HNO 3concentration is 68%(V/V); HF concentration is 48%(V/V); CH 3cOOH concentration is 99.8%(V/V);
Under temperature 18 DEG C of conditions, the silicon chip forming required figure is immersed in corrosive liquid, etching time: 20min; Corrosion thickness: 2um.
Embodiment 2
1, the formation of sacrifice layer:
(1), silicon chip is put in oxidation furnace generate one deck 800SiO by high-temperature oxydation 2, form ground floor sacrifice layer, oxidation furnace temperature: 1120 DEG C; Time: 10 '+85 '+10 ', SiO 2thickness: 850nm;
(2), automatic glue application platform is adopted to have SiO in growth 2the silicon chip of layer is coated with the negative photoresist that one deck viscosity is 450CP, forms second layer sacrifice layer, photoresist thickness: 21000nm;
2, the formation of figure:
Adopt negative-working photoresist technique, second layer sacrifice layer is formed required figure; Photoetching process condition: light intensity=1.4mW/cm 2; Time for exposure=10sec; Negative adhesiveness: 450CP.
3, isotropic etch
Preparation corrosive liquid: first measure 160mL HNO respectively with graduated cylinder 3with 100mL HF, two kinds of solvents are fully mixed, then add 40mL glacial acetic acid (CH wherein respectively 3and 10mL deionized water (H COOH) 2o), abundant mixing is made it with plastic products stirring.Finally the corrosive liquid configured is placed in mixture of ice and water, makes it cooling at least 30 minutes.Use in order to corrosion.
Wherein: HNO 3concentration is 68%(V/V); HF concentration is 48%(V/V); CH 3cOOH concentration is 99.8%(V/V);
Under temperature 18 DEG C of conditions, the silicon chip forming required figure is immersed in corrosive liquid, etching time: 20min; Corrosion thickness: 2um.
Embodiment 3
1, the formation of sacrifice layer:
(1), silicon chip is put in oxidation furnace generate one deck 800SiO by high-temperature oxydation 2, form ground floor sacrifice layer, oxidation furnace temperature: 1120 DEG C; Time: 10 '+85 '+10 ', SiO 2thickness: 750nm;
(2), automatic glue application platform is adopted to have SiO in growth 2the silicon chip of layer is coated with the negative photoresist that one deck viscosity is 450CP, forms second layer sacrifice layer, photoresist thickness: 19000nm;
2, the formation of figure:
Adopt negative-working photoresist technique, second layer sacrifice layer is formed required figure; Etching condition: light intensity=1. 2mW/cm 2; Time for exposure=8sec; Negative adhesiveness: 450CP.
3, isotropic etch
Preparation corrosive liquid: first measure 160mL HNO respectively with graduated cylinder 3with 100mL HF, two kinds of solvents are fully mixed, then add 40mL glacial acetic acid (CH wherein respectively 3and 10mL deionized water (H COOH) 2o), abundant mixing is made it with plastic products stirring.Finally the corrosive liquid configured is placed in mixture of ice and water, makes it cooling at least 30 minutes.Use in order to corrosion.
Wherein: HNO 3concentration is 68%(V/V); HF concentration is 48%(V/V); CH 3cOOH concentration is 99.8%(V/V);
Under temperature 18 DEG C of conditions, the silicon chip forming required figure is immersed in corrosive liquid, etching time: 20min; Corrosion thickness: 2um; .

Claims (1)

1. a silica-based isotropism wet-etching technology, processing step is as follows:
The formation of a, sacrifice layer:
A.1, oxidation furnace is adopted to grow one deck SiO at silicon chip surface 2, form ground floor sacrifice layer,
Process conditions:
Temperature: 1120 DEG C; Time: 10 '+85 '+10 '
SiO 2thickness: 800 ± 50nm;
a.2, SiO is had in growth 2the silicon chip of layer is coated with one deck negative photoresist, thus forms second layer sacrifice layer, process conditions:
Photoresist spinner rotating speed: 2000 turns/min,
Photoresist colloidality: negativity;
Photoresist thickness: 20000 ± 1000nm;
Photoresist viscosity: 450CP
The formation of b, figure:
Adopt photoetching process on second layer sacrifice layer, form required figure,
Etching condition: light intensity=1.4 ± 0.2mW/cm 2; Time for exposure=10 ± 2sec;
C, isotropic etch:
Under temperature 18 DEG C of conditions, the silicon chip forming required figure is immersed in corrosive liquid, etching time: 20min; Corrosion thickness: 2um;
Corrosive liquid composition described in above-mentioned steps c and proportioning volume ratio are:
HNO 3:HF:CH 3COOH:H 2O 2=16:10:4:1 (V/V)
Concentration is: HNO 368%(V/V), HF 48%(V/V), CH 3cOOH 99.8%(V/V).
CN201210446145.5A 2012-11-09 2012-11-09 Silicon substrate isotropic wet etching process Active CN102931070B (en)

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CN111244224A (en) * 2018-11-29 2020-06-05 东泰高科装备科技有限公司 Epitaxial layer structure, preparation method, stripping method and solar cell preparation method
CN113066719B (en) * 2021-03-18 2023-03-24 吉林华微电子股份有限公司 Silicon wafer manufacturing method and silicon wafer

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1547242A (en) * 2003-12-11 2004-11-17 西安交通大学 Two-stage step structured wet chemical corrosion method for silicon semiconductor device
CN1569271A (en) * 2003-12-26 2005-01-26 中国科学院理化技术研究所 Minisize solid silicon needle array chip and its preparation method and use
CN1623515A (en) * 2004-11-30 2005-06-08 纳生微电子(苏州)有限公司 Cosmetic skin needle, its manufacturing method and use
CN1678145A (en) * 2004-03-31 2005-10-05 精工爱普生株式会社 Mask, method for manufacturing a mask, method for manufacturing an electro-optical device, and electronic equipment
CN102323314A (en) * 2011-05-27 2012-01-18 中国科学院上海微系统与信息技术研究所 Production and detection method of plated bismuth gold micro-array electrode for detecting heavy metals

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020127760A1 (en) * 2000-08-02 2002-09-12 Jer-Liang Yeh Method and apparatus for micro electro-mechanical systems and their manufacture
US20060030062A1 (en) * 2004-08-05 2006-02-09 Jun He Micromachined wafer strain gauge

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1547242A (en) * 2003-12-11 2004-11-17 西安交通大学 Two-stage step structured wet chemical corrosion method for silicon semiconductor device
CN1569271A (en) * 2003-12-26 2005-01-26 中国科学院理化技术研究所 Minisize solid silicon needle array chip and its preparation method and use
CN1678145A (en) * 2004-03-31 2005-10-05 精工爱普生株式会社 Mask, method for manufacturing a mask, method for manufacturing an electro-optical device, and electronic equipment
CN1623515A (en) * 2004-11-30 2005-06-08 纳生微电子(苏州)有限公司 Cosmetic skin needle, its manufacturing method and use
CN102323314A (en) * 2011-05-27 2012-01-18 中国科学院上海微系统与信息技术研究所 Production and detection method of plated bismuth gold micro-array electrode for detecting heavy metals

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