CN102929818A - Message data transmission method, bridging module, read module and message data transmission system for peripheral component interconnect express (PCIe) interfaces - Google Patents
Message data transmission method, bridging module, read module and message data transmission system for peripheral component interconnect express (PCIe) interfaces Download PDFInfo
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Abstract
The application discloses a message data transmission method, a bridging module, a read module and a message data transmission system for peripheral component interconnect express (PCIe) interfaces, wherein the method comprises the following steps of: setting corresponding pointer spaces in a central processing unit (CPU) memory in a bridging module terminal for every PCIe interface; and writing write pointers into the pointer spaces corresponding to every PCIe interface through every PCIe interface. According to the application, because the pointers in every pointer space are the same until the message data are written into a cache block of the CPU memory through the PCIe interfaces and a descriptor package is written into a receive queue of the CPU through the PCIe interfaces, the mode of reading the pointers to acquire the message data only when the pointers in every pointer space are the same can be used to effectively avoid message data read errors caused by the fact that the writing of the pointers is earlier than the two steps because of different time delays of different PCIe interfaces when the bridging module supports multi-path PCIe interface data transmission.
Description
Technical field
The present invention relates to computer realm, more particularly, relate to transmitting message data method, bridge module, read module and the system of PCIe interface.
Background technology
The PCIe interface is that X86CPU and other devices carry out interconnected important interface, can finish conversion such as the high speed interface such as XAUI interface and PCIe interface by bridge module.
As shown in Figure 1, undertaken by bridge module in the transfer process of XAUI interface and PCIe interface, after bridge module receives the message data of XAUI interface, needing to carry out following 3 operations:
S11, distribute to a CPU memory cache of this message data piece, by the PCIe interface this message data is write this CPU memory cache piece;
S12, structure comprise the bag descriptor of first address of this CPU memory cache piece, and will wrap descriptor by the PCIe interface and write in the receiving queue among the CPU;
S13, the write pointer of described receiving queue write the pointer space of appointment in the CPU internal memory by the PCIe interface.
In addition, when CPU obtains message data, obtain write pointer at described assigned address, the bag descriptor that then reads in the CPU receiving queue according to write pointer can obtain the first address of message data in CPU memory cache piece, thereby can read required message data.
PCIe interface bridge connection module generally can adopt the FPGA device to realize, suppose that the maximum effective bandwidth that the PCIe interface of used FPGA device can provide is the Gen1*4 pattern, namely, 2.5G*4*0.8=8Gbps, when needing bridge module to provide larger bandwidth when connecting high bandwidth device, such as, when being connected with the XAUI interface, because the effective bandwidth that can provide is less than a needed bandwidth, in order to improve the bandwidth of PCIe interface, prior art generally is by selecting high-end FPGA device to realize, as selecting to support the FPGA device of PCIe Gen1*8 or PCIe Gen2*4, but the mode shortcoming of selecting high-end FPGA device to realize improving the bandwidth of PCIe interface is that cost is higher.
Summary of the invention
In view of this, the application provides transmitting message data method, bridge module, read module and the system of PCIe interface.
The application is achieved in that
In the application's one side, a kind of multichannel PCIe interface transmitting message data method is provided, it is characterized in that, comprising:
For each PCIe interface arranges corresponding pointer space in the CPU internal memory;
The write pointer of receiving queue is write pointer space by the PCIe interface, is specially:
By each PCIe interface, described write pointer is write the pointer space corresponding with each PCIe interface respectively.
In the application on the other hand, also provide a kind of multichannel PCIe interface transmitting message data method, it is characterized in that, having comprised: judged whether each PCIe interface write pointer in the corresponding pointer space in the CPU internal memory is identical;
If identical:
Then read described write pointer, read bag descriptor in the corresponding receiving queue according to described write pointer, obtain the first address of message data in CPU memory cache piece according to described bag descriptor, and obtain required message data according to described first address;
Otherwise:
Suspend and read described write pointer.
In the application on the other hand, also provide a kind of PCIe interface bridge connection module, it is characterized in that, having comprised: multichannel PCIe interface;
The pointer space setting unit is used to each PCIe interface that corresponding pointer space is set in the CPU internal memory;
The pointer space writing unit is used for the write pointer of receiving queue is write pointer space by the PCIe interface, comprising:
By each PCIe interface, described write pointer is write the pointer space corresponding with each PCIe interface respectively.
Preferably, in this application, described multichannel comprises two-way PCIe interface.
In the application on the other hand, also provide a kind of multichannel PCIe interface transmitting message data read module, it is characterized in that, having comprised:
The pointer judging unit is used for judging whether the write pointer of each PCIe interface in pointer space corresponding to CPU internal memory be identical;
Pointer reads control module, is used for
When the write pointer in each pointer space is identical, read described write pointer, obtain the first address of message data in CPU memory cache piece according to described write pointer bag descriptor, and obtain required message data according to described first address;
When the write pointer in each pointer space is not identical, suspends and read described write pointer.
Preferably, in this application, described a plurality of pointer space comprise two pointer space.
Preferably, in this application, described transmitting message data read module is located among the CPU.
In the application on the other hand, also provide a kind of PCIe interface transmitting message data transmission system, it is characterized in that, having comprised: bridge module and transmitting message data read module;
Described bridge module comprises:
Multichannel PCIe interface;
The pointer space setting unit is used to each PCIe interface that corresponding pointer space is set in the CPU internal memory;
The pointer space writing unit is used for the write pointer of receiving queue is write pointer space by the PCIe interface, comprising:
By each PCIe interface, described write pointer is write the pointer space corresponding with each PCIe interface respectively;
Described transmitting message data read module comprises:
The pointer judging unit is used for judging whether the write pointer in each pointer space is identical when obtaining message data;
Pointer reads control module, is used for
When the write pointer in each pointer space is identical, read described write pointer, read bag descriptor in the corresponding receiving queue according to described write pointer, obtain the first address of message data in CPU memory cache piece according to described bag descriptor, and obtain required message data according to described first address;
When the write pointer in each pointer space is not identical, suspends and read described write pointer.
Preferably, in this application, described transmitting message data read module is located among the CPU.
Can find out from above-mentioned technical scheme, in this application, be provided with a plurality of pointer space, store the corresponding pointer of same message data by the transmission of different PCIe interfaces, owing to only distributing to a CPU memory cache of this message data piece, by the PCIe interface this message data is write this CPU memory cache piece; And, structure comprises the bag descriptor of the first address of this CPU memory cache piece, and will wrap descriptor by the PCIe interface and write after these two steps are finished in the receiving queue among the CPU, the pointer of each pointer space just can be identical, so by when the pointer of each pointer space is identical again reading pointer to obtain the mode of message data, can effectively avoid when bridge module is supported multichannel PCIe interface data transmission, the pointer that causes owing to the time-delay difference of different PCIe interfaces write the message data read error that causes early than above-mentioned two steps.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, the below will do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art, apparently, accompanying drawing in the following describes only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the treatment scheme schematic diagram behind the bridge module reception message data in the prior art;
Fig. 2 is the treatment scheme schematic diagram behind the bridge module reception message data among the application;
Fig. 3 is the schematic flow sheet that reads message data among the application at the CPU end;
Fig. 4 is the structural representation of PCIe interface bridge connection module among the application;
Fig. 5 is the structural representation of multichannel PCIe interface transmitting message data read module among the application;
Fig. 6 is the structural representation of PCIe interface transmitting message data transmission system among the application.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that obtains under the creative work prerequisite.
As shown in Figure 2, for fear of the message data read error, in the application's a embodiment, provide a kind of multichannel PCIe interface transmitting message data method, having comprised: at the bridge module end:
S21, corresponding pointer space is set for each PCIe interface in the CPU internal memory;
S22, the write pointer of receiving queue is write pointer space by the PCIe interface, be specially, by each PCIe interface, write pointer is write the pointer space corresponding with each PCIe interface respectively.
In the prior art, why can't realize a plurality of PCIe interface bindings, because message data is being write in the process of CPU, because each step that message data writes can be carried out to write among the CPU by different PCIe interface concurrents, so following situation might occur: the step that message data writes buffer memory maybe writes the bag descriptor of this message data finishing of receiving queue step and lags behind write pointer is write finishing of pointer space step, because the step that this moment, message data write buffer memory maybe writes the receiving queue step with the bag descriptor of this message data and does not also finish, if so according to the write pointer reading out data in the pointer space, data read errors will occur this moment.
In order to solve the message data read error that is caused by above reason, in the present embodiment, for each PCIe interface arranges corresponding pointer space in the CPU internal memory, concrete, to bundle two PCIe interfaces as example, just need to be provided with two pointer space, be used for the storage write pointer, for after each PCIe interface is provided with independent pointer space, also need to be when write pointer be write pointer space by the PCIe interface, by each PCIe interface, write pointer is write the pointer space corresponding with each PCIe interface respectively.That is to say, when carrying out step that message data writes buffer memory and maybe the bag descriptor of this message data write the receiving queue step, process by two PCIe interface concurrents, when execution writes the pointer space step with write pointer, then need two PCIe interfaces respectively write pointer to be write each self-corresponding pointer space of PCIe interface.
Cause for fear of the time-delay difference owing to two PCIe interfaces, message data writes the step of buffer memory, maybe the bag descriptor with this message data writes finishing of receiving queue step, lag behind write pointer is write finishing of pointer space step, so write pointer is write the pointer space step to be repeated by each PCIe interface, when the write pointer homogeneous phase while of each pointer space, represent that then writing of this write pointer is later than message data and writes buffer memory and the bag descriptor of this message data is write receiving queue, thereby guaranteeing this write pointer, is corresponding with the bag descriptor of this message data in the message data that writes buffer memory and the receiving queue.And then also just avoided the read error of message data.
Because in the present embodiment, the read error of the message data when having avoided bundling a plurality of PCIe interface.Because the embodiment of the present application has realized the message data transmission of the PCIe interface of high bandwidth in the mode that bundlees a plurality of PCIe interfaces, and then has effectively saved equipment cost.In addition, according to the technical scheme in the present embodiment, can bundle and surpass two PCIe interface, thereby can greatly improve the bandwidth of PCIe interface, thereby can also realize by the high-end device message data transmission bandwidth that also is beyond one's reach.
As shown in Figure 3, in the application on the other hand, also provide another kind of multichannel PCIe interface transmitting message data method, having comprised:
S31, judge at CPU end whether the write pointer in the pointer space of each PCIe interface correspondence in the CPU internal memory is identical;
Then read described write pointer if S32 is identical, obtain the first address of message data in CPU memory cache piece according to described pointer bag descriptor, and obtain required message data according to described first address; Read described write pointer otherwise suspend.
In the present embodiment, on the basis with the corresponding embodiment of Fig. 2, CPU holds corresponding multichannel PCIe interface transmitting message data method, owing to being equipped with pointer space for each PCIe interface among the CPU, and only have the write pointer in each pointer space identical, represent that just writing of this write pointer is later than message data and writes buffer memory and the bag descriptor of this message data is write receiving queue, thereby guaranteeing this write pointer, is corresponding with the bag descriptor of this message data in the message data that writes buffer memory and the receiving queue.For this reason, in the present embodiment, when obtaining message data, to judge at first whether the pointer in each pointer space is identical, just carry out the follow-up action of reading when only having write pointer in each pointer space identical, that is, obtain the first address of message data in CPU memory cache piece according to pointer bag descriptor, and obtain required message data according to first address.
If the write pointer in each pointer space is different, not yet finish message data in the PCIe interface that then expression might have and write the step that buffer memory maybe writes the bag descriptor of this message data receiving queue, so the write pointer in the reading pointer space will cause the read error of message data at this moment, thereby in this case, need to suspend reading of message data.Until when the write pointer in each pointer space is identical, carry out again reading of message data.
As shown in Figure 4, in the application on the other hand, also provide a kind of PCIe interface bridge connection module 1, having comprised: multichannel PCIe interface;
Pointer space setting unit 3 is used to each PCIe interface that corresponding pointer space 4 is set in the CPU2 internal memory;
Pointer space writing unit 5 is used for the write pointer of receiving queue is write pointer space by the PCIe interface, specifically comprises: by each PCIe interface, described write pointer is write the pointer space corresponding with each PCIe interface 4 respectively.
The present embodiment is the device embodiment corresponding with multichannel PCIe interface transmitting message data embodiment of the method illustrated in fig. 2, in the present embodiment, PCIe interface bridge connection module can bundle the PCIe interface of multichannel, when solving multichannel PCIe interface concurrent transmitting message data, might write buffer memory because of message data, maybe the bag descriptor of this message data being write finishing of receiving queue lags behind write pointer is write finishing of pointer space, because this moment, message data write maybe the bag descriptor of this message data being write receiving queue and also not finishing of buffer memory, so if this moment is according to the write pointer reading out data in the pointer space, the problem that data read errors can occur, by pointer space setting unit 3, for each PCIe interface arranges corresponding pointer space in the internal memory of CPU2; Like this, in the time of the pointer space 4 that write pointer write appointment in the CPU2 internal memory, by pointer space writing unit 5, by each PCIe interface, described write pointer is write the pointer space corresponding with each PCIe interface 4 respectively.
Pointer space writing unit 5 writes pointer space 4 by each PCIe interface with write pointer, when the write pointer homogeneous phase while of each pointer space 4, represent that then writing of this write pointer is later than message data and writes buffer memory and the bag descriptor of this message data is write receiving queue, thereby guaranteeing this write pointer, is corresponding with the bag descriptor of this message data in the message data that writes buffer memory and the receiving queue.And then also just avoided the read error of message data.
Because in the present embodiment, the read error of the message data when having avoided bundling a plurality of PCIe interface.Because the embodiment of the present application has realized the message data transmission of the PCIe interface of high bandwidth in the mode that bundlees a plurality of PCIe interfaces, and then has effectively saved equipment cost.In addition, according to the technical scheme in the present embodiment, can bundle and surpass two PCIe interface, thereby can greatly improve the bandwidth of PCIe interface, thereby can also realize by the high-end device message data transmission bandwidth that also is beyond one's reach.
As shown in Figure 5, in the application on the other hand, a kind of multichannel PCIe interface transmitting message data read module 21 also is provided, has comprised: pointer judging unit 22 is used for judging whether the write pointer of each PCIe interface in pointer space 4 corresponding to CPU internal memory be identical; Pointer reads control module 23, when being used for the write pointer when each pointer space 4, read described write pointer, obtain the first address of message data in CPU memory cache piece according to described write pointer bag descriptor, and obtain required message data according to described first address; When the write pointer in each pointer space 4 is not identical, suspends and read described write pointer.
PCIe interface bridge connection module in embodiment illustrated in fig. 4 finish message data the storage in CPU, construct this CPU memory cache piece first address the bag descriptor and will wrap that descriptor writes in the receiving queue among the CPU and the write pointer of described receiving queue write the pointer space of appointment in the CPU internal memory by the PCIe interface by the PCIe interface after, also need message data is read accordingly, so that the subsequent applications of CPU.
At the present embodiment, multichannel PCIe interface transmitting message data read module 21 generally can be arranged among the CPU; Owing to being equipped with pointer space 4 for each PCIe interface among the CPU, and only have the write pointer in each pointer space identical, represent that just writing of this write pointer is later than message data and writes buffer memory and the bag descriptor of this message data is write receiving queue, thereby the bag descriptor that guarantees this message data in this write pointer and the message data that writes buffer memory and the receiving queue is corresponding.
For this reason, in the present embodiment, be provided with pointer judging unit 22 when obtaining message data, judge whether the write pointer in each pointer space 4 is identical; Then, read control module 23 by pointer, carry out the follow-up action of reading when the write pointer in each pointer space 4 is identical, namely, obtain the first address of message data in CPU memory cache piece according to bag descriptor corresponding to write pointer, and obtain required message data according to first address.When the pointer in each pointer space 4 is not identical, then suspends and read described pointer, to avoid the read error of message data.
If 4 write pointer is different in each pointer space, not yet finish message data in the PCIe interface that then expression might have and write the step that buffer memory maybe writes the bag descriptor of this message data receiving queue, so the write pointer in the reading pointer space 4 will cause the read error of message data at this moment, thereby in this case, need to suspend reading of message data.Until when the write pointer in each pointer space is identical, carry out again reading of message data.
As shown in Figure 6, in the application on the other hand, also provide a kind of PCIe interface transmitting message data transmission system, bridge module and transmitting message data read module; Bridge module comprises: multichannel PCIe interface; The pointer space setting unit is used to each PCIe interface that corresponding pointer space is set in the CPU internal memory; The pointer space writing unit is used for the write pointer of receiving queue is write pointer space by the PCIe interface, specifically comprises: by each PCIe interface, described write pointer is write the pointer space corresponding with each PCIe interface respectively;
The transmitting message data read module comprises: the pointer judging unit is used for judging whether the pointer in each pointer space is identical when obtaining message data;
Pointer reads control module, when being used for the pointer when each pointer space, reads described pointer, obtains the first address of message data in CPU memory cache piece according to described pointer bag descriptor, and obtains required message data according to described first address; When the pointer in each pointer space is not identical, suspends and read described pointer.
In the present embodiment, comprised PCIe interface bridge connection module illustrated in fig. 4, and, multichannel PCIe interface transmitting message data read module illustrated in fig. 5; Because the principle of work of the present embodiment and the effect that can reach, also cooperate behind the multichannel PCIe interface transmitting message data read module illustrated in fig. 5 similarly with PCIe interface bridge connection module illustrated in fig. 4,, just repeat no more at this for this reason.
Each embodiment adopts the mode of going forward one by one to describe in this instructions, and what each embodiment stressed is and the difference of other embodiment that identical similar part is mutually referring to getting final product between each embodiment.
To the above-mentioned explanation of the disclosed embodiments, make this area professional and technical personnel can realize or use the present invention.Multiple modification to these embodiment will be apparent concerning those skilled in the art, and General Principle as defined herein can be in the situation that do not break away from the spirit or scope of the present invention, in other embodiments realization.Therefore, the present invention will can not be restricted to these embodiment shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.
Claims (9)
1. a multichannel PCIe interface transmitting message data method is characterized in that, comprising: for each PCIe interface arranges corresponding pointer space in the CPU internal memory;
The write pointer of receiving queue is write pointer space by the PCIe interface, is specially:
By each PCIe interface, described write pointer is write the pointer space corresponding with each PCIe interface respectively.
2. a multichannel PCIe interface transmitting message data method is characterized in that, comprising: judge whether each PCIe interface write pointer in the corresponding pointer space in the CPU internal memory is identical;
If identical:
Then read described write pointer, read bag descriptor in the corresponding receiving queue according to described write pointer, obtain the first address of message data in CPU memory cache piece according to described bag descriptor, and obtain required message data according to described first address;
Otherwise:
Suspend and read described write pointer.
3. a PCIe interface bridge connection module is characterized in that, comprising: multichannel PCIe interface;
The pointer space setting unit is used to each PCIe interface that corresponding pointer space is set in the CPU internal memory;
The pointer space writing unit is used for the write pointer of receiving queue is write pointer space by the PCIe interface, comprising: by each PCIe interface, described write pointer is write the pointer space corresponding with each PCIe interface respectively.
4. described bridge module according to claim 3 is characterized in that, described multichannel comprises two-way PCIe interface.
5. a multichannel PCIe interface transmitting message data read module is characterized in that, comprising:
The pointer judging unit is used for judging whether the write pointer of each PCIe interface in pointer space corresponding to CPU internal memory be identical;
Pointer reads control module, is used for
When the write pointer in each pointer space is identical, read described write pointer, obtain the first address of message data in CPU memory cache piece according to described write pointer bag descriptor, and obtain required message data according to described first address;
When the write pointer in each pointer space is not identical, suspends and read described write pointer.
6. described transmitting message data read module according to claim 5 is characterized in that, described a plurality of pointer space comprise two pointer space.
7. described transmitting message data read module according to claim 6 is characterized in that, described transmitting message data read module is located among the CPU.
8. a PCIe interface transmitting message data transmission system is characterized in that, comprising: bridge module and transmitting message data read module;
Described bridge module comprises:
Multichannel PCIe interface;
The pointer space setting unit is used to each PCIe interface that corresponding pointer space is set in the CPU internal memory;
The pointer space writing unit is used for the write pointer of receiving queue is write pointer space by the PCIe interface, comprising:
By each PCIe interface, described write pointer is write the pointer space corresponding with each PCIe interface respectively;
Described transmitting message data read module comprises:
The pointer judging unit is used for judging whether the write pointer in each pointer space is identical when obtaining message data;
Pointer reads control module, is used for
When the write pointer in each pointer space is identical, read described write pointer, read bag descriptor in the corresponding receiving queue according to described write pointer, obtain the first address of message data in CPU memory cache piece according to described bag descriptor, and obtain required message data according to described first address;
When the write pointer in each pointer space is not identical, suspends and read described write pointer.
9. described transmitting message data transmission system according to claim 8 is characterized in that, described transmitting message data read module is located among the CPU.
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