CN102903640A

CN102903640A - Body contact forming method by utilizing SOI (silicon on insulator) MOSFET (metal oxide semiconductor field effect transistor) of sacrificial layer

Info

Publication number: CN102903640A
Application number: CN2012104072673A
Authority: CN
Inventors: 王颖; 包梦恬; 曹菲; 邵雷
Original assignee: Harbin Engineering University
Current assignee: Harbin Engineering University
Priority date: 2012-10-23
Filing date: 2012-10-23
Publication date: 2013-01-30
Anticipated expiration: 2032-10-23
Also published as: CN102903640B

Abstract

The invention provides a body contact forming method by utilizing an SOI (silicon on insulator) MOSFET (metal oxide semiconductor field effect transistor) of a sacrificial layer. The method comprises the following steps of: depositing a buried SiO2 layer (2) on a semiconductor substrate (1) on a bottom layer, and depositing a SiGe mask membrane (3) on the buried SiO2 layer (2); etching for the first time and exposing the buried SiO2 layer (2); etching for the second time and maintaining the buried layer SiO2 layer (2) with a large area at the right side of the SiGe mask membrane (3); carrying out epitaxial growth of a silicon membrane (5) at the top layer; forming a gate oxide layer (7), and depositing a polycrystalline gate (8); etching for the third time and removing the silicon membrane (5) at the top layer of a glue-free part; etching horizontally for the fourth time and removing the remained SiGe mask membrane (3a); and carrying out epitaxial growth and compensating the silicon membrane at the top layer (5), pouring P+ ions, and depositing a metal electrode. The body contact forming method by utilizing the SOI MOSFET of the sacrificial layer has the advantages of reducing the use of the mask membrane plate, simplifying the manufacturing technology flow, and lowering the manufacturing cost.

Description

A kind of SOI MOSFET body contact formation method of utilizing sacrifice layer

Technical field

What the present invention relates to is a kind of formation method of electronic devices and components.A kind of SOI MOSFET body of sacrifice layer that utilizes contacts the formation method specifically.

Background technology

The SOI technology has the incomparable superiority of many body silicon technologies as a kind of Fully dielectric isolation technology.But itself also exists some ghost effects the SOI device, and wherein the floater effect of partial depletion SOI device is to compare a maximum problem with the body silicon device, and this also becomes one of reason of restriction SOI technical development and extensive use.Floater effect can produce kink effect, drain breakdown voltage reduction, unusual sub-threshold slope etc., has a strong impact on performance of devices.

Because how floater effect on the impact of device performance, suppresses the focus that floater effect becomes the research of SOI device.Inhibition method for floater effect can be divided into two classes: a class is to adopt the mode of body contact to make the hole of tagma accumulation obtain discharging, and a class is that angle from technique is by injecting the complex centre, the control minority carrier life time.

The body contact is that neutral region and the outside of instigating buried oxidation layer top, silicon fiml bottom to be in the floating dummy status of electricity contact, and causes the hole not accumulate in this zone.Traditional body contact method has T-shaped grid, H type grid and BTS structure.But the body contact resistance of traditional T-shaped grid, H type gate device increases with the increase of channel width, corresponding floater effect is more remarkable, although the method that can take to increase silicon film thickness solves contact resistance problem bigger than normal, but the increase along with silicon film thickness, the source-and-drain junction of device strengthens deeply, proper parasitic capacitance is increased, thereby affect performance of devices.The BTS structure is directly to form P in the source region ⁺The district, this structure is so that the source leakage is asymmetric, and causing the source to be leaked can't exchange, and then effective channel width is reduced.

Therefore how when realizing body contact structure, reduce the focus that contact resistance and parasitic capacitance become research SOI MOSFET device body contact problem.

Owing to the lower thermal conductivity of SOI buried oxidation layer, there is the direct current self-heating effect in the SOI device simultaneously.Increase along with device drain terminal voltage and gate voltage, power consumption increases, and the temperature in the silicon body rises, and is higher than ambient temperature, mobility, threshold voltage, collision ionization, buoyancy aid current potential, leakage current, sub-threshold slope etc. all can be subjected to the impact of temperature in the device, cause thus the variation of device property.And in the existing most body contact structure, less to the research of the anti-self-heating effect of device.

In the existing SOI MOSFET device of realizing body contact structure by the method for utilizing groove, many devices are by forming groove below source region or drain region, neutral tagma and gate electrode are joined realize neutral tagma is drawn.This method no doubt can suppress the floater effect of SOI MOSFET device, but destroy sometimes the isolation effect of SOI MOSFET device, simultaneously aspect the formation contact trench, on the formation method repeatedly use mask plate and lithographic technique, this is so that device is complicated on manufacture craft, making step is loaded down with trivial details, is unfavorable for reducing production costs.

Summary of the invention

The object of the present invention is to provide a kind of minimizing mask plate to use, simplify fabrication processing, reduce the SOI MOSFET body contact formation method of utilizing sacrifice layer of cost of manufacture.

The object of the present invention is achieved like this:

The SOI MOSFET body contact formation method of sacrifice layer of utilizing of the present invention comprises:

Step 1, on bottom Semiconductor substrate 1 the buried SiO of deposit ₂Layer 2 is at buried SiO ₂Deposit SiGe masking film 3 on the layer 2;

Step 2, on SiGe masking film 3 resist coating 4, for the first time etching is removed most of SiGe masking film 3, exposes buried SiO ₂ Layer 2 keeps the SiGe masking film 3 of fraction, makes the buried SiO of SiGe masking film 3 both sides of reservation ₂Layer 2 area do not wait;

Step 3, gluing again, etching is removed and is positioned at SiGe masking film 3 left side areas buried SiO less than normal for the second time ₂Layer 2 is until expose bottom Semiconductor substrate 1, the large buried SiO of reservation SiGe masking film 3 right side areas ₂Layer 2 structure; Remove unnecessary photoresist, the epitaxial growth top silicon surface 5 afterwards;

Step 4, photoetching are formed with the source region, growth gate oxide 7, and depositing polysilicon grid 8, photoetching polysilicon gate 8, source drain terminal inject and form source and drain terminal, wherein by forming source on the SiGe masking film that is infused in reservation;

Step 5, on source surface, polysilicon gate 8 surfaces and drain terminal surface resist coating 9, etching is removed the top silicon surface 5 of gluing part not until expose bottom Semiconductor substrate 1 for the third time;

Step 6, smear photoresist in the bottom Semiconductor substrate 1 of exposing, the 4th time lateral etching is removed the SiGe masking film 3a that keeps; Remove the photoresist on the bottom Semiconductor substrate 1, epitaxial growth completion top silicon surface 5, P ⁺Implantation is removed unnecessary photoresist, the depositing metal electrode.

Described bottom Semiconductor substrate 1 material is silicon, germanium, III ~ V group iii v compound semiconductor material, II ~ VI group iii v compound semiconductor material or other compound semiconductor materials, also can adopt monocrystal material.

Described monocrystal material can make it become N-shaped substrate or p-type substrate by doping.

The main feature of method of the present invention is as follows:

What the SOI MOSFET body contact formation method of utilizing sacrifice layer of the present invention and other were simple utilizes etching groove or mask plate lithographic technique from the device top layer, compare by the method for etching organizator contact structures successively, the present invention utilizes SiGe sacrifice layer and growth technology organizator contact structures especially.Particularly, adopt the SiGe material as sacrifice layer, make the source region junction depth that forms behind the Implantation different from the drain region junction depth, by the lateral etching technology, remove the SiGe sacrifice layer, neutral tagma is linked to each other with source electrode by the passage of below, source region, realize the body contact.By vertical etching, the top silicon surface that is obtained by epitaxial growth is directly linked to each other with the bottom Semiconductor substrate simultaneously, the waste heat that device produces when work is derived by the contact-making surface of top silicon surface and bottom Semiconductor substrate.This structure not only can realize the anti-floating bulk effect, can also effectively prevent the generation of self-heating effect.The present invention can realize the body contact when simplifying processing step, increase the validity of anti-floating bulk effect.

Description of drawings

Fig. 1 is with SiGe masking film and buried SiO before the etching ₂The schematic diagram of the bottom Semiconductor substrate of layer;

Fig. 2 is the sectional view after Fig. 1 structure etching first time;

Fig. 3 is that Fig. 2 structure etching is removed the buried SiO of part ₂Layer, removal photoresist, the schematic diagram of epitaxial growth top silicon surface;

Fig. 4 is photoetching active area, growth gate oxide, depositing polysilicon grid, the sectional view after the source drain terminal injects;

Fig. 5 is the schematic diagram that etching is removed the part top silicon surface on architecture basics shown in Figure 4;

Fig. 6 is that horizontal etching is removed SiGe masking film, epitaxial growth completion top silicon surface, P on structure shown in Figure 5 ⁺The simple schematic diagram of device final structure behind the Implantation.

Embodiment

For example the present invention is done detailed description below in conjunction with accompanying drawing:

In conjunction with Fig. 1.The buried SiO of deposit on the bottom Semiconductor substrate 1 that is shown in ₂ Layer 2 is at buried SiO ₂Be deposited with SiGe masking film 3 on the layer 2.Bottom Semiconductor substrate 1 material can freely be selected, such as: silicon, germanium, III ~ V group iii v compound semiconductor material, II ~ VI group iii v compound semiconductor material or other compound semiconductor materials etc., also can adopt monocrystal material, also can make it become N-shaped substrate or p-type substrate by doping for monocrystal material.

In conjunction with Fig. 2.Resist coating 4 on SiGe masking film 3, make photoresist 4 cover the fraction area of SiGe masking films 3, and etching is removed the SiGe masking film 3 of gluing not until expose buried SiO ₂Layer 2, and make the buried SiO of the SiGe masking film 3a both sides of reservation ₂Layer 2 area do not wait, and are respectively 2a and 2b.

In conjunction with Fig. 3.The larger buried SiO of right side area at the SiGe masking film 3a that keeps ₂The upper Coating glue protect of layer 2a, etching is removed the not less buried SiO of left side area of the SiGe masking film 3a that is positioned at reservation of gluing ₂Layer 2b is until expose bottom Semiconductor substrate 1.Remove unnecessary photoresist, epitaxial growth top silicon surface 5.Contact-making surface 6 is contact-making surfaces of top silicon surface 5 and bottom Semiconductor substrate 1.The physical property of top silicon surface 5 material therefors can be identical with the bottom semiconductor substrate materials, also can be different from the bottom semiconductor substrate materials.

In conjunction with Fig. 4.Photoetching active area, growth gate oxide 7, depositing polysilicon grid 8, source drain terminal inject and form source and drain terminal.Wherein the injection phase of source is on the SiGe masking film 3a that keeps.

In conjunction with Fig. 5.The other top silicon surface surface resist coating 9 in surface, source region, gate oxide 7 and polysilicon gate 8 surfaces and drain region and drain region corresponding above the SiGe masking film 3a that keeps is protected.Etching is removed the top silicon surface 5 of contact-making surface 6 tops until expose bottom Semiconductor substrate 1.

In conjunction with Fig. 6.Horizontal cross etching on architecture basics shown in Figure 5 is removed the SiGe masking film 3a that keeps, epitaxial growth completion top silicon surface 5, and top silicon surface 5 and the bottom Semiconductor substrate 1 of new growth are joined and are contact-making surface 10.Top silicon surface 5 is carried out P ⁺Inject, at surface, drain region, polysilicon gate 8 surfaces, source region surface deposition metal electrode 11, wherein the metal electrode that shows of source region also covers the top silicon surface 5 of fraction.

Above-described specific embodiment; to purpose of the present invention, technical scheme and beneficial effect through having gone further description; what it should be noted that is; the above only is specific embodiments of the invention; do not limit the present invention; within the spirit and principles in the present invention all, the modulation of doing and optimization all should be included within protection scope of the present invention.

Claims

1. one kind is utilized the SOI MOSFET body of sacrifice layer to contact the formation method, it is characterized in that may further comprise the steps:

Step 1, at the upper buried SiO of deposit of bottom Semiconductor substrate (1) ₂Layer (2) is at buried SiO ₂The upper deposit SiGe masking film (3) of layer (2);

Step 2, at the upper resist coating (4) of SiGe masking film (3), etching is removed most of SiGe masking film (3) for the first time, exposes buried SiO ₂Layer (2) keeps the SiGe masking film (3) of fraction, makes the buried SiO of SiGe masking film (3) both sides of reservation ₂Layer (2) area do not wait;

Step 3, gluing again, etching is removed and is positioned at SiGe masking film (3) left side area buried SiO less than normal for the second time ₂Layer (2) is until expose bottom Semiconductor substrate (1), the large buried SiO of reservation SiGe masking film (3) right side area ₂Layer (2) structure; Remove unnecessary photoresist, afterwards epitaxial growth top silicon surface (5);

Step 4, photoetching are formed with the source region, growth gate oxide (7), and depositing polysilicon grid (8), photoetching polysilicon gate (8), source drain terminal inject and form source and drain terminal, wherein by forming source on the SiGe masking film that is infused in reservation;

Step 5, on source surface, polysilicon gate (8) surface and drain terminal surface resist coating (9), etching is removed not gluing top silicon surface (5) partly until expose bottom Semiconductor substrate (1) for the third time;

Step 6, smear photoresist in the bottom Semiconductor substrate (1) of exposing, the 4th time lateral etching is removed the SiGe masking film (3a) that keeps; Remove the photoresist on the bottom Semiconductor substrate (1), epitaxial growth completion top silicon surface (5), P ⁺Implantation is removed unnecessary photoresist, the depositing metal electrode.

2. the SOI MOSFET body of sacrifice layer that utilizes according to claim 1 contacts the formation method, it is characterized in that, described bottom Semiconductor substrate (1) material is silicon, germanium, III ~ V group iii v compound semiconductor material, II ~ VI group iii v compound semiconductor material or other compound semiconductor materials, also can adopt monocrystal material.

3. the SOI MOSFET body contact formation method of utilizing sacrifice layer according to claim 2 is characterized in that described monocrystal material can make it become N-shaped substrate or p-type substrate by doping.