CN102902597A - Chip and method for improving safety of chip - Google Patents
Chip and method for improving safety of chip Download PDFInfo
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- CN102902597A CN102902597A CN2011102153544A CN201110215354A CN102902597A CN 102902597 A CN102902597 A CN 102902597A CN 2011102153544 A CN2011102153544 A CN 2011102153544A CN 201110215354 A CN201110215354 A CN 201110215354A CN 102902597 A CN102902597 A CN 102902597A
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Abstract
The invention discloses a chip and a method for improving safety of the chip. The method includes that a bus system controlled by an application processor is switched to a preset abnormality processing unit when the chip is abnormal during running and is controlled by the preset abnormality processing unit; after the abnormality processing unit processes abnormality, the bus system controlled by the abnormality processing unit is switched to the application processor and is controlled by the same, so that the chip can run normally. The method in the above technical scheme can more effectively improve safety of the chip.
Description
Technical field
The present invention relates to chip field, relate in particular to a kind of method and chip that improves chip security.
Background technology
The security of chip receives much concern for a long time, especially along with the rise and development of the technology such as Web bank, mobile payment, attack technology for chip also emerges in an endless stream, comprise the attack technology for chip exterior running environment, such as the attack technology to temperature, illumination, voltage etc., also comprise the attack technology for the chip internal running status, as for the fault analysis of the running status of chip application processor, chip-stored system, for power consumption attack of chip algorithm system etc.
The protectiving scheme of existing chip security generally is the application processor of notifying chip by the mode of interrupting, carries out respective handling by the application processor of chip according to the software program in the interrupt handling routine.Yet there is certain defective in this protectiving scheme: can obtain corresponding secret information such as the assailant before chip enters interrupt routine, also can pass through fault analysis, the software code of directtissima application processor or interrupt handling routine, thus cause protecting unsuccessfully.
Summary of the invention
The invention provides a kind of method and chip that more effectively improves chip security.
For solving the problems of the technologies described above, the present invention by the following technical solutions:
A kind of method that improves chip security comprises:
When chip during abnormal, will switch to default exception processing unit by the bus system of application processor control in operational process, control described bus system by described exception processing unit;
After described exception processing unit is disposed to abnormal conditions, will switch to described application processor by the described bus system of described exception processing unit control, control described bus system by described application processor, finish the normal operation of chip.
Described chip abnormal in operational process comprises: one or both in operate outside environmental abnormality, the internal operation abnormal state occur in described chip in operational process.
Call the bus switch unit by described exception processing unit and will switch to described exception processing unit by the bus system of application processor control; Call the bus switch unit by described exception processing unit and will switch to described application processor by the described bus system of described exception processing unit control.
Also comprise: when described chip power resets, by described exception processing unit to described chip carry out operational mode judgement, initialization, distribution internal resource, security mechanism is set, abnormality detection mechanism is set, in the exception handling one or more is set.
Also comprise: in described chip operational process, described application processor sends the request of distribution, security mechanism and/or the exception handling of change chip internal resource to described exception processing unit, described exception processing unit judges whether the request of described application processor is legal, if so, described exception processing unit is made response to the request of described application processor.
Described exception processing unit is hardware cell.
A kind of chip comprises the exception processing unit, application processor and the bus system that are arranged on the described chip, wherein,
When described chip in operational process during abnormal, described exception processing unit is used for and will switches to described exception processing unit by the described bus system of described application processor control, described exception processing unit is used for when described chip during at the operational process abnormal, control described bus system, and abnormal conditions are processed;
After described exception processing unit is disposed to abnormal conditions, described exception processing unit also is used for and will switches to described application processor by the described bus system of described exception processing unit control, described application processor is used for controlling described bus system, finishes the normal operation of chip.
Described chip also comprises the abnormality detection unit, and described abnormality detection unit is for detection of described chip abnormal whether in operational process, and if so, then described abnormality detection unit is used for abnormal conditions are reported described exception processing unit.
Described chip also comprises the bus switch unit, described exception processing unit is used for calling described bus switch unit will switch to described exception processing unit by the bus system of application processor control, described bus switch unit is used for accepting calling of described exception processing unit, will switch to described exception processing unit by the bus system of application processor control; Described exception processing unit is used for calling described bus switch unit will switch to described application processor by the described bus system of described exception processing unit control, described bus switch unit is used for accepting calling of described exception processing unit, will switch to described application processor by the described bus system of described exception processing unit control.
Described exception processing unit also is used for when described chip power resets, to described chip carry out operational mode judgement, initialization, distribution internal resource, security mechanism is set, abnormality detection mechanism is set, in the exception handling one or more is set.
Described application processor also is used for sending to described exception processing unit the request of distribution, security mechanism and/or the exception handling of change chip internal resource, described exception processing unit is used for judging whether the request of described application processor is legal, if so, described exception processing unit is used for response is made in the request of described application processor.
Described exception processing unit is hardware cell.
The invention provides a kind of method and chip that improves chip security, chip is in operational process during abnormal, bus system no longer is subjected to the control of application processor, and therefore, the assailant can't cause the security protection failure of chip again by the attack to application processor.
Further, usually adopt the mode of program software to realize the framework of application processor in the prior art, and for the security protection of chip, hardware cell has higher security than software unit, therefore, the present invention is preferred, and exception processing unit is hardware cell.The invention provides a kind of method and chip that more effectively improves chip security.
Description of drawings
Fig. 1 is a kind of process flow diagram that improves the method for chip security of the embodiment of the invention;
Fig. 2 is the schematic diagram of a kind of chip of the embodiment of the invention;
Fig. 3 is the schematic diagram of the exception processing unit in a kind of chip of the embodiment of the invention;
Fig. 4 is the schematic diagram of the abnormality detection unit in a kind of chip of the embodiment of the invention;
Fig. 5 is the schematic diagram of the bus switch unit in a kind of chip of the embodiment of the invention.
Embodiment
By reference to the accompanying drawings the present invention is described in further detail below by embodiment.
Embodiment one:
A kind of method that improves chip security comprises:
When described chip during abnormal, will switch to default exception processing unit by the bus system of application processor control in operational process, control described bus system by described exception processing unit;
After described exception processing unit is disposed to abnormal conditions, will switch to described application processor by the described bus system of described exception processing unit control, control described bus system by described application processor, finish the normal operation of chip.
Fig. 1 is a kind of process flow diagram that improves the method for chip security of the embodiment of the invention, please refer to Fig. 1, and chip power resets, and carries out following operation:
S11, when chip power resets, chip is under the control of exception processing unit, exception processing unit is judged the operational mode of chip, and chip is carried out initialization, and the chip internal resource is distributed, arranged security mechanism, abnormality detection mechanism is set and exception handling is set.
The operational mode of chip comprises test pattern, abnormal patterns, normal mode etc., be in test pattern such as fruit chip, then open test access is tested chip, be in abnormal patterns such as fruit chip, self-destruction chip then,, then chip is carried out initialization, the chip internal resource is distributed, arranged security mechanism, abnormality detection mechanism is set and exception handling is set for normal mode such as fruit chip.
After S12, exception processing unit are finished chip initiation, call the bus switch unit bus system is switched to application processor, finished the normal operation of chip by the application processor general line controlling system.
In S13, the chip operational process, whether abnormality detection unit inspection chip exterior working environment or internal operation state be unusual, if so, then carries out S14, if not, then continues to carry out S13.
S14, abnormality detection unit report exception processing unit with abnormal conditions.
S15, exception processing unit call the bus switch unit bus system are switched under the control of exception processing unit after receiving the abnormal conditions that the abnormality detection unit reports, and judge whether to need to carry out the chip self-destroying operation, if, then carry out S16, if not, then carry out S17.
S16, chip self-destroying.
S17, exception processing unit are handled it to corresponding abnormal conditions according to the exception handling that arranges.
After S18, exception processing unit are disposed to abnormal conditions, call the bus switch unit bus system is switched to application processor, the application processor general line controlling system continues the normal operation function.
When needing to change the distribution, security mechanism of chip internal resource and/or exception handling in S19, the application processor operational process, send request to exception processing unit by application processor.
S20, exception processing unit judge according to the security attribute that arranges whether this request is legal, in this way, then carry out S21, as no, then carry out S22.
S21, exception processing unit call the bus switch unit bus system are switched to exception processing unit from application processor, finish seizing of resource, then re-start the setting of resource distribution, security attribute setting or exception handling, finish reset after, call the bus switch unit bus system is switched to application processor, application processor normal operation function.
The request of S22, refusal application processor continues the normal operation function by application processor.
The present embodiment, exception processing unit is hardware cell, in the chip operational process, follow application processor to move together, but be responsible for security control, abnormality processing function, the application processing function of not responsible chip, when chip was subject to the attack of serious or irrecoverability, exception processing unit carried out self-destruction to chip, guaranteed the security of Data within the chip, when chip is subject to the attack of restorability, according to the exception handling of Set For Current chip is processed unusually.
The present embodiment, the abnormality detection unit can be in running status always, or intermittent operation, chip exterior running environment comprises unusually: illumination, temperature, voltage, clock, in unusual one or more such as reset, the chip internal running status comprises in unusual one or more such as chip internal application processor, APU, storer, bus, interface unusually, the abnormality detection unit can be the mimic channel of chip internal, and the mechanism that reports of the testing mechanism of abnormality detection unit and abnormal conditions can be configured by exception processing unit.
The present embodiment, to be switched to by the bus system of application processor control before the exception processing unit, can also preserve request and the response of application processor, go out the running status of current bus according to the analysis of performance of the request of application processor and response, if current bus system be operating as atomic operation, can not interrupt, can wait for after current atomic operation is finished and switching again, otherwise the uncompleted request of application processor or operation response before preserving, after bus system switches to application processor again, the operation of preserving before recovering.
The present embodiment, bus system comprises that chip internal is used to transmit the transmission channel of data, control, address, be used for connecting the path of all resources of chip internal, AMBA (Advanced Microcontroller Bus Architecture) bus for example, PCI (Peripheral Component Interconnect, the Peripheral Component Interconnect standard) bus, AGP (Accelerated Graphics Port, AGP) bus etc.
During abnormal, bus system no longer is subjected to the control of application processor in operational process for the present embodiment, chip, and therefore, the assailant can't cause the security protection failure of chip again by the attack to application processor.
Further, usually adopt the mode of program software to realize the framework of application processor in the prior art, and for the security protection of chip, hardware cell has higher security than software unit, therefore, the present invention is preferred, and exception processing unit is hardware cell.The invention provides a kind of method and chip that more effectively improves chip security.
Embodiment two:
A kind of chip comprises the exception processing unit, application processor and the bus system that are arranged on the described chip, wherein,
When described chip in operational process during abnormal, described exception processing unit is used for and will switches to described exception processing unit by the described bus system of described application processor control, described exception processing unit is used for when described chip during at the operational process abnormal, control described bus system, and abnormal conditions are processed;
After described exception processing unit is disposed to abnormal conditions, described exception processing unit also is used for and will switches to described application processor by the described bus system of described exception processing unit control, described application processor is used for controlling described bus system, finishes the normal operation of chip.
Preferably, exception processing unit is hardware cell.
Fig. 2 is the schematic diagram of a kind of chip of the embodiment of the invention, please refer to Fig. 2:
Comprise exception processing unit 21, application processor 22, bus switch unit 23, bus system 24, abnormality detection unit 25,24 times control interface resources of bus system, memory resource, algorithm resource, other resources etc.
Dotted line is sampled signal among the figure, heavy line is bus signals, fine line is control signal, when chip power resets, exception processing unit 21 control chips, be used for judging the operational mode of chip, chip is carried out initialization, distribute the chip internal resource, security mechanism is set, abnormality detection mechanism is set, exception handling etc., after initialization is finished, being used for calling bus switch unit 23 switches bus system 24 to application processor 22, exception processing unit 21 has discharged the chip internal resource, application processor 22 general line controlling systems 24, take the chip internal resource, be used for finishing the normal operation of chip, in the chip operational process, whether abnormality detection unit 25 is unusual for detection of chip exterior working environment or internal operation state, if there is unusually, abnormal conditions are reported exception processing unit 21, exception processing unit 21 is used for calling bus switch unit 23 and will be switched under the control of exception processing unit 21 by the bus system 24 of application processor 22 controls, and judge whether abnormal conditions are to recover, as no, the self-destruction chip, in this way, according to the exception handling that sets in advance abnormal conditions are processed, after finishing dealing with, calling bus switch unit 23 switches to bus system 24 under the control of application processor 22, by application processor 22 general line controlling systems 24, take the chip internal resource, finish the normal operation of chip.
Further, application processor 22 also can be used for sending to exception processing unit 21 distribution of change chip internal resource, the request of security mechanism and/or exception handling, exception processing unit 21 is used for judging according to default security attribute whether this request is legal, as legal, calling bus switch unit 23 will be switched under the control of exception processing unit 21 by the bus system 24 of application processor 22 controls, redistribute the chip internal resource according to the request of application processor 22, security attribute is set or exception handling is set, after finishing dealing with, calling bus switch unit 23 switches to bus system 24 under the control of application processor 22, as illegal, then refusal is responded this request.
Fig. 3 is the schematic diagram of the exception processing unit in a kind of chip of the embodiment of the invention, please refer to Fig. 3:
The present embodiment, exception processing unit 21 comprises: mode decision module 211, be used for when chip power resets, judge the operational mode of chip, initialization module 212, be used for chip is carried out initialization, resource distribution module 213, be used for distributing the chip internal resource, mechanism arranges module 214, be used for arranging the security mechanism of chip, abnormality detection mechanism, exception handling etc., validity judgement module 215, be used in the distribution that receives the change chip internal resource that application processor 22 sends, during the request of security mechanism or exception handling, the security mechanism that module 214 settings are set according to mechanism judges whether this request is legal, bus switch calling module 216, be used for after chip initiation is finished, call bus switch unit 23, bus system 24 is switched to application processor 22, when chip operation abnormal, be used for calling bus switch unit 23, bus system 24 switchings are switched to exception processing unit 21 by application processor 22, finish the abnormality processing of chip at exception processing unit 21 after, call bus switch unit 23, bus system 24 switchings are switched to application processor 22 by exception processing unit 21, temperature anomaly protection module 217, be used for the temperature anomaly situation is processed, the unusual protection module 218 of illumination, be used for the illumination abnormal conditions are processed, electric voltage exception protection module 219, be used for the electric voltage exception situation is processed, the chip self-destroying module, other unusual protection modules comprise clock, burr, the chip internal application processor, APU, storer, bus, the unusual protection module such as interface.
Fig. 4 is the schematic diagram of the abnormality detection unit in a kind of chip of the embodiment of the invention, please refer to Fig. 4: abnormality detection unit 25 comprises temperature detecting unit 251, be used for temperature anomaly is detected, voltage detection unit 252, be used for electric voltage exception is detected, illumination detecting unit 253, be used for illumination is detected unusually, other detecting units, comprise clock, burr, the chip internal application processor, APU, storer, bus, the detecting units such as interface, abnormality detection unit 25 comprise that also abnormal conditions report unit 254, be used for after detecting abnormal conditions, reporting abnormal conditions to exception processing unit 21.
The testing mechanism of abnormality detection unit 25 and report mechanism to be arranged by the machine-processed EM equipment module of exception processing unit 21.Abnormality detection unit 25 can be the mimic channel of chip internal.
Fig. 5 is the schematic diagram of the bus switch unit in a kind of chip of the embodiment of the invention, please refer to Fig. 5:
Bus switch unit 23 is responsible for switching bus system under the control of exception processing unit 21,23 inside, bus switch unit of the present embodiment are provided with request holding unit 231 and the response holding unit 232 of application processor 22, be used for preserving request and the response of application processor 22, also comprise bus system condition judgment module 233, be used for judging according to the performance of the request of application processor 22 and response the running status of current bus system 24, when exception processing unit 21 calls bus switch unit 23 switching bus system 24, if current bus system be operating as atomic operation, can not interrupt, bus switch unit 23 can wait for that current atomic operation finishes, otherwise application processor 22 uncompleted request or operation responses before bus switch unit 23 can be preserved, and then switch bus system 23 to exception processing unit 21, after bus system 24 switches to application processor 22 again, the operation of preserving before recovering.
Above content is in conjunction with concrete embodiment further description made for the present invention, can not assert that implementation of the present invention is confined to these explanations.For the general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, can also make some simple deduction or replace, all should be considered as belonging to protection scope of the present invention.
Claims (10)
1. a method that improves chip security is characterized in that, comprising:
When chip during abnormal, will switch to default exception processing unit by the bus system of application processor control in operational process, control described bus system by described exception processing unit;
After described exception processing unit is disposed to abnormal conditions, will switch to described application processor by the described bus system of described exception processing unit control, control described bus system by described application processor, finish the normal operation of chip.
2. the method for claim 1 is characterized in that, described chip abnormal in operational process comprises: one or both in operate outside environmental abnormality, the internal operation abnormal state occur in described chip in operational process.
3. the method for claim 1 is characterized in that, calls the bus switch unit by described exception processing unit and will switch to described exception processing unit by the bus system of application processor control; Call the bus switch unit by described exception processing unit and will switch to described application processor by the described bus system of described exception processing unit control.
4. the method for claim 1, it is characterized in that, also comprise: when described chip power resets, by described exception processing unit to described chip carry out operational mode judgement, initialization, distribution internal resource, security mechanism is set, abnormality detection mechanism is set, in the exception handling one or more is set; In described chip operational process, described application processor sends the request of distribution, security mechanism and/or the exception handling of change chip internal resource to described exception processing unit, described exception processing unit judges whether the request of described application processor is legal, if so, described exception processing unit is made response to the request of described application processor.
5. such as each described method of claim 1 to 4, it is characterized in that, described exception processing unit is hardware cell.
6. a chip is characterized in that, comprises the exception processing unit, application processor and the bus system that are arranged on the described chip, wherein,
When described chip in operational process during abnormal, described exception processing unit is used for and will switches to described exception processing unit by the described bus system of described application processor control, described exception processing unit is used for when described chip during at the operational process abnormal, control described bus system, and abnormal conditions are processed;
After described exception processing unit is disposed to abnormal conditions, described exception processing unit also is used for and will switches to described application processor by the described bus system of described exception processing unit control, described application processor is used for controlling described bus system, finishes the normal operation of chip.
7. chip as claimed in claim 6, it is characterized in that, described chip also comprises the abnormality detection unit, described abnormality detection unit is for detection of described chip abnormal whether in operational process, if so, then described abnormality detection unit is used for abnormal conditions are reported described exception processing unit.
8. chip as claimed in claim 6, it is characterized in that, described chip also comprises the bus switch unit, described exception processing unit is used for calling described bus switch unit will switch to described exception processing unit by the bus system of application processor control, described bus switch unit is used for accepting calling of described exception processing unit, will switch to described exception processing unit by the bus system of application processor control; Described exception processing unit is used for calling described bus switch unit will switch to described application processor by the described bus system of described exception processing unit control, described bus switch unit is used for accepting calling of described exception processing unit, will switch to described application processor by the described bus system of described exception processing unit control.
9. chip as claimed in claim 7, it is characterized in that, described exception processing unit also is used for when described chip power resets, to described chip carry out operational mode judgement, initialization, distribution internal resource, security mechanism is set, abnormality detection mechanism is set, in the exception handling one or more is set; Described application processor also is used for sending to described exception processing unit the request of distribution, security mechanism and/or the exception handling of change chip internal resource, described exception processing unit also is used for judging whether the request of described application processor is legal, if so, described exception processing unit is used for response is made in the request of described application processor.
10. such as each described chip of claim 6 to 10, it is characterized in that, described exception processing unit is hardware cell.
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| CN106295362A (en) * | 2016-07-29 | 2017-01-04 | 福州瑞芯微电子股份有限公司 | A kind of chip self-destroying device and method |
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| CN112199687A (en) * | 2020-11-13 | 2021-01-08 | 南开大学 | Chip safety monitoring and self-destruction executing system, method and storage medium |
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| CN102902597B (en) | 2016-01-13 |
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