CN102892225A - Data conversion method and device for flexible light-emitting diode (LED) driver - Google Patents

Data conversion method and device for flexible light-emitting diode (LED) driver Download PDF

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Publication number
CN102892225A
CN102892225A CN2012103415318A CN201210341531A CN102892225A CN 102892225 A CN102892225 A CN 102892225A CN 2012103415318 A CN2012103415318 A CN 2012103415318A CN 201210341531 A CN201210341531 A CN 201210341531A CN 102892225 A CN102892225 A CN 102892225A
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data
parallel
frame
flexible led
address pointer
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CN102892225B (en
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余菲
赵杰
王静霞
刘俐
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Shenzhen Polytechnic
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Shenzhen Polytechnic
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Abstract

The invention relates to a data conversion method for a flexible light-emitting diode (LED) driver. The data conversion method comprises the following steps of: starting work; acquiring frame header data in line with a first protocol; acquiring frame data after the frame header data, and processing the frame data into parallel data; storing the parallel data; reading the parallel data after a certain time delay after the work is started, and converting the parallel data into serial data in line with a second protocol; and outputting the serial data. The invention also relates to a device for implementing the data conversion method of the flexible LED driver. The data conversion method and the data conversion device for the flexible LED driver have the advantages that a wiring distance is long, and a flexible LED is flexibly applied.

Description

A kind of data transfer device of flexible LED driver and device
Technical field
The present invention relates to electronics and communication field, more particularly, relate to a kind of data transfer device and device of flexible LED driver.
Background technology
In recent years, high speed development along with the LED technology, the application scenario of LED is more and more, mainly concentrate on illumination and show two fields of brightening, wherein the technological core of illumination is to design and produce to stablize durable constant-current source chip, and show that brightening is by accepting the data of MCU, with PWM(Pulse Width Modulation, pulse width modulation) mode controls brightness.Wherein show the technology of brightening also as the future development of diversification, comprise the outdoor screen of traditional LED and LED billboard etc., also comprise the flexible LED Display Technique that occurs in recent years.Flexible display technologies is that led controller and chip are assemblied in the FPC(flexible PCB) on, can be arranged in stage, bar, can either make things convenient for and build at any time and carry, also can cause the display effect of curved surface, can also make up the 3D display space with flexible LED rope light, make the three-dimensional display effect.
Greatly expanded range of application and occasion that LED shows although flexible LED shows, the difficulty of practical application has also been arranged.Because traditional LED display controller is assemblied in display screen inside, cable run distance is not long, and the LED display controller of main flow has generally adopted serial port protocol receive data at a high speed, and usually adopts the Manchester's code mode.And flexible LED needs to have very long cable run distance to deacclimatize flexibly application demand usually, and original High Speed Serial agreement cable run distance is inadequate, has greatly limited the application of flexible LED, makes the application of flexible LED dumb.
Summary of the invention
The technical problem to be solved in the present invention is,, flexible LED long for the above-mentioned cable run distance of prior art used inflexible defective, and a kind of cable run distance is long, make the flexible LED driver of flexible LED applying flexible data transfer device and device are provided.
The technical solution adopted for the present invention to solve the technical problems is: construct a kind of data transfer device of flexible LED driver, comprise the steps:
A) start working;
B) obtain the frame head data that meets the first agreement;
C) obtain frame data after the described frame head data and it is processed be parallel data;
D) described parallel data is stored;
Also comprise step:
E) behind the setting-up time of time-delay of starting working, read described parallel data and be converted into the serial data that meets second protocol;
F) with described serial data output.
In the data transfer device of flexible LED driver of the present invention, described step B) further comprise:
B1) judge whether the current level of inputting is low level, in this way, execution in step B2); Otherwise, repeat this step;
B2) whether judge described low duration 〉=88 μ s, in this way, execution in step B3); Otherwise, return step B1);
B3) judge that whether described low level overturns is high level in 1s, in this way, execution in step B4); Otherwise, return step B1);
B4) whether judge described high level lasting time 〉=8 μ s, in this way, execution in step B5); Otherwise, return step B1);
B5) obtain 11 initial code; Each width of described initial code is 4 μ s;
B6) address pointer is resetted and point to first memory cell.
In the data transfer device of flexible LED driver of the present invention, described step C) further comprise:
C1) begin to obtain 11 Frame, judge whether the 1st bit data of described Frame is low level, in this way, execution in step C2); Otherwise, return step B); Each width of described Frame is 4 μ s;
C2) obtain successively the 2nd to the 9th data of described Frame, and be converted into 8 parallel-by-bit data.
In the data transfer device of flexible LED driver of the present invention, described step D) further comprise:
D1) described 8 parallel-by-bit data are latched;
D2) judge successively whether the 10th of described Frame and the 11st data are high level, in this way, described 8 parallel-by-bit data are write in the current address pointer memory cell pointed; Otherwise, return step C1);
D3) described address pointer add 1 and return step C1).
In the data transfer device of flexible LED driver of the present invention, described step C) or step D) circulate at most and carry out 512 times.
In the data transfer device of flexible LED driver of the present invention, described step e) further comprise:
E1) after system powers on, address pointer is resetted and point to first memory cell;
E2) time of delay 1ms;
E3) send synchronizing signal, make described flexible LED driver synchronous;
E4) read 8 parallel-by-bit data in the current address pointer memory cell pointed and latching;
E5) described 8 parallel-by-bit data are split, and carry out the transmission of Manchester's code transformed into serial data;
E6) described address pointer adds 1, returns step e 4).
The invention still further relates to a kind of device of realizing the data transfer device of above-mentioned flexible LED driver, comprising:
Ready module: be used for starting working;
Frame head data acquisition module: be used for obtaining the frame head data that meets the first agreement;
Frame data are obtained and modular converter: be used for obtaining the frame data after the described frame head data and it is processed and be parallel data;
Data memory module: be used for described parallel data is stored;
Also comprise:
Data read and modular converter: be used for reading described parallel data and being converted into the serial data that meets second protocol behind the setting-up time of time-delay of starting working;
Data outputting module: be used for described serial data output.
In the device of the data transfer device of the above-mentioned flexible LED driver of realization of the present invention, described frame head data acquisition module further comprises:
Low level judging unit: be used for judging whether the current level of input is low level;
Low duration judging unit: be used for whether judging described low duration 〉=88 μ s, and when low duration<88 μ s, return;
Low level upset judging unit: be used for judging that whether described low level overturns is high level in 1s, and when upset, return;
High level lasting time judging unit: be used for whether judging described high level lasting time 〉=8 μ s, and when high level lasting time<8 μ s, return;
Initial code is obtained the unit: be used for obtaining 11 initial code; Each width of described initial code is 4 μ s;
Address pointer reset unit: be used for address pointer being resetted and pointing to first memory cell.
In the device of the data transfer device of the above-mentioned flexible LED driver of realization of the present invention, described frame data are obtained and modular converter further comprises:
Frame data are obtained and the low level judging unit: be used for beginning to obtain 11 frame data, judge whether the 1st bit data of described Frame is low level; Each width of described Frame is 4 μ s;
Parallel data converting unit: be used for obtaining successively the 2nd to the 9th data of described Frame, and be converted into 8 parallel-by-bit data.
In the device of the data transfer device of the above-mentioned flexible LED driver of realization of the present invention, described data memory module further comprises:
Parallel data latch units: be used for described 8 parallel-by-bit data are latched;
Parallel data writing unit: be used for judging whether the 10th of described Frame and the 11st data are high level, in this way, described 8 parallel-by-bit data are write in the current address pointer memory cell pointed successively;
Address pointer adds 1 and return the unit: be used for making described address pointer to add 1 and return.
Implement data transfer device and the device of flexible LED driver of the present invention, has following beneficial effect: be parallel data because the frame data that will meet the first agreement are processed, described parallel data is converted to the serial data that meets second protocol to be sent, because the first agreement cable run distance is longer, second protocol is shorter for agreement and cable run distance commonly used, convert parallel data to by the serial data that will meet in the long frame data of cable run distance, the parallel data regulation that splits to meet the shorter second protocol of cable run distance is carried out serial and is sent the most at last, thereby make its cable run distance longer, make the applying flexible of flexible LED.
Description of drawings
Fig. 1 is the data transfer device of flexible LED driver of the present invention and installs the flow chart of method among the embodiment;
Fig. 2 is the particular flow sheet of obtaining the frame head data that meets the first agreement among the described embodiment;
Fig. 3 obtains the frame data after the frame head data and it is processed the particular flow sheet that is parallel data among the described embodiment;
Fig. 4 is the particular flow sheet of among the described embodiment parallel data being stored;
Fig. 5 is the particular flow sheet that reads parallel data among the described embodiment behind the setting-up time of time-delay of starting working and be converted into the serial data that meets second protocol;
Fig. 6 is the structural representation of the device of the data transfer device of realization flexible LED driver among the described embodiment;
Fig. 7 is the structural representation of frame head data acquisition module among the described embodiment;
Fig. 8 is that frame data are obtained and the structural representation of modular converter among the described embodiment;
Fig. 9 is the structural representation of data memory module among the described embodiment.
Embodiment
Can understand and implement the present invention for the ease of those of ordinary skill in the art, embodiments of the present invention is further illustrated below in conjunction with accompanying drawing.
In the data transfer device of flexible LED driver of the present invention and device embodiment, the flow chart of its method as shown in Figure 1, the method comprises the steps:
Step S11 starts working: in this step, and everything in readiness, system starts working.
Step S12 obtains the frame head data that meets the first agreement: will meet certain rule during transfer of data, such as: DMX512 agreement (Digital Multipiex, the digital multiplex agreement), the first agreement in the present embodiment adopts the standard DMX512 agreement of light of stage control field.The DMX512 agreement is (the United States Institute for Theater Technology of U.S. arenas technological associations, USITT) the digital multiplex agreement of formulating, it is a digital dimming agreement, can carry out digital control to dimmer and other the control appliance in the places such as stage, arenas, studio, the RS485 transceiver is adopted in the design of its physical layer, and bus realizes joining of Control Console and dimmer with a pair of twisted-pair feeder.The RS485 transceiver adopts balance to send and differential received, and receiving sensitivity is high, and jamproof ability is strong, and signal transmission distance can reach km.The transmission of DMX512 agreement regulation control signal packet is undertaken by the mode of asynchronous communication.The transmission of packet will meet certain form and sequential requirement.Certainly, in the other situation, the first agreement also can be the agreement of other cable run distances long (signal transmission distance reaches hundreds of rice or km).In this step, obtaining the frame head data that meets the first agreement (being the DMX512 agreement in the present embodiment), about how specifically obtaining the frame head data that meets the first agreement (being the DMX512 agreement in the present embodiment), seeing also Fig. 2, also can be described after a while.
Step S13 obtains the frame data after the frame head data and it is processed and is parallel data: according to the regulation of the first agreement (DMX512 agreement), be frame data after the frame head data, frame data comprise a plurality of Frames, but comprise at most 512 Frames.In this step, obtain the frame data after the frame head data and it is processed and be parallel data.Be parallel data about how specifically to obtain the frame data after the frame head data and it is processed, see also Fig. 3, also can be described after a while.
Step S14 stores above-mentioned parallel data: in the present embodiment, parallel data will be stored before sending.In this step, above-mentioned parallel data is stored.About how specifically above-mentioned parallel data to be stored, see also Fig. 4, also can be described after a while.
Step S15 reads above-mentioned parallel data and is converted into the serial data that meets second protocol behind the setting-up time of time-delay of starting working: in this step, read above-mentioned parallel data signal and be converted into the serial data that meets second protocol behind the setting-up time of time-delay of starting working.In the present embodiment, preseted a delay time (setting-up time), system's time-delay of starting working is carried out read operation behind a setting-up time.Certainly, the value of setting-up time can adjust accordingly according to concrete needs.That is to say, the read operation in the storage operation among the above-mentioned steps S14 (being write operation) and this step be asynchronous be separate, read-write operation may carry out simultaneously, also may have sequencing, specifically the value by predefined delay time decides.The conflict that occurs about how solving read-write operation has description after a while.In this step, when data send, above-mentioned parallel data transformed into serial data to be sent, above-mentioned serial data will meet certain rule when sending, for example: the High Speed Serial agreement, because the LED display controller of main flow generally adopts High Speed Serial agreement receive data, and usually adopts the Manchester's code mode.Therefore, in the present embodiment, second protocol has adopted the High Speed Serial agreement of Manchester's code.Manchester's code is by Thomas the earliest, and the people such as Tanenbaum proposed in 1949, after see the 802.4 bus protocol standards of IEEE.Most typical being applied on the 1553B bus structures, its bus speed can be up to 1Mbit/s, Manchester's code employing saltus step represents " 1 " or " 0 " in NRZ (Not Return to Zero, the NRZ) coding, has good anti-interference and higher transmission speed.In the present embodiment, the LED display driver chip adopts common TLS3001 chip, and the TLS3001 chip adopts the serial port protocol of Manchester's code to carry out communication usually.About how specifically behind the setting-up time of time-delay of starting working, to read above-mentioned parallel data and to be converted into the serial data that meets second protocol, see also Fig. 5, also can be described after a while.
Step S16 exports above-mentioned serial data: after above-mentioned steps S15 obtains meeting the serial data of second protocol, in this step, with above-mentioned serial data output.Specifically export serial data to follow-up display driver chip exactly luminous in order to drive flexible LED rope light.
For the present embodiment, the above-mentioned step that obtains the frame head data that meets the first agreement specifically as shown in Figure 2, it comprises:
Step S201 judges whether the current level of input is low level: in this step, judge whether the current level of input is low level, if the result who judges is yes, namely the current level of input is low level, then execution in step S202; Otherwise if the result who judges is no, namely the current level of input is not low level signal, then repeats this step.
Whether step S202 judges above-mentioned low duration 〉=88 μ s: if the judged result of above-mentioned steps S201 is yes, then carry out this step.In this step, whether judge above-mentioned low duration 〉=88 μ s, if the result who judges is yes, execution in step S203; If the result who judges is no, return step S201.
Step S203 judges that whether low level overturns is high level in 1s: if the judged result of above-mentioned steps S202 is yes, then carry out this step.In this step, judge low level whether in 1s upset be high level, also namely whether judge low duration<1s, if the result who judges is yes, execution in step S204 then; If the result who judges is no, then return step S201.It is worth mentioning that, in this step, judge low level whether in 1s upset for the purpose of high level be exactly for whether judge low duration 〉=88 μ s and<1s, only have when 88 μ s≤low durations<1s, at this moment the corresponding data-signal of low level is only effectively.Regulation according to the DMX512 agreement, can tell the first frame data in order to make receiver, each packet is take a low level signal that is not shorter than 88us as initial signal, be referred to as the break signal, in the present embodiment, the corresponding data-signal of above-mentioned low level is referred to as the break signal.According to the DMX512 protocol requirement, the break signal should be to be longer than 88us and less than the signal of 1s.Therefore, at first " rising edge " and " trailing edge " of signal detected, the time between trailing edge and the rising edge is carried out the timing.Can adopt the 1us(preferred) clock timing, if clock count surpasses 88 and less than 10 6, assert that then the break signal is effective, illustrate and receive the break signal.Usually, the break signal is more conducive to sending and receiving greater than 88 μ s, and in the present embodiment, the effect of its sending and receiving is better when the break signal is 120 μ s.
Whether step S204 judges above-mentioned high level lasting time 〉=8 μ s: if the judged result of above-mentioned steps S203 is yes, then carry out this step, whether judge above-mentioned high level lasting time 〉=8 μ s.In this step, if the result who judges is yes, execution in step S205 then; If the result who judges is no, then return step S201.It is worth mentioning that, regulation according to the DMX512 agreement, and then be that the high level signal that is not shorter than 8 μ s is MAB signal (mark after break) after the break signal, adopt 0.1 us(preferred) clock timing, reach 80 clock cycle if can continue timing, illustrate that then MAB receives, in the present embodiment, the corresponding data-signal of above-mentioned high level is referred to as the MAB signal.In the present embodiment, the MAB signal is set to 12 μ s usually.
Step S205 obtains 11 initial code; Each width of above-mentioned initial code is 4 μ s: in this step, obtain 11 initial code; Each width of above-mentioned initial code is 4 μ s.In the present embodiment, initial code is right after after the MAB signal, initial code comprises 11, in the DMX512 agreement, be the DMX512 packet after the MAB signal, first Frame is called SC(start code in the DMX512 packet, initial code), stipulate that in the DMX512 agreement it is zero, but its concrete value can be set in actual applications to transmit particular message, namely the SC signal content can be expanded according to demand.DMX512 has stipulated that the signal data transfer rate is 250 kbps, and the every bit width of Frame is 4 μ s, and sending frame data needs 44 μ s.In the present embodiment, above-mentioned 11 initial code is the SC signal, the SC signal is the data of 11 clock cycle (when frequency is 250 kHz).It is worth mentioning that, for convenience of description, the frame head data in the present embodiment not only comprises above-mentioned break signal and MAB signal, also comprises the SC signal.
Step S206 resets address pointer and points to first memory cell: when data are stored, store in order in order to make each data, in this step, address pointer is resetted and point to first memory cell, so that follow-up storage data.
For the present embodiment, above-mentioned obtain after the frame head data frame data and to its process be parallel data step specifically as shown in Figure 3, it comprises the steps:
Step S301 begins to obtain 11 Frame, judges whether the 1st of above-mentioned Frame is low level: according to the regulation of DMX512 agreement, a DMX512 packet comprises initial code and 512 Frames.The form of Frame is identical with SC signal format, and when frequency was 250 kHz, it was the data of 11 clock cycle.But in actual applications, the number of Frame also might be less than 512, but the number of Frame is 512 to the maximum.According to the regulation of DMX512 agreement, the 1st of Frame is start bit (low level).The appearance of start bit impels and begins after a while receive data.In this step, begin to obtain 11 Frame, judge whether the 1st bit data of Frame is low level; Each width of above-mentioned Frame is 4 μ s.In this step, if the result who judges is yes, execution in step S302 then; If the result who judges is no, then return step S12.
Step S302 obtains the 2nd to the 9th data of above-mentioned Frame successively, be converted into 8 parallel-by-bit data: in this step, obtain successively the 2nd to the 9th data of above-mentioned Frame, be converted into 8 parallel-by-bit data, also be about to 8 Bits Serial data and be converted to 8 parallel-by-bit data, when reading and writing with 8 parallel-by-bit data as one group of data.
For the present embodiment, the above-mentioned step that parallel data is stored specifically as shown in Figure 4, it comprises the steps:
Step S401 latchs above-mentioned 8 parallel-by-bit data: in this step, above-mentioned 8 parallel-by-bit data are latched.In the present embodiment, for 8 parallel-by-bit data are latched, be provided with 8 d type flip flops, 8 parallel-by-bit data are deposited in 8 d type flip flops successively.In the present embodiment, d type flip flop is edging trigger.
Step S402 judges successively whether the 10th of Frame and the 11st data are high level: according to the regulation of DMX512 agreement, the last two bits of 11 Frame (being the 10th and the 11st data of Frame) is position of rest, and above-mentioned position of rest is high level; Above-mentioned position of rest has the sufficient time to process the data that receive after can making receive data; Position of rest is high level, and after the position of rest, the start bit of next 11 bit data frames just can be detected like this.Above-mentioned start bit and position of rest are exactly to be used for making sending and receiving synchronous in fact.In this step, judge successively whether the 10th of Frame and the 11st data are high level, if the result who judges is yes, execution in step S403; If the result who judges is no, then return step S301.
Step S403 writes above-mentioned 8 parallel-by-bit data in the current address pointer memory cell pointed: in this step, when position of rest (Frame the 10th and the 11st) arrives, 8 parallel-by-bit data are write (in the memory cell among the RAM) in the current address pointer memory cell pointed as one group of data.
Step S404 address pointer adds 1: after one group of 8 parallel-by-bit data stored, organize 8 parallel-by-bit data for the ease of next and store, then carry out this step, address pointer adds 1, makes address pointer point to next memory cell.It is worth mentioning that, execute this step, return step S301.
It is worth mentioning that, because the number of Frame is 512 to the maximum, then the implementation maximum capable of circulation execution of above-mentioned steps S301 to step S302 or step S401 to step S404 are 512 times; In other words, step S301 is to the maximum execution capable of circulation of implementation of step S302 512 times, and step S401 is to the maximum execution capable of circulation of implementation of step S404 512 times.
For the present embodiment, the above-mentioned step that behind the setting-up time of time-delay of starting working, reads parallel data and be converted into the serial data that meets second protocol specifically as shown in Figure 5, it comprises:
After step S501 system powers on, address pointer is resetted and point to first memory cell: for follow-up sequencing by memory cell is read the content in the different memory cell, in this step, after system powers on, address pointer is resetted and point to first memory cell, at first read from first memory cell when being convenient to reading out data.
Step S502 1ms time of delay: power on and after address pointer resets in system, in this step, time of delay 1ms.
Step S503 sends synchronizing signal, makes above-mentioned flexible LED driver synchronous: in this step, send synchronizing signal, make above-mentioned flexible LED driver synchronous.Because a plurality of led drivers are connected, synchronous when receiving signal in order to make above-mentioned a plurality of led driver, so send synchronizing signal in order to achieve the above object.It is worth mentioning that, will delay time a period of time after sending synchronizing signal, doing like this is in order to make each led driver can both accurately detect the baud rate of communication.Above-mentioned delay time will satisfy condition: delay time (us)〉(the led driver quantity ÷ communication ripple rate (MHz) * 30 of connection).
Step S504 reads 8 parallel-by-bit data in the current address pointer memory cell pointed and latchs: in this step, read 8 parallel-by-bit data in the current address pointer memory cell pointed and latch.What store in each memory cell is 8 parallel-by-bit data, read 8 parallel-by-bit data in the current address pointer memory cell pointed after, it is deposited in other 8 d type flip flops.It is worth mentioning that, 8 valid data (8 parallel-by-bit data) are front whenever being ready for sending, and the data in all can reading cells are to above-mentioned other 8 d type flip flops.It is worth mentioning that, in the time the operation of 8 parallel-by-bit data write storage units will being clashed with the operation of reading 8 parallel-by-bit data from memory cell, design one in the present embodiment and read Seize ACK message, this read Seize ACK message effectively after, after guaranteeing that current occurent write operation (with the operation of 8 parallel-by-bit data write storage units) is finished once, just initiate real read operation (from memory cell, reading the operation of 8 parallel-by-bit data).If reading to take effective the time, write request is temporary, initiate again write operation after waiting read operation to finish, solved like this problem that write operation conflicts with read operation.
Step S505 splits above-mentioned 8 parallel-by-bit data, and carry out the transmission of Manchester's code transformed into serial data: in order to send the data that meet second protocol (High Speed Serial agreement), need above-mentioned 8 parallel-by-bit data (one group of data) are split, and carry out the transmission of Manchester's code transformed into serial data.The mode of the data Manchester's code sends, and with the 2M clock this 8 bit data is carried out Manchester's code, and from high to low saltus step of signal represents " 1 ", and from low to high saltus step represents " 0 ", sends according to the speed of 1M.It is worth mentioning that, before 8 valid data in sending first memory cell, at first Manchester's code is carried out with the 2M clock in 15 " 1 " and " 0010 ", from high to low saltus step of signal represents " 1 ", from low to high saltus step represents " 0 ", sends according to the speed of 1M.It is worth mentioning that, in the present embodiment, the time remaining that sends data enters reset mode (being that address pointer resets) after 3 seconds.Certainly, in the other situation of the present embodiment, the time that is forwarded to reset mode by the state that sends data can be set according to actual conditions.
Step S506 address above mentioned pointer adds 1: when finishing 8 valid data transmissions, need address pointer to add 1, prepare to read next time the content (8 valid data) in next memory cell.It is worth mentioning that, execute this step, return step S504.
The present embodiment also relates to a kind of device of realizing the data transfer device of above-mentioned flexible LED driver, its structural representation as shown in Figure 6, this device comprises ready module 1, frame head data acquisition module 2, frame data are obtained and modular converter 3, data memory module 4, data read and modular converter 5 and data outputting module 6; Wherein, ready module 1 is used for starting working; Frame head data acquisition module 2 is used for obtaining the frame head data that meets the first agreement; Frame data are obtained and modular converter 3 is used for obtaining the frame data after the frame head data and it is processed and is parallel data; Data memory module 4 is used for described parallel data is stored; Data read and modular converter 5 is used for reading parallel data and being converted into the serial data that meets second protocol behind the setting-up time of time-delay of starting working; Data outputting module 6 is used for serial data is exported.
As shown in Figure 7, in the present embodiment, above-mentioned frame head data acquisition module 2 comprises that further low level judging unit 21, low duration judging unit 22, low level upset judging unit 23, high level lasting time judging unit 24, initial code obtain unit 25 and address pointer reset unit 26; Wherein, low level judging unit 21 is used for judging whether the current level of input is low level; Low duration judging unit 22 is used for whether judging low duration 〉=88 μ s, and returns when low duration<88 μ s; Low level upset judging unit 23 is used for judging that whether low level overturns is high level in 1s, and returns when upset; High level lasting time judging unit 24 is used for whether judging high level lasting time 〉=8 μ s, and returns when high level lasting time<8 μ s; Initial code is obtained unit 25 and is used for obtaining 11 initial code; Each width of above-mentioned initial code is 4 μ s; Address pointer reset unit 26 is used for address pointer being resetted and pointing to first memory cell.
As shown in Figure 8, in the present embodiment, above-mentioned frame data are obtained and modular converter 3 comprises that further frame data are obtained and low level judging unit 31 and parallel data converting unit 32; Wherein, frame data are obtained and low level judging unit 31 is used for beginning to obtain 11 Frame, judge whether the 1st bit data of Frame is low level; Each width of above-mentioned Frame is 4 μ s; Parallel data converting unit 32 is used for obtaining successively the 2nd to the 9th data of Frame, and is converted into 8 parallel-by-bit data.
As shown in Figure 9, in the present embodiment, above-mentioned data memory module 4 comprises that further parallel data latch units 41, parallel data writing unit 42 and address pointer add 1 and return unit 43; Wherein, parallel data latch units 41 is used for 8 parallel-by-bit data are latched; Parallel data writing unit 42 is used for judging whether the 10th of Frame and the 11st data are high level, in this way, 8 parallel-by-bit data are write in the current address pointer memory cell pointed successively; Address pointer adds 1 and return unit 43 and be used for making address pointer to add 1 and return.
In a word, in the present embodiment, process by the frame data that will meet the first agreement (the standard DMX512 agreement of light of stage control field) and to be parallel data, parallel data is converted to the serial data that meets second protocol (High Speed Serial agreement) to be sent, because the first agreement cable run distance is longer, second protocol is shorter for agreement and cable run distance commonly used, convert parallel data to by the serial data that will meet in the long frame data of cable run distance, the parallel data regulation that splits to meet the shorter second protocol of cable run distance is carried out serial and is sent the most at last, thereby make its cable run distance longer, make the applying flexible of flexible LED.
The above embodiment has only expressed several execution mode of the present invention, and it describes comparatively concrete and detailed, but can not therefore be interpreted as the restriction to claim of the present invention.Should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection range of patent of the present invention should be as the criterion with claims.

Claims (10)

1. the data transfer device of a flexible LED driver is characterized in that, comprises the steps:
A) start working;
B) obtain the frame head data that meets the first agreement;
C) obtain frame data after the described frame head data and it is processed be parallel data;
D) described parallel data is stored;
Also comprise step:
E) behind the setting-up time of time-delay of starting working, read described parallel data and be converted into the serial data that meets second protocol;
F) with described serial data output.
2. the data transfer device of flexible LED driver according to claim 1 is characterized in that, described step B) further comprise:
B1) judge whether the current level of inputting is low level, in this way, execution in step B2); Otherwise, repeat this step;
B2) whether judge described low duration 〉=88 μ s, in this way, execution in step B3); Otherwise, return step B1);
B3) judge that whether described low level overturns is high level in 1s, in this way, execution in step B4); Otherwise, return step B1);
B4) whether judge described high level lasting time 〉=8 μ s, in this way, execution in step B5); Otherwise, return step B1);
B5) obtain 11 initial code; Each width of described initial code is 4 μ s;
B6) address pointer is resetted and point to first memory cell.
3. the data transfer device of flexible LED driver according to claim 2 is characterized in that, described step C) further comprise:
C1) begin to obtain 11 Frame, judge whether the 1st bit data of described Frame is low level, in this way, execution in step C2); Otherwise, return step B); Each width of described Frame is 4 μ s;
C2) obtain successively the 2nd to the 9th data of described Frame, and be converted into 8 parallel-by-bit data.
4. the data transfer device of flexible LED driver according to claim 3 is characterized in that, described step D) further comprise:
D1) described 8 parallel-by-bit data are latched;
D2) judge successively whether the 10th of described Frame and the 11st data are high level, in this way, described 8 parallel-by-bit data are write in the current address pointer memory cell pointed; Otherwise, return step C1);
D3) described address pointer add 1 and return step C1).
5. according to claim 3 or the data transfer device of 4 described flexible LED drivers, it is characterized in that described step C) or step D) at most circulation carry out 512 times.
6. the data transfer device of the described flexible LED driver of any one is characterized in that according to claim 1-4, described step e) further comprise:
E1) after system powers on, address pointer is resetted and point to first memory cell;
E2) time of delay 1ms;
E3) send synchronizing signal, make described flexible LED driver synchronous;
E4) read 8 parallel-by-bit data in the current address pointer memory cell pointed and latching;
E5) described 8 parallel-by-bit data are split, and carry out the transmission of Manchester's code transformed into serial data;
E6) described address pointer adds 1, returns step e 4).
7. a device of realizing the data transfer device of flexible LED driver as claimed in claim 1 is characterized in that, comprising:
Ready module: be used for starting working;
Frame head data acquisition module: be used for obtaining the frame head data that meets the first agreement;
Frame data are obtained and modular converter: be used for obtaining the frame data after the described frame head data and it is processed and be parallel data;
Data memory module: be used for described parallel data is stored;
Also comprise:
Data read and modular converter: be used for reading described parallel data and being converted into the serial data that meets second protocol behind the setting-up time of time-delay of starting working;
Data outputting module: be used for described serial data output.
8. the device of the data transfer device of realization flexible LED driver according to claim 7 is characterized in that, described frame head data acquisition module further comprises:
Low level judging unit: be used for judging whether the current level of input is low level;
Low duration judging unit: be used for whether judging described low duration 〉=88 μ s, and when low duration<88 μ s, return;
Low level upset judging unit: be used for judging that whether described low level overturns is high level in 1s, and when upset, return;
High level lasting time judging unit: be used for whether judging described high level lasting time 〉=8 μ s, and when high level lasting time<8 μ s, return;
Initial code is obtained the unit: be used for obtaining 11 initial code; Each width of described initial code is 4 μ s;
Address pointer reset unit: be used for address pointer being resetted and pointing to first memory cell.
9. according to claim 7 or the device of the data transfer device of 8 described realization flexible LED drivers, it is characterized in that, described frame data are obtained and modular converter further comprises:
Frame data are obtained and the low level judging unit: be used for beginning to obtain 11 frame data, judge whether the 1st bit data of described Frame is low level; Each width of described Frame is 4 μ s;
Parallel data converting unit: be used for obtaining successively the 2nd to the 9th data of described Frame, and be converted into 8 parallel-by-bit data.
10. the device of the data transfer device of realization flexible LED driver according to claim 9 is characterized in that, described data memory module further comprises:
Parallel data latch units: be used for described 8 parallel-by-bit data are latched;
Parallel data writing unit: be used for judging whether the 10th of described Frame and the 11st data are high level, in this way, described 8 parallel-by-bit data are write in the current address pointer memory cell pointed successively;
Address pointer adds 1 and return the unit: be used for making described address pointer to add 1 and return.
CN201210341531.8A 2012-09-14 2012-09-14 A kind of data transfer device of flexible LED driver and device Expired - Fee Related CN102892225B (en)

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