CN101916543B - Data communication method of LED display system - Google Patents
Data communication method of LED display system Download PDFInfo
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- CN101916543B CN101916543B CN2010102209051A CN201010220905A CN101916543B CN 101916543 B CN101916543 B CN 101916543B CN 2010102209051 A CN2010102209051 A CN 2010102209051A CN 201010220905 A CN201010220905 A CN 201010220905A CN 101916543 B CN101916543 B CN 101916543B
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Abstract
The invention discloses a data communication method of an LED display system, which adopts a single-line bus for realizing data communication. The method comprises data full-receiving communication and/or data serial-receiving communication, wherein the timing sequence of the data full-receiving communication sent out by an LED controller sequentially comprises a resetting timing sequence, a resetting end timing sequence, a full-receiving instruction timing sequence, a starting address timing sequence, an M-effective data timing sequence, an end mark timing sequence and a resetting timing sequence; and the timing sequence of the data serial-receiving communication sent out by the LED controller sequentially comprises a resetting timing sequence, a resetting end timing sequence, a serial-receiving instruction timing sequence, a starting address timing sequence, an L-effective data timing sequence and a resetting timing sequence. The data communication method in the invention has the advantages of high communication efficiency, flexible control and good synchronization effect.
Description
Technical field
The present invention relates to the LED display technique, particularly a kind of data communications method that adopts the LED display system of single bus realization.
Background technology
Present stage, the application of LED display technique is more and more universal, and the LED display system that extensively exists at present is as shown in Figure 1, comprises the LED cell board that a led controller and several rows are connected in series successively;
The LED cell board comprises the BUFFER circuit of an enhancing signal driving force, decoding scheme, several switching tubes and several led drive circuit that produces dynamic reading scan sequential;
The signal of communication that led controller sends is as shown in Figure 2; Comprise sweep signal (SCANI), enable signal (ENI), latch signal (LATI), clock signal (CLKI), data-signal (DIN), the sweep signal that led controller sends, enable signal, latch signal, clock signal the BUFFER circuit of the LED cell board of each serial connection of process successively drive the output of enhancing back;
Sweep signal (SCANO) in each LED cell board after the BUFFER circuit strengthens offers the decoding scheme of this LED cell board, and decoding scheme decoding produces dynamic reading scan sequential control switching tube;
Enable signal (ENO), latch signal (LATO), clock signal (CLKO) in each LED cell board after the BUFFER circuit strengthens offer all led drive circuits in this LED cell board respectively;
The data-signal that led controller sends (DIN) offers the BUFFER circuit of first LED cell board; After driving enhancing, export to first led drive circuit data-signal input end (Din) of first LED cell board; Data-signal is through each led drive circuit of first LED cell board, and under clock signal control, exported to the data-signal input end (Din) of next led drive circuit by the internal displacement register; Similarly; The BUFFER circuit of each LED cell board after this obtains data-signal from a last LED cell board that is connected in series with it; Data-signal is exported to the data-signal input end (Din) of first led drive circuit of this LED cell board after the BUFFER drives strengthens; Data-signal is through each led drive circuit of this LED cell board; And under clock signal control, export to the data-signal input end (Din) of the next led drive circuit of this LED cell board by the internal displacement register, the data-signal of last led drive circuit of this LED cell board is exported to the BUFFER circuit of next LED cell board; The output of the data of last led drive circuit is unsettled on last LED cell board.
In the above-mentioned LED display system, led controller needs multi-way control signals could realize the control to the LED cell board, and wiring is complicated.
In order to overcome the shortcoming of LED display system shown in Figure 1; Application number is series-connected communication system and the communication means that 200910099888.8 patent of invention has proposed a kind of led drive circuit and formation thereof; This series-connected communication system is as shown in Figure 3, and only to need a delivery outlet of LED control circuit be a large amount of led drive circuits of may command, and cost is lower, wiring is simple, antijamming capability is strong.
Summary of the invention
The present invention is intended to further the data communications method of LED display system shown in Figure 3 is described.
A kind of communication means of LED display system, wherein the LED display system comprises: led controller and L level led driver;
Said led controller comprises an output communication port;
Said led driver comprises an input communication port, an output communication port;
Led controller output communication port connects first order led driver input communication port; First order led driver output communication port serial connection second level led driver input communication port; By that analogy, previous stage led driver output communication port is connected in series led driver input communication port at the corresponding levels, led driver output communication port serial connection next stage led driver input communication port at the corresponding levels; L level led driver is connected in series successively, and afterbody led driver output communication port is unsettled;
Said led driver; Comprise a communication pattern register: the communication pattern register is at two states: direct mode operation and non-direct mode operation; When being in direct mode operation, the sequential that led driver receives the input communication port sends to led driver output communication port simultaneously; When being in non-direct mode operation, led driver produces the output of its output communication port according to the instruction that receives.
Said led driver also comprises a storer, is used to store control information and the display message that led controller is issued led driver.
The data communications method of above-mentioned LED display system is to comprise data full charge communication and/or data string receiving communication:
Led controller sends data to L level led driver; L level led driver is inserted the designated memory space of all led drivers according to instruction with the data sync that receives; Realize the data full charge communication, the data full charge communication sequential that led controller sends is made up of following sequential successively: reset timing, reset and finish sequential, receive instruction sequencing, start address sequential, a M valid data sequential, end mark sequential, reset timing entirely;
Said M valid data sequential is made up of M continuous effective data time sequence.
Led controller sends data to L level led driver; L level led driver receives the data that led controller sends successively according to instruction; And the data that receive are inserted the designated memory space of each led driver; Realization data string receiving communication, the data string receiving communication sequential that led controller sends is made up of following sequential successively: reset timing, reset and finish sequential, closed string instruction sequencing, start address sequential, a L valid data frame sequential, reset timing.
Said L valid data frame sequential is made up of L continuous valid data frame sequential, and valid data frame sequential is made up of a N continuous valid data sequential and 1 end mark sequential;
The 1st grade of led driver receives the 1st the valid data frame sequential that belongs to this led driver from led controller; The data that receive are inserted designated memory space; And when receiving the 1st valid data frame sequential; To the invalid sequential of its output communication port synchronized transmission, after this continue to send the 2nd to L valid data frame sequential and reset timing to its output communication port;
The 2nd grade of led driver receives the sequential of the output communication port transmission of the 1st grade of led driver; Parsing belongs to the 2nd valid data frame sequential of this led driver and the data that receive is inserted designated memory space; And when receiving the 2nd valid data frame sequential; To the invalid sequential of its output communication port synchronized transmission, after this continue to send the 3rd to L valid data frame sequential and reset timing to its output communication port;
The rest may be inferred; N level led driver receives the sequential of the output communication port transmission of n-1 level led driver; Parsing belongs to n valid data frame sequential of this led driver and the data that receive is inserted designated memory space; And when receiving n valid data frame sequential,, after this continue to send n+1 to the L valid data frame sequential and reset timing to its output communication port to the invalid sequential of its output communication port synchronized transmission.
Reset timing (RESET), its function are that the led driver that receives reset timing is accomplished reset function, and the communication pattern register of led driver is set to direct mode operation;
After the end sequential (RESET_END) that resets can only be used in reset timing; The end that resets of its functional representation;
The full instruction sequencing (IR_RX_ALL) of receiving is used to represent that this time communication is the data full charge communication;
Closed string instruction sequencing (IR_RX_S) is used to represent that this time communication is data string receiving communication;
Start address sequential (ADDS) is used for the start address of the data of presentation directives's needs transmission in the led driver storer corresponding address space that receives this sequential;
Valid data sequential (Data) is used for the data that presentation directives's needs transmit;
End mark sequential (END), led driver receive that the current valid data sequential of end mark byte representation finishes;
Invalid sequential (Noneffect), this byte can be inserted in reset finish sequential, when receiving instruction sequencing, closed string instruction sequencing, start address entirely, after valid data sequential or the end mark sequential, led driver is received invalid sequential, is left intact.
After the LED display system that single bus is realized powers on, carry out initialize communications, the steps include:
(1) led controller sends L reset timing at least, after the 1st grade of led driver receives reset timing, the communication pattern register is changed to direct mode operation, and the 1st grade of led driver sends to the output communication port simultaneously with the sequential that receives;
After (2) the 2nd grades of led drivers receive reset timing, the communication pattern register is changed to direct mode operation, the 2nd grade of led driver sends to the output communication port simultaneously with the sequential that receives; The rest may be inferred; After led drivers at different levels are received the reset timing of previous stage led driver; The communication pattern register is changed to direct mode operation, and the sequential that receives is sent to the output communication port simultaneously, all the communication pattern register is changed to direct mode operation up to all led drivers.
The communication steps of said data full charge communication is:
(1) the LED display system of single bus realization is carried out after the initialize communications, and the communication pattern register of each led driver is set to direct mode operation;
(2) led controller sends reset timing in regular turn, resets and finish sequential, receive instruction sequencing, start address sequential, a M valid data frame sequential, end mark sequential, reset timing entirely;
(3) the 1st grade of led driver receives reset timing synchronously, resets and finish sequential, receive instruction sequencing, start address sequential, a M valid data frame sequential, end mark sequential, reset timing entirely when carrying out step (2).
(4) because the communication pattern register of each led driver is set to direct mode operation; When carrying out step (2); N level led driver receives reset timing that n-1 level driver passes in regular turn, resets and finish sequential, receive instruction sequencing, start address sequential, a M valid data frame sequential, end mark sequential, reset timing entirely from the output communication port of n-1 level led driver synchronously, and n is greater than 1 integer less than L-1.
When led drivers at different levels received the start address sequential, led drivers at different levels received and resolve the start address sequential, prepared to receive M valid data sequential;
When led drivers at different levels receive M valid data sequential, resolve M valid data sequential, storage address is added up, and M valid data are put into the start address successively is the storage space of first address.
The communication steps of said data string receiving communication is:
(1) the LED display system of single bus realization is carried out after the initialize communications, and the communication pattern register of each led driver is set to direct mode operation;
(2) led controller sends reset timing in regular turn, resets and finish sequential, closed string instruction sequencing, start address sequential;
(3) when carrying out step (2); Because the communication pattern register of each led driver is set to direct mode operation; Led drivers at different levels receive reset timing synchronously, reset and finish sequential, closed string instruction sequencing, start address sequential, and led drivers at different levels separately communication pattern register after receiving the start address sequential is set to non-direct mode operation;
(4) led controller sends the 1st to L valid data frame sequential, reset timing in regular turn;
(5) when carrying out step (4); The 1st grade of led driver receives led controller successively and sends L valid data frame sequential; And resolve the 1st valid data frame sequential; It is the storage space of first address that N valid data in the 1st the valid data frame sequential are put into the start address successively, and storage address is added up; In receiving the 1st valid data frame sequential successively in N valid data sequential and the end mark sequential; The 1st grade of led driver sends N+1 invalid sequential successively and gives the 2nd grade of led driver to the output communication port; Because the 2nd grade of communication register to L level led driver be in non-direct mode operation, the 2nd grade receives N+1 invalid sequential synchronously successively to L level led driver; When the 1st grade of led driver receives the 1st end mark sequential in the valid data frame sequential; The communication pattern register of the 1st grade of led driver is set to direct mode operation, and the 2nd to L valid data frame sequential, the reset timing that while the 1st grade of led driver sends led controller sends to the output communication port of the 1st grade of led driver in regular turn;
(6) the 2nd grades of led drivers receive the 2nd to L the valid data frame sequential that the 1st grade of led driver sends successively; And resolve the 2nd valid data frame sequential; It is the storage space of first address that N valid data in the 2nd the valid data frame sequential are put into the start address successively, and storage address is added up; In receiving the 2nd valid data frame sequential successively in N valid data and the end mark sequential; The 2nd grade of led driver sends N+1 invalid sequential successively and gives the 3rd level led driver to the output communication port; Because the communication register of 3rd level to the L level led driver is in non-direct mode operation, 3rd level to the L level led driver receives N+1 invalid sequential synchronously; When the 2nd grade of led driver receives the 2nd end mark sequential in the valid data frame sequential; The communication pattern register of the 2nd grade of led driver is set to direct mode operation, and the 3rd to L valid data frame sequential, the reset timing that while the 2nd grade of led driver sends led controller sends to the output communication port of the 2nd grade of led driver in regular turn;
(7) the rest may be inferred; N level led driver receives n to the L the valid data frame sequential that n-1 level led driver sends successively; And resolve n valid data frame sequential; It is the storage space of first address that N valid data in n the valid data frame sequential are put into the start address successively, and storage address is added up; In receiving n valid data frame sequential successively in N valid data and the end mark sequential; N led driver sends N+1 invalid sequential successively and gives n+1 level led driver to the output communication port; Because the communication register of n+1 level to the L level led driver is in non-direct mode operation, n+1 level to the L level led driver receives N+1 invalid sequential synchronously; When n level led driver receives the end mark sequential in the n valid data frame sequential; The communication pattern register of n level led driver is set to direct mode operation, and n+1 to the L valid data frame sequential, the reset timing that while n level led driver sends led controller sends to the output communication port of n level led driver in regular turn; N=n+1, n are greater than 2 and less than the integer of L-1, repeating step (7).
The invention has the beneficial effects as follows: the data communications method of the LED display system that employing single bus of the present invention is realized has the communication efficiency height, controls the advantage flexible, that synchronous effect is good.
Description of drawings
Fig. 1 is existing LED display system
Fig. 2 is existing LED display system communication protocol
Fig. 3 for adopt that single bus realizes among the present invention the LED display system
The data full charge communication sequential chart that Fig. 4 proposes for the present invention
The data string receiving communication sequential chart that Fig. 5 proposes for the present invention
Fig. 6 is the sequential chart of logical zero/1 in the LED display system communication protocol of the embodiment of the invention
Fig. 7 is the sequential chart of 8 kinds of sequential in the LED display system communication protocol of the embodiment of the invention
Fig. 8 is each led driver data input synoptic diagram in the data full charge communication of the present invention's proposition
Each led driver data input synoptic diagram during the data string receiving that Fig. 9 proposes for the present invention is communicated by letter
Embodiment
A kind of LED display system that adopts single bus to realize, as shown in Figure 3, comprise a led controller (3) and L level led driver (21-2L):
Said led controller (3) comprises an output communication port (30);
Said led driver comprises an input communication port (DIN), an output communication port (DOUT);
Led controller (3) output communication port (30) connects first order led driver (21) input communication port (DIN); First order led driver (21) output communication port (DOUT) serial connection second level led driver (22) input communication port (DIN); By that analogy; Previous stage led driver output communication port (DOUT) serial connection led driver input communication port at the corresponding levels (DIN); Led driver output communication port at the corresponding levels (DOUT) serial connection next stage led driver input communication port (DIN), L level led driver (21-2L) is connected in series successively, and afterbody led driver output communication port (DOUT) is unsettled;
Said led driver comprises a communication pattern register: the communication pattern register value is 0 o'clock, is direct mode operation, and the sequential that led driver receives input communication port (DIN) sends to led driver output communication port (DOUT) simultaneously; The communication pattern register value is 1 o'clock, is non-direct mode operation, and led driver produces the output of its output communication port according to the instruction that receives.
Said led driver also comprises a storer, is used to store control information and the display message that led controller (3) is issued led driver.
The data communications method of above-mentioned LED display system is to comprise data full charge communication and/or data string receiving communication:
Led controller (3) sends data to L level led driver (21-2L); L level led driver is inserted the designated memory space of all led drivers according to instruction with the data sync that receives; Realize the data full charge communication; The data full charge communication sequential that led controller (3) sends, as shown in Figure 4, form successively by following sequential: reset timing, reset and finish sequential, receive instruction sequencing, start address sequential, a M valid data sequential, end mark sequential, reset timing entirely;
Said M valid data sequential is made up of M continuous effective data time sequence.
Led controller (3) sends data to L level led driver (21-2L); L level led driver receives the data that led controller (3) sends successively according to instruction; And the data that receive are inserted the designated memory space of each led driver; Realization data string receiving communication, as shown in Figure 5, form successively by following sequential: reset timing, reset and finish sequential, closed string instruction sequencing, start address sequential, a L valid data frame sequential, reset timing.
Said L valid data frame sequential is made up of L continuous valid data frame sequential, and valid data frame sequential is made up of a N continuous valid data sequential and 1 end mark sequential;
The 1st grade of led driver receives the 1st the valid data frame sequential that belongs to this led driver from led controller; The data that receive are inserted designated memory space; And when receiving the 1st valid data frame sequential; To the invalid sequential of its output communication port synchronized transmission, after this continue to send the 2nd to L valid data frame sequential and reset timing to its output communication port;
The 2nd grade of led driver receives the sequential of the output communication port transmission of the 1st grade of led driver; Parsing belongs to the 2nd valid data frame sequential of this led driver and the data that receive is inserted designated memory space; And when receiving the 2nd valid data frame sequential; To the invalid sequential of its output communication port synchronized transmission, after this continue to send the 3rd to L valid data frame sequential and reset timing to its output communication port;
The rest may be inferred; N level led driver receives the sequential of the output communication port transmission of n-1 level led driver; Parsing belongs to n valid data frame sequential of this led driver and the data that receive is inserted designated memory space; And when receiving n valid data frame sequential,, after this continue to send n+1 to the L valid data frame sequential and reset timing to its output communication port to the invalid sequential of its output communication port synchronized transmission.
In the present embodiment; Said reset timing length is 8 or more than 8; Reset and finish sequential, receive 8 of instruction sequencings, closed string instruction sequencing, start address sequential, valid data sequential, end mark sequential, invalid sequential sequential fixed length entirely, every can only be logical zero or logical one, and height/low level dutycycle is 1: 3 presentation logic 0; Height/low level dutycycle is 3: 1 presentation logics 1, and is as shown in Figure 6.
As shown in Figure 7, each sequential defines as follows:
Reset timing (RESET) is encoded to 00 ... 00 (8 0) perhaps greater than 80; Its function is that the led driver that receives reset timing is accomplished reset function, and the communication pattern register of led driver is set to direct mode operation;
Reset and finish sequential (RESET_END), be encoded to 0000_0001, can only be used in reset timing after; The end that resets of its functional representation;
The full instruction sequencing (IR_RX_ALL) of receiving is encoded to 0001_1111, is used to represent that this time communication is the data full charge communication;
Closed string instruction sequencing (IR_RX_S) is encoded to 0010_1111, is used to represent that this time communication is data string receiving communication;
Start address sequential (ADDS); (X representes both can also can be 1 for 0 to be encoded to 1XXX_XXXX; As follows), be used for the start address of the data of presentation directives's needs transmission, back 7 bit representation address informations in the led driver storer corresponding address space that receives this sequential;
Valid data sequential (Data) is encoded to 1XXX_XXXX, is used for the data that presentation directives's needs transmit, back 7 bit representation data messages;
End mark sequential (END) is encoded to 0000_0010, and led driver receives that the current valid data sequential of end mark byte representation finishes;
Invalid sequential (Noneffect); Be encoded to 0111_1111; This byte can be inserted in reset finish sequential, when receiving instruction sequencing, closed string instruction sequencing, start address entirely, after valid data sequential or the end mark sequential, led driver is received the illegal command byte, is left intact.
After the LED display system that single bus is realized powers on, carry out initialize communications, the steps include:
(1) led controller (3) sends L reset timing at least, after the 1st grade of led driver (21) receives reset timing, the communication pattern register is changed to direct mode operation, and the 1st grade of led driver (21) sends to the output communication port simultaneously with the sequential that receives;
After (2) the 2nd grades of led drivers (22) receive reset timing, the communication pattern register is changed to direct mode operation, the 2nd grade of led driver (22) sends to the output communication port simultaneously with the sequential that receives; The rest may be inferred; After led drivers at different levels are received the reset timing of previous stage led driver; The communication pattern register is changed to direct mode operation, and the sequential that receives is sent to the output communication port simultaneously, all the communication pattern register is changed to direct mode operation up to all led drivers.
The communication steps of said data full charge communication does, and is as shown in Figure 8:
(1) the LED display system of single bus realization is carried out after the system initialization communication, and the communication pattern register of each led driver is set to direct mode operation;
(2) led controller (3) sends reset timing in regular turn, resets and finish sequential, receive instruction sequencing, start address sequential, a M valid data frame sequential, end mark sequential, reset timing entirely;
(3) the 1st grade of led driver receives reset timing synchronously, resets and finish sequential, receive instruction sequencing, start address sequential, a M valid data frame sequential, end mark sequential, reset timing entirely when carrying out step (1).
(4) because the communication pattern register of each led driver is set to direct mode operation; When carrying out step (1); N level led driver receives reset timing that n-1 level driver passes in regular turn, resets and finish sequential, receive instruction sequencing, start address sequential, a M valid data frame sequential, end mark sequential, reset timing entirely from the output communication port of n-1 level led driver synchronously, and n is greater than 1 integer less than L-1.
When led drivers at different levels received the start address sequential, led drivers at different levels (21-2L) received and resolve the start address sequential, prepared to receive M valid data sequential;
When each led driver (21-2L) receives M valid data sequential, resolve M valid data sequential, storage address is added up, and M valid data are put into the storage space that start address is a first address successively.
The communication steps of said data string receiving communication does, and is as shown in Figure 9:
(1) the LED display system of single bus realization is carried out after the system initialization communication, and the communication pattern register of each led driver is set to direct mode operation;
(2) led controller (3) sends reset timing in regular turn, resets and finish sequential, closed string instruction sequencing, start address sequential;
(3) when carrying out step (2); Because the communication pattern register of each led driver is set to direct mode operation; Led drivers at different levels receive reset timing synchronously, reset and finish sequential, closed string instruction sequencing, start address sequential, and led drivers at different levels separately communication pattern register after receiving the start address sequential is set to non-direct mode operation;
(4) led controller sends the 1st to L valid data frame sequential, reset timing in regular turn;
(5) when carrying out step (4); The 1st grade of led driver receives led controller (3) successively and sends L valid data frame sequential; And resolve the 1st valid data frame sequential; It is the storage space of first address that N valid data in the 1st the valid data frame sequential are put into the start address successively, and storage address is added up; In receiving the 1st valid data frame sequential successively in N valid data sequential and the end mark sequential; The 1st grade of led driver (21) sends N+1 invalid sequential successively and gives the 2nd grade of led driver to the output communication port; Because the 2nd grade of communication register to L level led driver be in non-direct mode operation, the 2nd grade receives N+1 invalid sequential synchronously successively to L level led driver; When the 1st grade of led driver receives the 1st end mark sequential in the valid data frame sequential; The communication pattern register of the 1st grade of led driver is set to direct mode operation, and the 2nd to L valid data frame sequential, the reset timing that while the 1st grade of led driver sends led controller sends to the output communication port of the 1st grade of led driver in regular turn;
(6) the 2nd grades of led drivers receive the 2nd to L the valid data frame sequential that the 1st grade of led driver sends successively; And resolve the 2nd valid data frame sequential; It is the storage space of first address that N valid data in the 2nd the valid data frame sequential are put into the start address successively, and storage address is added up; In receiving the 2nd valid data frame sequential successively in N valid data and the end mark sequential; The 2nd grade of led driver (22) sends N+1 invalid sequential successively and gives the 3rd level led driver to the output communication port; Because the communication register of 3rd level to the L level led driver is in non-direct mode operation, 3rd level to the L level led driver receives N+1 invalid sequential synchronously; When the 2nd grade of led driver receives the 2nd end mark sequential in the valid data frame sequential; The communication pattern register of the 2nd grade of led driver is set to direct mode operation, and the 3rd to L valid data frame sequential, the reset timing that while the 2nd grade of led driver sends led controller sends to the output communication port of the 2nd grade of led driver in regular turn;
(7) the rest may be inferred; N level led driver receives n to the L the valid data frame sequential that n-1 level led driver sends successively; And resolve n valid data frame sequential; It is the storage space of first address that N valid data in n the valid data frame sequential are put into the start address successively, and storage address is added up; In receiving n valid data frame sequential successively in N valid data and the end mark sequential; N led driver (2n) sends N+1 invalid sequential successively and gives n+1 level led driver to the output communication port; Because the communication register of n+1 level to the L level led driver is in non-direct mode operation, n+1 level to the L level led driver receives N+1 invalid sequential synchronously; When n level led driver receives the end mark sequential in the n valid data frame sequential; The communication pattern register of n level led driver is set to direct mode operation, and n+1 to the L valid data frame sequential, the reset timing that while n level led driver sends led controller sends to the output communication port of n level led driver in regular turn; N=n+1, n are greater than 2 and less than the integer of L-1, repeating step (7).
What should be understood that is, the foregoing description is just to explanation of the present invention, rather than limitation of the present invention, and any innovation and creation that do not exceed in the connotation scope of the present invention all fall within the protection domain of the present invention.
Claims (11)
1.LED the communication means of display system, wherein the LED display system comprises: led controller and L level led driver;
Said led controller comprises an output communication port;
Said led driver comprises an input communication port, an output communication port;
Led controller output communication port connects first order led driver input communication port; First order led driver output communication port serial connection second level led driver input communication port; By that analogy, previous stage led driver output communication port is connected in series led driver input communication port at the corresponding levels, led driver output communication port serial connection next stage led driver input communication port at the corresponding levels; L level led driver is connected in series successively, and afterbody led driver output communication port is unsettled;
Said led driver; Comprise a communication pattern register: the communication pattern register is at two states: direct mode operation and non-direct mode operation; When being in direct mode operation, the sequential that led driver receives the input communication port sends to led driver output communication port simultaneously; When being in non-direct mode operation, led driver produces the output of its output communication port according to the instruction that receives;
Said led driver also comprises a storer, is used to store control information and the display message that led controller is issued led driver;
The data communications method that it is characterized in that above-mentioned LED display system is to comprise data full charge communication and/or data string receiving communication:
Led controller sends data to L level led driver; L level led driver is inserted the designated memory space of all led drivers according to instruction with the data sync that receives; Realize the data full charge communication, the data full charge communication sequential that led controller sends is made up of following sequential successively: reset timing, reset and finish sequential, receive instruction sequencing, start address sequential, a M valid data sequential, end mark sequential, reset timing entirely;
Led controller sends data to L level led driver; L level led driver receives the data that led controller sends successively according to instruction; And the data that receive are inserted the designated memory space of each led driver; Realization data string receiving communication, the data string receiving communication sequential that led controller sends is made up of following sequential successively: reset timing, reset and finish sequential, closed string instruction sequencing, start address sequential, a L valid data frame sequential, reset timing;
Said L valid data frame sequential is made up of L continuous valid data frame sequential, and valid data frame sequential is made up of a N continuous valid data sequential and 1 end mark sequential;
The 1st grade of led driver receives the 1st the valid data frame sequential that belongs to this led driver from led controller; The data that receive are inserted designated memory space; And when receiving the 1st valid data frame sequential; To the invalid sequential of its output communication port synchronized transmission, after this continue to send the 2nd to L valid data frame sequential and reset timing to its output communication port;
The 2nd grade of led driver receives the sequential of the output communication port transmission of the 1st grade of led driver; Parsing belongs to the 2nd valid data frame sequential of this led driver and the data that receive is inserted designated memory space; And when receiving the 2nd valid data frame sequential; To the invalid sequential of its output communication port synchronized transmission, after this continue to send the 3rd to L valid data frame sequential and reset timing to its output communication port;
The rest may be inferred; N level led driver receives the sequential of the output communication port transmission of n-1 level led driver; Parsing belongs to n valid data frame sequential of this led driver and the data that receive is inserted designated memory space; And when receiving n valid data frame sequential,, after this continue to send n+1 to the L valid data frame sequential and reset timing to its output communication port to the invalid sequential of its output communication port synchronized transmission.
2. the communication means of LED display system according to claim 1 is characterized in that said M valid data sequential be made up of M continuous effective data time sequence.
3. the communication means of LED display system according to claim 1 is characterized in that:
Reset timing, its function are that the led driver that receives reset timing is accomplished reset function, and the communication pattern register of led driver is set to direct mode operation;
After the end sequential that resets can only be used in reset timing; The end that resets of its functional representation;
The full instruction sequencing of receiving is used to represent that this time communication is the data full charge communication;
The closed string instruction sequencing is used to represent that this time communication is data string receiving communication;
The start address sequential is used for the start address of the data of presentation directives's needs transmission in the led driver storer corresponding address space that receives this sequential;
The valid data sequential is used for the data that presentation directives's needs transmit;
End mark sequential, led driver receive that the current valid data sequential of end mark byte representation finishes;
Invalid sequential, this byte can be inserted in reset finish sequential, when receiving instruction sequencing, closed string instruction sequencing, start address entirely, after valid data sequential or the end mark sequential, led driver is received invalid sequential, is left intact.
4. the communication means of LED display system according to claim 1 is characterized in that the communication steps of said data full charge communication is:
(1) the LED display system of single bus realization is carried out after the initialize communications, and the communication pattern register of each led driver is set to direct mode operation;
(2) led controller sends reset timing in regular turn, resets and finish sequential, receive instruction sequencing, start address sequential, a M valid data frame sequential, end mark sequential, reset timing entirely;
(3) the 1st grade of led driver receives reset timing synchronously, resets and finish sequential, receive instruction sequencing, start address sequential, a M valid data frame sequential, end mark sequential, reset timing entirely when carrying out step (2);
(4) because the communication pattern register of each led driver is set to direct mode operation; When carrying out step (2); N level led driver receives reset timing that n-1 level driver passes in regular turn, resets and finish sequential, receive instruction sequencing, start address sequential, a M valid data frame sequential, end mark sequential, reset timing entirely from the output communication port of n-1 level led driver synchronously, and n is greater than 1 integer less than L-1;
When led drivers at different levels received the start address sequential, led drivers at different levels received and resolve the start address sequential, prepared to receive M valid data sequential;
When led drivers at different levels receive M valid data sequential, resolve M valid data sequential, storage address is added up, and M valid data are put into the start address successively is the storage space of first address.
5. the communication means of LED display system according to claim 1 is characterized in that the communication steps of said data string receiving communication is:
(1) the LED display system of single bus realization is carried out after the initialize communications, and the communication pattern register of each led driver is set to direct mode operation;
(2) led controller sends reset timing in regular turn, resets and finish sequential, closed string instruction sequencing, start address sequential;
(3) when carrying out step (2); Because the communication pattern register of each led driver is set to direct mode operation; Led drivers at different levels receive reset timing synchronously, reset and finish sequential, closed string instruction sequencing, start address sequential, and led drivers at different levels separately communication pattern register after receiving the start address sequential is set to non-direct mode operation;
(4) led controller sends the 1st to L valid data frame sequential, reset timing in regular turn;
(5) when carrying out step (4); The 1st grade of led driver receives led controller successively and sends L valid data frame sequential; And resolve the 1st valid data frame sequential; It is the storage space of first address that N valid data in the 1st the valid data frame sequential are put into the start address successively, and storage address is added up; In receiving the 1st valid data frame sequential successively in N valid data sequential and the end mark sequential; The 1st grade of led driver sends N+1 invalid sequential successively and gives the 2nd grade of led driver to the output communication port; Because the 2nd grade of communication register to L level led driver be in non-direct mode operation, the 2nd grade receives N+1 invalid sequential synchronously successively to L level led driver; When the 1st grade of led driver receives the 1st end mark sequential in the valid data frame sequential; The communication pattern register of the 1st grade of led driver is set to direct mode operation, and the 2nd to L valid data frame sequential, the reset timing that while the 1st grade of led driver sends led controller sends to the output communication port of the 1st grade of led driver in regular turn;
(6) the 2nd grades of led drivers receive the 2nd to L the valid data frame sequential that the 1st grade of led driver sends successively; And resolve the 2nd valid data frame sequential; It is the storage space of first address that N valid data in the 2nd the valid data frame sequential are put into the start address successively, and storage address is added up; In receiving the 2nd valid data frame sequential successively in N valid data and the end mark sequential; The 2nd grade of led driver sends N+1 invalid sequential successively and gives the 3rd level led driver to the output communication port; Because the communication register of 3rd level to the L level led driver is in non-direct mode operation, 3rd level to the L level led driver receives N+1 invalid sequential synchronously; When the 2nd grade of led driver receives the 2nd end mark sequential in the valid data frame sequential; The communication pattern register of the 2nd grade of led driver is set to direct mode operation, and the 3rd to L valid data frame sequential, the reset timing that while the 2nd grade of led driver sends led controller sends to the output communication port of the 2nd grade of led driver in regular turn;
(7) the rest may be inferred; N level led driver receives n to the L the valid data frame sequential that n-1 level led driver sends successively; And resolve n valid data frame sequential; It is the storage space of first address that N valid data in n the valid data frame sequential are put into the start address successively, and storage address is added up; In receiving n valid data frame sequential successively in N valid data and the end mark sequential; N led driver sends N+1 invalid sequential successively and gives n+1 level led driver to the output communication port; Because the communication register of n+1 level to the L level led driver is in non-direct mode operation, n+1 level to the L level led driver receives N+1 invalid sequential synchronously; When n level led driver receives the end mark sequential in the n valid data frame sequential; The communication pattern register of n level led driver is set to direct mode operation, and n+1 to the L valid data frame sequential, the reset timing that while n level led driver sends led controller sends to the output communication port of n level led driver in regular turn; N=n+1, n are greater than 2 and less than the integer of L-1, repeating step (7).
6. like the communication means of claim 4 or 5 said LED display systems, it is characterized in that the initialize communications step is:
(1) led controller sends L reset timing at least, after the 1st grade of led driver receives reset timing, the communication pattern register is changed to direct mode operation, and the 1st grade of led driver sends to the output communication port simultaneously with the sequential that receives;
After (2) the 2nd grades of led drivers receive reset timing, the communication pattern register is changed to direct mode operation, the 2nd grade of led driver sends to the output communication port simultaneously with the sequential that receives; The rest may be inferred; After led drivers at different levels are received the reset timing of previous stage led driver; The communication pattern register is changed to direct mode operation, and the sequential that receives is sent to the output communication port simultaneously, all the communication pattern register is changed to direct mode operation up to all led drivers.
7.LED the communication means of display system, wherein the LED display system comprises: led controller and L level led driver;
Said led controller comprises an output communication port;
Said led driver comprises an input communication port, an output communication port;
Led controller output communication port connects first order led driver input communication port; First order led driver output communication port serial connection second level led driver input communication port; By that analogy, previous stage led driver output communication port is connected in series led driver input communication port at the corresponding levels, led driver output communication port serial connection next stage led driver input communication port at the corresponding levels; L level led driver is connected in series successively, and afterbody led driver output communication port is unsettled;
Said led driver; Comprise a communication pattern register: the communication pattern register is at two states: direct mode operation and non-direct mode operation; When being in direct mode operation, the sequential that led driver receives the input communication port sends to led driver output communication port simultaneously; When being in non-direct mode operation, led driver produces the output of its output communication port according to the instruction that receives;
Said led driver also comprises a storer, is used to store control information and the display message that led controller is issued led driver;
The data communications method that it is characterized in that above-mentioned LED display system is to comprise data full charge communication and/or data string receiving communication:
Led controller sends data to L level led driver; L level led driver is inserted the designated memory space of all led drivers according to instruction with the data sync that receives; Realize the data full charge communication, the data full charge communication sequential that led controller sends is made up of following sequential successively: reset timing, reset and finish sequential, receive instruction sequencing, start address sequential, a M valid data sequential, end mark sequential, reset timing entirely;
Led controller sends data to L level led driver; L level led driver receives the data that led controller sends successively according to instruction; And the data that receive are inserted the designated memory space of each led driver; Realization data string receiving communication, the data string receiving communication sequential that led controller sends is made up of following sequential successively: reset timing, reset and finish sequential, closed string instruction sequencing, start address sequential, a L valid data frame sequential, reset timing;
The communication steps of said data string receiving communication is:
(1) the LED display system of single bus realization is carried out after the initialize communications, and the communication pattern register of each led driver is set to direct mode operation;
(2) led controller sends reset timing in regular turn, resets and finish sequential, closed string instruction sequencing, start address sequential;
(3) when carrying out step (2); Because the communication pattern register of each led driver is set to direct mode operation; Led drivers at different levels receive reset timing synchronously, reset and finish sequential, closed string instruction sequencing, start address sequential, and led drivers at different levels separately communication pattern register after receiving the start address sequential is set to non-direct mode operation;
(4) led controller sends the 1st to L valid data frame sequential, reset timing in regular turn;
(5) when carrying out step (4); The 1st grade of led driver receives led controller successively and sends L valid data frame sequential; And resolve the 1st valid data frame sequential; It is the storage space of first address that N valid data in the 1st the valid data frame sequential are put into the start address successively, and storage address is added up; In receiving the 1st valid data frame sequential successively in N valid data sequential and the end mark sequential; The 1st grade of led driver sends N+1 invalid sequential successively and gives the 2nd grade of led driver to the output communication port; Because the 2nd grade of communication register to L level led driver be in non-direct mode operation, the 2nd grade receives N+1 invalid sequential synchronously successively to L level led driver; When the 1st grade of led driver receives the 1st end mark sequential in the valid data frame sequential; The communication pattern register of the 1st grade of led driver is set to direct mode operation, and the 2nd to L valid data frame sequential, the reset timing that while the 1st grade of led driver sends led controller sends to the output communication port of the 1st grade of led driver in regular turn;
(6) the 2nd grades of led drivers receive the 2nd to L the valid data frame sequential that the 1st grade of led driver sends successively; And resolve the 2nd valid data frame sequential; It is the storage space of first address that N valid data in the 2nd the valid data frame sequential are put into the start address successively, and storage address is added up; In receiving the 2nd valid data frame sequential successively in N valid data and the end mark sequential; The 2nd grade of led driver sends N+1 invalid sequential successively and gives the 3rd level led driver to the output communication port; Because the communication register of 3rd level to the L level led driver is in non-direct mode operation, 3rd level to the L level led driver receives N+1 invalid sequential synchronously; When the 2nd grade of led driver receives the 2nd end mark sequential in the valid data frame sequential; The communication pattern register of the 2nd grade of led driver is set to direct mode operation, and the 3rd to L valid data frame sequential, the reset timing that while the 2nd grade of led driver sends led controller sends to the output communication port of the 2nd grade of led driver in regular turn;
(7) the rest may be inferred; N level led driver receives n to the L the valid data frame sequential that n-1 level led driver sends successively; And resolve n valid data frame sequential; It is the storage space of first address that N valid data in n the valid data frame sequential are put into the start address successively, and storage address is added up; In receiving n valid data frame sequential successively in N valid data and the end mark sequential; N led driver sends N+1 invalid sequential successively and gives n+1 level led driver to the output communication port; Because the communication register of n+1 level to the L level led driver is in non-direct mode operation, n+1 level to the L level led driver receives N+1 invalid sequential synchronously; When n level led driver receives the end mark sequential in the n valid data frame sequential; The communication pattern register of n level led driver is set to direct mode operation, and n+1 to the L valid data frame sequential, the reset timing that while n level led driver sends led controller sends to the output communication port of n level led driver in regular turn; N=n+1, n are greater than 2 and less than the integer of L-1, repeating step (7).
8. like the communication means of the said LED display system of claim 7, it is characterized in that said M valid data sequential be made up of M continuous effective data time sequence.
9. like the communication means of the said LED display system of claim 7, it is characterized in that:
Reset timing, its function are that the led driver that receives reset timing is accomplished reset function, and the communication pattern register of led driver is set to direct mode operation;
After the end sequential that resets can only be used in reset timing; The end that resets of its functional representation;
The full instruction sequencing of receiving is used to represent that this time communication is the data full charge communication;
The closed string instruction sequencing is used to represent that this time communication is data string receiving communication;
The start address sequential is used for the start address of the data of presentation directives's needs transmission in the led driver storer corresponding address space that receives this sequential;
The valid data sequential is used for the data that presentation directives's needs transmit;
End mark sequential, led driver receive that the current valid data sequential of end mark byte representation finishes;
Invalid sequential, this byte can be inserted in reset finish sequential, when receiving instruction sequencing, closed string instruction sequencing, start address entirely, after valid data sequential or the end mark sequential, led driver is received invalid sequential, is left intact.
10. like the communication means of the said LED display system of claim 7, it is characterized in that the communication steps of said data full charge communication is:
(1) the LED display system of single bus realization is carried out after the initialize communications, and the communication pattern register of each led driver is set to direct mode operation;
(2) led controller sends reset timing in regular turn, resets and finish sequential, receive instruction sequencing, start address sequential, a M valid data frame sequential, end mark sequential, reset timing entirely;
(3) the 1st grade of led driver receives reset timing synchronously, resets and finish sequential, receive instruction sequencing, start address sequential, a M valid data frame sequential, end mark sequential, reset timing entirely when carrying out step (2);
(4) because the communication pattern register of each led driver is set to direct mode operation; When carrying out step (2); N level led driver receives reset timing that n-1 level driver passes in regular turn, resets and finish sequential, receive instruction sequencing, start address sequential, a M valid data frame sequential, end mark sequential, reset timing entirely from the output communication port of n-1 level led driver synchronously, and n is greater than 1 integer less than L-1;
When led drivers at different levels received the start address sequential, led drivers at different levels received and resolve the start address sequential, prepared to receive M valid data sequential;
When led drivers at different levels receive M valid data sequential, resolve M valid data sequential, storage address is added up, and M valid data are put into the start address successively is the storage space of first address.
11., it is characterized in that the initialize communications step is like the communication means of claim 7 or 10 said LED display systems:
(1) led controller sends L reset timing at least, after the 1st grade of led driver receives reset timing, the communication pattern register is changed to direct mode operation, and the 1st grade of led driver sends to the output communication port simultaneously with the sequential that receives;
After (2) the 2nd grades of led drivers receive reset timing, the communication pattern register is changed to direct mode operation, the 2nd grade of LED driver sends to the output communication port simultaneously with the sequential that receives; The rest may be inferred; After led drivers at different levels are received the reset timing of previous stage led driver; The communication pattern register is changed to direct mode operation, and the sequential that receives is sent to the output communication port simultaneously, all the communication pattern register is changed to direct mode operation up to all led drivers.
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| CN104537986A (en) * | 2015-01-21 | 2015-04-22 | 杭州士兰微电子股份有限公司 | LED module, control method of LED module, and LED drive circuit |
| CN108564917B (en) * | 2018-03-28 | 2021-02-09 | 深德彩科技(深圳)股份有限公司 | LED display screen, display method thereof and device with storage function |
| US10950194B1 (en) * | 2019-10-04 | 2021-03-16 | Solomon Systech (Shenzhen) Limited | Display panel with distributed driver network |
| CN111540318B (en) * | 2020-07-10 | 2020-10-23 | 北京显芯科技有限公司 | LED control system, apparatus, method and storage medium |
| CN112654119B (en) * | 2020-12-22 | 2022-02-18 | 北京显芯科技有限公司 | LED drive test method, driver, system and electronic equipment |
| CN113870804B (en) * | 2021-10-18 | 2022-05-03 | 北京显芯科技有限公司 | Backlight control system, method, device and storage medium |
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