CN102891253A - Resistance random access memory and manufacturing method thereof - Google Patents

Resistance random access memory and manufacturing method thereof Download PDF

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CN102891253A
CN102891253A CN2012103613592A CN201210361359A CN102891253A CN 102891253 A CN102891253 A CN 102891253A CN 2012103613592 A CN2012103613592 A CN 2012103613592A CN 201210361359 A CN201210361359 A CN 201210361359A CN 102891253 A CN102891253 A CN 102891253A
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electrode
storing device
resistance layer
variable storing
resistance
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CN102891253B (en
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蔡一茂
毛俊
武慧薇
黄如
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Peking University
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Peking University
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Abstract

The embodiment of the invention discloses a resistance random access memory and a manufacturing method thereof. The resistance random access memory comprises an upper electrode, a resistance change material and a lower electrode, wherein the resistance change material is positioned on the lower electrode; the upper electrode is embedded into the resistance change material; and the width of the top of the upper electrode is greater than that of the bottom of the upper electrode. The invention also discloses a method for manufacturing the resistance random access memory. By the resistance random access memory and manufacturing method thereof, the action area of the electrode can be effectively reduced; and meanwhile, a nanoscale memory effect can be achieved at the cost of manufacturing a micron memory, the manufacturing process of the memory is simplified, and the manufacturing cost is saved.

Description

Resistance-variable storing device and preparation method thereof
Technical field
The present invention relates to field of semiconductor devices, specifically, relate to semiconductor resistance-variable storing device and manufacture method thereof, more specifically, relate to a kind of resistance-variable storing device with microelectrode and preparation method thereof.
Background technology
Along with information technology development at full speed, semiconductor memory has become the indispensable part of various electronic apparatus systems.At present, some is based on the floating gate flash memory (Floating Gate Flash Memory) that the polysilicon gate that mixes other materials (such as boron, phosphorus) is done floating grid (floating gate) and control grid (control gate) memory on the market.But flash memory is swift and violent in recent two decades development, the flash cell size is sharply dwindled, flash memory faces huge challenge aspect scaled down, particularly enter after the 45nm technology node, distance between the flash cell is dwindled, cause the interference between the unit to increase the weight of, the reliability of memory is brought have a strong impact on.
By contrast, resistance-variable storing device is with its good stability, and reliability is strong, and is simple in structure, and the characteristics such as CMOS process compatible more and more are widely used.Resistance-variable storing device is a kind of by adding the voltage of opposed polarity, size, thereby changes the novel memory device of the resistance sizes storage data of resistive material.Mainly by top electrode, resistive material and bottom electrode form on the structure.In order to adapt to more and more higher requirement, wish the operating current of resistance-variable storing device, especially the operating current from the low-resistance to the high resistant (reset operation) is the smaller the better.
Existing resistance variation memory structure is generally MIM(metal electrode-resistive material-metal electrode) structure or criss-cross construction.Mim structure refers to the structure of upper/lower electrode sandwich resistive material, is similar to electric capacity.Criss-cross construction is up and down two mutual square crossings of microelectrode, fills the resistive material between the coincidence area that intersects.No matter be which kind of structure, all expect to obtain low operating current, one of method is exactly to reduce electrode area.Electrode area is less, and the effective area that is carried in electric field on the resistive material is less, and the conductive filament of formation is more concentrated, and operating current is just less.Wish at present to do electrode less, especially reach hundred nanometers and ten nanometers even less rank, thereby often realize this microelectrode (being above-mentioned metal electrode) by nano level technique, manufacture craft is comparatively complicated, and cost is high and unstable.
Summary of the invention
Dwindle electrode area complex process and the high problem of cost for what exist in the above-mentioned technology, a kind of resistance-variable storing device and preparation method thereof is provided in the embodiment of the invention.
On the one hand, embodiments of the invention provide a kind of resistance-variable storing device, comprise top electrode, resistive material and bottom electrode, and described resistive material is positioned on the bottom electrode, described top electrode is embedded within the resistive material, and the width at the top of described top electrode is greater than the width of its bottom.
On the other hand, embodiments of the invention provide a kind of preparation method of resistance-variable storing device, comprising: step 1: by deposited metal on Semiconductor substrate, form bottom electrode; Step 2: be used to form the material of change resistance layer in the bottom electrode growth, and form groove by anisotropic etching in being used to form the material of change resistance layer, the width of the upper opening of described groove is greater than the width of its lower surface; Step 3: form top electrode by utilizing metal material to fill described groove, so that the width at the top of described top electrode is greater than the width of its bottom; Step 4: form change resistance layer by the material that is used to form change resistance layer on the described bottom electrode of oxidation.
Compared with prior art, resistance-variable storing device provided by the present invention and preparation method thereof, because top electrode is embedded in the resistive material with the shape that is similar to inverted trapezoidal, top electrode upper end open area is greater than the area of its bottom, the effective active area of this memory is with it corresponding area size of top electrode lower end surface zone and bottom electrode, thereby can reduce the effective active area of electrode, and then can optimized device performance.
In addition, in preparation, owing to can realize by the micron order Fabrication Technology of Electrode making of sub-micron or nano level electrode, perhaps realize the making of nanoscale electrodes by the Fabrication Technology of Electrode of submicron order, do not need to adopt the manufacture craft of complicated smaller szie in the manufacture process, thereby, can simplify manufacture craft, save cost.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, the below will do to introduce simply to the accompanying drawing of required use among the embodiment, apparently, accompanying drawing in the following describes only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the resistance variation memory structure schematic diagram with microelectrode of one embodiment of the invention;
Fig. 2,3,4,5,6,7 shows the flow chart of making the resistance-variable storing device with microelectrode according to the embodiment of the invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is carried out clear, complete description, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that obtains under the creative work prerequisite.
Referring to Fig. 1, Fig. 1 shows the resistance variation memory structure schematic diagram with microelectrode of the embodiment of the invention, wherein, resistance-variable storing device comprises top electrode 1, resistive material 2 and bottom electrode 3, resistive material 2 is positioned on the bottom electrode 3, top electrode 1 is embedded within the resistive material 2, and, so that the width at the top of top electrode is greater than the width of its bottom.
The part that embodiment as shown in Figure 1, top electrode are embedded within the resistive material can be inverted trapezoidal, and the sidewall of inverted trapezoidal is a with the angle that is parallel to the direction of bottom electrode.This angle a depends on the type of etching technics and resistive material, for example, is in the situation of silicon adopting wet etching and the material that is used to form the resistive material, and described angle a can be 54.74 °.The zone of the effective active area of top electrode and bottom electrode is among Fig. 1 shown in 4, i.e. the zone of part corresponding with it in top electrode bottom section and the bottom electrode.
Compared with prior art, in the structure according to the resistance-variable storing device of the embodiment of the invention, because the top electrode top width is greater than its bottom width, and the effective electrode area of this memory is the area of top electrode bottom and bottom electrode counterpart, thereby can effectively dwindle electrode area.
Fig. 2,3,4,5,6,7 shows the flow process of making the resistance-variable storing device with microelectrode according to the embodiment of the invention, may further comprise the steps.
Step 1: by deposited metal on Semiconductor substrate 31, form bottom electrode 3.
According to one embodiment of present invention, as shown in Figure 2, can by deposit layer of metal on silicon substrate 31, form bottom electrode 3.
In a specific embodiment, described metal can be platinum, tungsten, nickel, aluminium, palladium, gold, titanium, any one in the titanium nitride.
Step 2: be used to form the material of change resistance layer in the bottom electrode growth, and form groove by anisotropic etching in being used to form the material of change resistance layer, the width of the upper opening of described groove is greater than the width of its lower surface.
Specifically, above-mentioned steps two can realize by following processing.
At first, can be used to form in the bottom electrode growth material of change resistance layer.
In one embodiment of the invention, the described material that is used to form change resistance layer can comprise: silicon, germanium and other materials that is applicable to form change resistance layer known or that soon occur.
As shown in Figure 3, in a specific embodiment of the present invention, can on bottom electrode 3, grow monocrystalline silicon layer 22 as the material that is used to form change resistance layer by crystal orientation 100.
Then, can form groove in the described material that is used to form change resistance layer, the width of the upper opening of described groove is greater than the width of its lower surface.
As shown in Figure 4, in a specific embodiment of the present invention, can smear photoresist 21 being used to form on the material of change resistance layer (for example, the monocrystalline silicon layer 22 among Fig. 4), and reserve the window size size that needs etching, in order to carry out follow-up etching technics.Afterwards, as shown in Figure 5, can be used to form formation groove in the material of change resistance layer (for example, the monocrystalline silicon layer among Fig. 4 22) by anisotropic etch process (dry anisotropic etching technics or wet method anisotropic etch process).
Consider the anisotropy (etch rate that be monocrystalline silicon 111 with the ratio of 100 etch rate very large) of silicon materials in wet etching, in a preferred embodiment of the invention, can adopt wet etching technique to form groove.For example, can carry out etching at 100, because etching speed greatly reduces when etching into 111, so can form a groove.In addition, can by the control concentration of etching liquid and etch period just can control flume the degree of depth and bottom area.
Fig. 5 shows an inverted trapezoidal groove that utilizes the wet method anisotropic etching to obtain.As shown in Figure 5, the width of the upper opening of described groove is greater than the width of its lower surface.Although Fig. 5 does not illustrate, be in the situation of silicon adopting wet etching and the material that is used to form the resistive material, be 54.74 ° at hypotenuse and the angle a that is parallel to the direction of bottom electrode of resulting inverted trapezoidal groove (being described groove).In addition, for different application scenarios, can adjust by the control concentration of etching liquid and etch period the degree of depth of the inverted trapezoidal groove that etching obtains.
Step 3: form top electrode by utilizing metal material to fill described groove, so that the width at the top of described top electrode is greater than the width of its bottom.
In one embodiment of the invention, can fill the inverted trapezoidal groove at monocrystalline silicon layer 22 top depositing metals 24, obtain thus structure as shown in Figure 6; Then, the metal on the stripping photoresist 21 and photoresist 21 only stay the metal of filling inverted trapezoidal slot part as top electrode, obtain the as shown in Figure 7 structure of memory.
Wherein, in specific embodiment, the metal level of described top electrode can be platinum, tungsten, nickel, aluminium, palladium, gold, titanium, any one in the titanium nitride.
Step 4: form change resistance layer.
In one embodiment, can by the described material (for example monocrystalline silicon) that is used to form change resistance layer of oxidation, form the silica change resistance layer.In this case, described change resistance layer comprises silica.
In addition, above embodiment is example only, the invention is not restricted to this, also can form change resistance layer by the material of other any appropriate, such as utilizing germanium to form germanium oxide as change resistance layer etc.
Compared with prior art, the resistance-variable storing device preparation method that the embodiment of the invention provides, the effective active area of electrode is the area of metal material bottom portion of groove, in the illustrated embodiment of the present invention, the area on groove top is submicron order, and the bottom is nanoscale, is equivalent to make the nano level effect that the cost of other resistance-variable storing device of submicron order is realized, simplify manufacture craft, reduced greatly cost of manufacture simultaneously.
Resistance-variable storing device that the embodiment of the invention provides and preparation method thereof, because top electrode is structure wide at the top and narrow at the bottom, the effective active area of electrode is the less area of top electrode bottom, has not only effectively dwindled the area of electrode, has optimized device, simultaneously, in preparation process, obtain submicron order or nano level electrode by the micron order Fabrication Technology of Electrode, perhaps the manufacture craft by the submicron order electrode obtains nano level electrode, simplify manufacture craft, saved cost of manufacture.

Claims (10)

1. resistance-variable storing device, it is characterized in that, comprise top electrode (1), resistive material (2) and bottom electrode (3), described resistive material (2) is positioned on the bottom electrode (3), described top electrode (1) is embedded within the resistive material (2), and the width at the top of described top electrode is greater than the width of its bottom.
2. resistance-variable storing device as claimed in claim 1 is characterized in that, the part that described top electrode is embedded within the resistive material can be inverted trapezoidal.
3. resistance-variable storing device as claimed in claim 1 is characterized in that, described top electrode is by platinum, tungsten, nickel, aluminium, palladium, gold, titanium, and any one material in the titanium nitride is made.
4. resistance-variable storing device as claimed in claim 1 is characterized in that, described bottom electrode is by platinum, tungsten, nickel, aluminium, palladium, gold, titanium, and any one material among the titanium nitride is made.
5. the preparation method of a resistance-variable storing device is characterized in that, comprising:
Step 1: by deposited metal on Semiconductor substrate (31), form bottom electrode (3);
Step 2: be used to form the material (22) of change resistance layer in bottom electrode growth, and form groove by anisotropic etching in the described material that is used to form change resistance layer, the width of the upper opening of described groove is greater than the width of its lower surface;
Step 3: form top electrode by utilizing metal material to fill described groove, so that the width at the top of described top electrode is greater than the width of its bottom;
Step 4: form change resistance layer by the material that is used to form change resistance layer on the described bottom electrode of oxidation.
6. resistance-variable storing device preparation method as claimed in claim 5 is characterized in that, described metal level comprises: platinum, tungsten, nickel, aluminium, palladium, gold, titanium, any one in the titanium nitride.
7. resistance-variable storing device preparation method as claimed in claim 5 is characterized in that, the described processing that forms groove by anisotropic etching in being used to form the material of change resistance layer comprises:
Photoresist is smeared in upper surface at the material that is used to form change resistance layer, and reserves the window size size that needs etching;
Utilize photoresist as mask, by the described material that is used to form change resistance layer of anisotropic etching, form groove.
8. resistance-variable storing device preparation method as claimed in claim 5 is characterized in that, comprises by utilizing metal material to fill the processing that described groove forms top electrode:
With filling groove, described metal is platinum, tungsten, nickel, aluminium, palladium, gold, titanium, any one among the titanium nitride at the material top depositing metal that is used to form change resistance layer;
Peel off the metal that is deposited on the photoresist part, stay the metal that is filled in the material groove part that is used to form change resistance layer and form top electrode.
9. resistance-variable storing device preparation method as claimed in claim 5 is characterized in that, the described material that is used to form change resistance layer is a kind of in silicon or the germanium.
10. resistance-variable storing device preparation method as claimed in claim 5 is characterized in that, described change resistance layer is silica or germanium oxide.
CN201210361359.2A 2012-09-25 2012-09-25 Resistance-variable storing device and preparation method thereof Active CN102891253B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104409627A (en) * 2014-10-30 2015-03-11 北京大学 Small-size ultrathin resistive random access memory and preparation method thereof
CN104576926A (en) * 2013-10-25 2015-04-29 华邦电子股份有限公司 Resistive random access memory and manufacturing method thereof

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CN101395717A (en) * 2006-03-09 2009-03-25 松下电器产业株式会社 Resistance-varying type element, semiconductor device, and method for manufacturing the element
CN101501850A (en) * 2006-10-16 2009-08-05 松下电器产业株式会社 Non-volatile storage device and method for manufacturing the same
US20110049462A1 (en) * 2009-08-28 2011-03-03 International Business Machines Corporation Flat lower bottom electrode for phase change memory cell
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Patent Citations (6)

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Publication number Priority date Publication date Assignee Title
US20040087074A1 (en) * 2002-11-01 2004-05-06 Young-Nam Hwang Phase changeable memory cells and methods of fabricating the same
TW200636923A (en) * 2005-02-23 2006-10-16 Taiwan Semiconductor Mfg Co Ltd Memory device and fabrication method thereof
CN101395717A (en) * 2006-03-09 2009-03-25 松下电器产业株式会社 Resistance-varying type element, semiconductor device, and method for manufacturing the element
CN101501850A (en) * 2006-10-16 2009-08-05 松下电器产业株式会社 Non-volatile storage device and method for manufacturing the same
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104576926A (en) * 2013-10-25 2015-04-29 华邦电子股份有限公司 Resistive random access memory and manufacturing method thereof
CN104576926B (en) * 2013-10-25 2019-05-14 华邦电子股份有限公司 Resistance-type memory and its manufacturing method
CN104409627A (en) * 2014-10-30 2015-03-11 北京大学 Small-size ultrathin resistive random access memory and preparation method thereof

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