CN102882743A

CN102882743A - Method for generating multi-interval message acquisition time of intelligent transformer station

Info

Publication number: CN102882743A
Application number: CN2012103623594A
Authority: CN
Inventors: 黄鸣宇; 刘海涛; 栗磊; 尹亮; 梁亚波; 徐丽娟
Original assignee: ELECTRIC POWER INSTITUTE OF SCIENCE NINGXIA ELECTRIC POWER Co Ltd; State Grid Corp of China SGCC
Current assignee: ELECTRIC POWER INSTITUTE OF SCIENCE NINGXIA ELECTRIC POWER Co Ltd; State Grid Corp of China SGCC
Priority date: 2012-09-26
Filing date: 2012-09-26
Publication date: 2013-01-16
Anticipated expiration: 2032-09-26
Also published as: CN102882743B

Abstract

The invention relates to a method for generating a multi-interval message acquisition time of an intelligent transformer station. The method is characterized by comprising the following steps: a counter in an FPGA (Field Programmable Gate Array) achieves resetting, zero-clearing and counting at the rising edge of exact seconds of B codes, and when a data message comes in, a timestamp is generated and a time stamp is printed on the message. According to the method, labeled sampling is generated by the external time and an internal counter, so that the precision of the sampling time is improved and a guarantee is provided for later data analysis.

Description

A kind of generation method of multi-compartment message acquisition time of intelligent substation

Technical field

The present invention relates to a kind of generation method of multi-compartment message acquisition time of intelligent substation.

Background technology

Intelligent grid is being built at present electric power system energetically, and transformer station develops to intelligent substation from traditional transformer station, and principal character is: primary equipment is intelligent, and the secondary device networking meets the IEC61850 standard.Be the digitlization of intelligent substation internal information, information transfer network, the traffic model standardization makes the unified platform of equipment and function sharing.

Intelligent substation has a large amount of network message data to need to monitor, analyzes, and the particularly analysis of multi-compartment message, the basis of multi-compartment message analysis is the time precision that the multi-compartment message gathers.Transformer station adopts the access of B (IRIG-B) code more now, and the B code is to represent the time with 100 code elements, each code element 10ms, in non-whole second situation, because hardware and algorithm, acquisition time can not be guaranteed, in fact the above difference of 100us arranged, very large on the data analysis impact in later stage.

Summary of the invention

The generation method that the purpose of this invention is to provide a kind of multi-compartment message acquisition time of intelligent substation can improve the precision of acquisition time, reaches the precision of submicrosecond.

A kind of generation method of multi-compartment message acquisition time of intelligent substation, its special feature is, comprise the steps: at first the counter by FPGA inside, at the whole second rising edge of B code along resetting, zero clearing, beginning counting, when being arranged, data message comes in, then produce time stamp, stamp time mark to message.

Wherein time stamp is the time that adds the conversion of current counter external time, and the time of conversion equals current counter and multiply by the clock cycle.

Wherein stamping time mark to message refers to add data packet head by the PCAP form.

In the methods of the invention, when sampling mark is by jointly producing with external time and internal counter, thereby improved the precision of acquisition time, for the data analysis in later stage provides assurance.

Description of drawings

Fig. 1 is the workflow diagram of FPGA internal counter among the present invention;

Fig. 2 is the collection of multi-compartment message and time stamp flow chart among the present invention.

Embodiment

As shown in Figure 1, the present invention is a kind of generation method of multi-compartment message acquisition time of intelligent substation, comprise the steps: at first the counter by FPGA inside, at the whole second rising edge of B code along resetting, zero clearing, beginning counting, when there being data message to come in, then produce time stamp, add data packet head by the PCAP form to message, comprise temporal information in the PCAP form, concrete form is as follows:

Wherein time stamp is the time that adds the conversion of current counter external time, and conversion time=current counter multiply by the clock cycle.

Adopt FPGA, can guarantee precision that whole second rising edge of clock B code externally resets and the precision of internal counter, and adopt general microprocessor, because be subjected to the restriction of hardware structure, can not reach the precision of submicrosecond, when Large Volume Data appears in port, can not guarantee real-time response, the situation of packet loss can appear.

Embodiment 1:

This example is selected fpga chip EP4CGX150, and the logical block of 150K is arranged, the internal memory of 6.5Mbit, and the Transceiver of 8 high speeds can provide 475 IO mouths, guarantees to provide at most 16 independent light mouths, operating frequency 125M.

The function that realizes is: device power brings into operation, and the collection of internal counter and each separate port is started working, and the ardware feature of fpga chip has guaranteed concurrency.When there being data message to come in, produce time stamp, stamp time mark by the PCAP form, send to ppu.

The performance of this routine device is:

Ethernet monitor log port number: 4;

Message processing capability during single port work: 100Mbps, accessible 12 groups of SMV messages or 30 groups of GOOSE messages;

Total message processing capability when operating at full capacity: 200Mbps;

According to reality test, time precision＜50ns that message gathers.

Define a local counter time_cnt, it is just constantly cumulative after FPGA powers on, when receiving the whole second rising edge signal of B code b_flog, time_cnt is resetted, zero clearing, simultaneously the whole number of seconds b_time_s of 0: 0: 0 on the 1st January in 1970 to current time that parses in the B code is saved on the register b_time_s_reg, code is as follows

Just can accurately timestamp be beaten on message when message arrives, the timestamp of message is comprised of two parts: the one, and second part is provided by b_time_s_reg; The 2nd, nanosecond part, (the FPGA main clock frequency is 125MHz by (time_cnt*8) acquisition, so the time of each clock cycle was 8 nanoseconds, and counter time_cnt adds 1 at each clock cycle, it is the nanosecond of current time so time_cnt*8 obtains).

Timestamp is beaten on the message of receiving, form is followed the PCAP form, then message is dealt into the backstage, and the backstage is directly preserved message and got final product.Message is the PCAP form of standard, supports PCAP message analysis software can both open analysis.

Timestamp format analysis case:

73 DE, 57 50 b8,75 0D 01: wherein 50 57 DE 73 are that a second part is (because the low byte of PCAP form the inside stipulated time data is front, high byte is rear, so answer sorting by reversals when calculating) be converted to decimal number and be: 50 57 DE 73=1347935859 (second);

In like manner: 01 0D, 75 b8=17659320 (nanosecond), being converted to the Beijing Today time with 1347935859 seconds again is 2012-09-18 10:37:39, the time after second and the nanosecond combination is exactly: 2012-09-1810:37:39.01765932.

Above-described embodiments of the present invention do not consist of limiting the scope of the invention.Any modification of making within the spirit and principles in the present invention is equal to and replaces and improve, and all should be included within the claim protection range of the present invention.

Claims

1. the generation method of the multi-compartment message acquisition time of an intelligent substation, it is characterized in that, comprise the steps: at first the counter by FPGA inside, at the whole second rising edge of B code along resetting, zero clearing, beginning counting, when being arranged, data message comes in, then produce time stamp, stamp time mark to message.

2. the generation method of the multi-compartment message acquisition time of a kind of intelligent substation as claimed in claim 1 is characterized in that: wherein time stamp is the time that adds current counter conversion external time, and the time of conversion equals current counter and multiply by the clock cycle.

3. the generation method of the multi-compartment message acquisition time of a kind of intelligent substation as claimed in claim 1 or 2 is characterized in that: wherein stamp time mark to message and refer to add data packet head by the PCAP form.