CN102882634A - Llr processing method and receiving equipment - Google Patents

Llr processing method and receiving equipment Download PDF

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Publication number
CN102882634A
CN102882634A CN2012102045582A CN201210204558A CN102882634A CN 102882634 A CN102882634 A CN 102882634A CN 2012102045582 A CN2012102045582 A CN 2012102045582A CN 201210204558 A CN201210204558 A CN 201210204558A CN 102882634 A CN102882634 A CN 102882634A
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demodulating data
llr
unit
carried out
parameter
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CN2012102045582A
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CN102882634B (en
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张家佶
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Honor Device Co Ltd
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Huawei Technologies Co Ltd
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Abstract

The invention provides an LLR processing method and receiving equipment. According to the embodiment of the invention, only the data of one subframe needs buffer memory before LLR processing, thereby saving the buffer memory size of the data of one subframe and reducing the cost of chips of the receiving equipment. In addition, the power consumption and the processing time delay of the receiving equipment can further be reduced.

Description

LLR processing method and receiving equipment
Technical field
The application relates to the communication technology, relates in particular to a kind of log-likelihood ratio (Log-Likelihood Ratio, LLR) processing method and receiving equipment.
Background technology
Wireless communication system such as Wideband Code Division Multiple Access (WCDMA) (Wideband Code Division Multiple Access, abbreviation WCDMA) in the system, the reception signal of receiving equipment after to equilibrium carries out descrambling and de-spreading, is stored in the buffer unit with the first demodulating data that obtains a subframe; Then, read the first demodulating data in this buffer unit, described the first demodulating data is carried out LLR estimate, obtain the LLR value of described the first demodulating data; Again the LLR value is carried out the second demodulating data that deinterleaving obtains a subframe and be stored in another buffer unit, process for follow-up decoding.
Yet existing LLR all needs the data of a subframe are carried out buffer memory before and after processing, thereby has increased the chip cost of receiving equipment.
Summary of the invention
The application's many aspects provide a kind of LLR processing method and receiving equipment, in order to reduce the chip cost of receiving equipment.
The application's one side provides a kind of LLR processing method, comprising:
Reception signal after the equilibrium is carried out descrambling and de-spreading, to obtain the first demodulating data;
Described the first demodulating data is carried out deinterleaving, be stored in the buffer unit to obtain the second demodulating data, described buffer unit is used for described second demodulating data of a subframe of storage;
Read the second demodulating data in the described buffer unit, and the utilization LLR parameter corresponding with described the second demodulating data, obtain the LLR value of described the second demodulating data.
The application provides a kind of receiving equipment on the other hand, comprising:
The descrambling and de-spreading unit is used for the reception signal after the equilibrium is carried out descrambling and de-spreading, to obtain the first demodulating data;
The unit that deinterleaves is used for described the first demodulating data is carried out deinterleaving, to obtain the second demodulating data;
Buffer unit is for the second demodulating data of a subframe of storing the described unit acquisition that deinterleaves;
Estimation unit is used for reading the second demodulating data from described buffer unit, and the utilization LLR parameter corresponding with described the second demodulating data, obtains the LLR value of described the second demodulating data.
As shown from the above technical solution, therefore the embodiment of the present application, has been saved the buffer memory capacity of the data of a subframe, thereby has been reduced the chip cost of receiving equipment owing to just needing the data of a subframe are carried out buffer memory before LLR processes.In addition, owing to only having carried out data buffer storage one time, therefore, can also further reduce power consumption and the processing delay of receiving equipment.
Description of drawings
In order to be illustrated more clearly in the embodiment of the present application or technical scheme of the prior art, the below will do one to the accompanying drawing of required use in embodiment or the description of the Prior Art and introduce simply, apparently, accompanying drawing in the following describes is some embodiment of the application, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
The schematic flow sheet of the LLR processing method that Fig. 1 provides for the application one embodiment;
Fig. 2 is the specific implementation schematic diagram of embodiment corresponding to Fig. 1;
The structural representation of the receiving equipment that Fig. 3 provides for another embodiment of the application;
The structural representation of the receiving equipment that Fig. 4 provides for another embodiment of the application.
Embodiment
For the purpose, technical scheme and the advantage that make the embodiment of the present application clearer, below in conjunction with the accompanying drawing in the embodiment of the present application, technical scheme in the embodiment of the present application is clearly and completely described, obviously, described embodiment is the application's part embodiment, rather than whole embodiment.Based on the embodiment among the application, those of ordinary skills are not making the every other embodiment that obtains under the creative work prerequisite, all belong to the scope of the application's protection.
In addition, herein term " and/or ", only be a kind of incidence relation of describing affiliated partner, can there be three kinds of relations in expression, for example, A and/or B can represent: individualism A exists A and B, these three kinds of situations of individualism B simultaneously.In addition, character "/" represents that generally forward-backward correlation is to liking a kind of relation of "or" herein.
The application's technical scheme, can be applied to various wireless communication systems, for example: global system for mobile communications (Global System for Mobile Communications, be called for short GSM), GPRS (General Packet Radio Service, be called for short GPRS) system, code division multiple access (Code Division Multiple Access, be called for short CDMA) system, the CDMA2000 system, Wideband Code Division Multiple Access (WCDMA) (Wideband Code Division Multiple Access, be called for short WCDMA) system, Long Term Evolution (Long Term Evolution, be called for short LTE) system or World Interoperability for Microwave Access, WiMax (World Interoperability for Microwave Access is called for short WiMAX) system etc.
The schematic flow sheet of the LLR processing method that Fig. 1 provides for the application one embodiment, as shown in Figure 1.
101, the reception signal after the equilibrium is carried out descrambling and de-spreading, to obtain the first demodulating data.
Be understandable that, the method for carrying out to received signal the processing such as equilibrium, descrambling and de-spreading can referring to related content of the prior art, repeat no more herein.
102, described the first demodulating data is carried out deinterleaving, be stored in the buffer unit to obtain the second demodulating data, described buffer unit is used for described second demodulating data of a subframe of storage.
103, read the second demodulating data in the described buffer unit, and the utilization LLR parameter corresponding with described the second demodulating data, obtain the LLR value of described the second demodulating data.
Wherein, described LLR parameter can include but not limited to the noise factor that obtains by channel estimating, and the power bias factor that obtains according to described the first demodulating data.
Be understandable that, the method that obtains described noise factor by channel estimating can be referring to related content of the prior art, and can referring to related content of the prior art, repeat no more according to the method that the first demodulating data obtains the described power bias factor herein.
Alternatively, in an optional execution mode of the present embodiment, in 103, read after the second demodulating data in the described buffer unit, specifically can carry out and corresponding the interweaving of described deinterleaving the memory address of described the second demodulating data, to obtain interleaving address; Then, according to described interleaving address, obtain the LLR parameter corresponding with described interleaving address, then utilize described LLR parameter that described the second demodulating data is estimated, to obtain the LLR value of described the second demodulating data.Specifically can be as shown in Figure 2.
Be understandable that, utilize described LLR parameter to described the second demodulating data estimate for modulation system can include but not limited to Quadrature Phase Shift Keying (Quadrature Phase Shift Keying, QPSK), 16 grades of quadrature amplitude modulation (Quadrature Amplitude Modulation, QAM) are the modulation systems such as 16QAM or 64QAM.
In the present embodiment, by described the first demodulating data is carried out deinterleaving, be stored in the buffer unit to obtain the second demodulating data, described buffer unit is used for described second demodulating data of a subframe of storage, and then read the second demodulating data in the described buffer unit, and the utilization LLR parameter corresponding with described the second demodulating data, obtain the LLR value of described the second demodulating data, owing to just before LLR processes, needing the data of a subframe are carried out buffer memory, therefore, save the buffer memory capacity of the data of a subframe, thereby reduced the chip cost of receiving equipment.In addition, owing to only having carried out data buffer storage one time, therefore, can also further reduce power consumption and the processing delay of receiving equipment.
Need to prove: for aforesaid each embodiment of the method, for simple description, therefore it all is expressed as a series of combination of actions, but those skilled in the art should know, the application is not subjected to the restriction of described sequence of movement, because according to the application, some step can adopt other orders or carry out simultaneously.Secondly, those skilled in the art also should know, the embodiment described in the specification all belongs to preferred embodiment, and related action and module might not be that the application is necessary.
In the above-described embodiments, the description of each embodiment is all emphasized particularly on different fields, do not have the part that describes in detail among certain embodiment, can be referring to the associated description of other embodiment.
The structural representation of the receiving equipment that Fig. 3 provides for another embodiment of the application, as shown in Figure 3, the receiving equipment of the present embodiment can comprise descrambling and de-spreading unit 31, the unit 32 that deinterleaves, buffer unit 33 and estimation unit 34.Wherein, descrambling and de-spreading unit 31 is used for the reception signal after the equilibrium is carried out descrambling and de-spreading, to obtain the first demodulating data; Deinterleave unit 32 is used for described the first demodulating data that descrambling and de-spreading unit 31 obtains is carried out deinterleaving, to obtain the second demodulating data; Buffer unit 33 is for the second demodulating data of a subframe of storing unit 32 acquisitions that deinterleave; Estimation unit 34 is used for reading the second demodulating data from buffer unit 33, and the utilization LLR parameter corresponding with described the second demodulating data, obtains the LLR value of described the second demodulating data.
Wherein, described LLR parameter can include but not limited to the noise factor that obtains by channel estimating, and the power bias factor that obtains according to described the first demodulating data.
Alternatively, in an optional execution mode of the present embodiment, as shown in Figure 4, the estimation unit 34 of the present embodiment can further include read module 41, interleaving block 42, obtains module 43 and estimation module 44.Wherein, read module 41 is used for reading the second demodulating data of buffer unit 23; Interleaving block 42 carries out and corresponding the interweaving of described deinterleaving for the memory address of described the second demodulating data that read module 41 is read, to obtain interleaving address; Obtain the described interleaving address that module 43 is used for according to interleaving block 42 acquisitions, obtain the LLR parameter corresponding with described interleaving address; Estimation module 44 is used for utilizing the described LLR parameter that obtains module 43 acquisitions that described the second demodulating data that read module 41 reads is estimated, to obtain the LLR value of described the second demodulating data.
In the present embodiment, the unit carries out deinterleaving to described the first demodulating data by deinterleaving, be stored in the buffer unit to obtain the second demodulating data, described buffer unit is used for described second demodulating data of a subframe of storage, and then read the second demodulating data in the described buffer unit by estimation unit, and the utilization LLR parameter corresponding with described the second demodulating data, obtain the LLR value of described the second demodulating data, because buffer unit just needed the data of a subframe are carried out buffer memory before LLR processes, therefore, save the buffer memory capacity of the data of a subframe, thereby reduced the chip cost of receiving equipment.In addition, owing to only having carried out data buffer storage one time, therefore, can also further reduce power consumption and the processing delay of receiving equipment.
The those skilled in the art can be well understood to, and is the convenience described and succinct, the system of foregoing description, and the specific works process of device and unit can with reference to the corresponding process among the preceding method embodiment, not repeat them here.
In several embodiment that the application provides, should be understood that, disclosed system, apparatus and method can realize by another way.For example, device embodiment described above only is schematic, for example, the division of described unit, only be that a kind of logic function is divided, during actual the realization other dividing mode can be arranged, for example a plurality of unit or assembly can in conjunction with or can be integrated into another system, or some features can ignore, or do not carry out.Another point, the shown or coupling each other discussed or direct-coupling or communication connection can be by some interfaces, indirect coupling or the communication connection of device or unit can be electrically, machinery or other form.
Described unit as separating component explanation can or can not be physically to separate also, and the parts that show as the unit can be or can not be physical locations also, namely can be positioned at a place, perhaps also can be distributed on a plurality of network element.Can select according to the actual needs wherein some or all of unit to realize the purpose of the present embodiment scheme.
In addition, each functional unit in each embodiment of the application can be integrated in the processing unit, also can be that the independent physics of unit exists, and also can be integrated in the unit two or more unit.Above-mentioned integrated unit both can adopt the form of hardware to realize, the form that also can adopt hardware to add SFU software functional unit realizes.
The above-mentioned integrated unit of realizing with the form of SFU software functional unit can be stored in the computer read/write memory medium.Above-mentioned SFU software functional unit is stored in the storage medium, comprise that some instructions are with so that a computer equipment (can be personal computer, server, the perhaps network equipment etc.) or processor (processor) carry out the part steps of the described method of each embodiment of the application.And aforesaid storage medium comprises: USB flash disk, portable hard drive, read-only memory (Read-Only Memory, abbreviation ROM), the various media that can be program code stored such as random access memory (Random Access Memory is called for short RAM), magnetic disc or CD.
It should be noted that at last: above embodiment only in order to the application's technical scheme to be described, is not intended to limit; Although with reference to previous embodiment the application is had been described in detail, those of ordinary skill in the art is to be understood that: it still can be made amendment to the technical scheme that aforementioned each embodiment puts down in writing, and perhaps part technical characterictic wherein is equal to replacement; And these modifications or replacement do not make the essence of appropriate technical solution break away from the spirit and scope of each embodiment technical scheme of the application.

Claims (6)

1. a LLR processing method is characterized in that, comprising:
Reception signal after the equilibrium is carried out descrambling and de-spreading, to obtain the first demodulating data;
Described the first demodulating data is carried out deinterleaving, and obtaining the second demodulating data and to be stored in the buffer unit, described buffer unit is used for described second demodulating data of a subframe of storage;
Read the second demodulating data in the described buffer unit, and the utilization LLR parameter corresponding with described the second demodulating data, obtain the LLR value of described the second demodulating data.
2. method according to claim 1 is characterized in that, the LLR parameter that described utilization is corresponding with described the second demodulating data obtains the LLR value of described the second demodulating data, comprising:
The memory address of described the second demodulating data is carried out and corresponding the interweaving of described deinterleaving, to obtain interleaving address;
According to described interleaving address, obtain the LLR parameter corresponding with described interleaving address;
Utilize described LLR parameter that described the second demodulating data is estimated, to obtain the LLR value of described the second demodulating data.
3. method according to claim 1 and 2 is characterized in that, described LLR parameter comprises the power bias factor and the noise factor that obtains by channel estimating.
4. a receiving equipment is characterized in that, comprising:
The descrambling and de-spreading unit is used for the reception signal after the equilibrium is carried out descrambling and de-spreading, to obtain the first demodulating data;
The unit that deinterleaves is used for described the first demodulating data is carried out deinterleaving, to obtain the second demodulating data;
Buffer unit is for the second demodulating data of a subframe of storing the described unit acquisition that deinterleaves;
Estimation unit is used for reading the second demodulating data from described buffer unit, and the utilization LLR parameter corresponding with described the second demodulating data, obtains the LLR value of described the second demodulating data.
5. equipment according to claim 4 is characterized in that, described estimation unit comprises:
Read module is for the second demodulating data that reads described buffer unit;
Interleaving block is used for the memory address of described the second demodulating data is carried out and corresponding the interweaving of described deinterleaving, to obtain interleaving address;
Obtain module, be used for according to described interleaving address, obtain the LLR parameter corresponding with described interleaving address;
Estimation module is used for utilizing described LLR parameter that described the second demodulating data is estimated, to obtain the LLR value of described the second demodulating data.
6. according to claim 4 or 5 described equipment, it is characterized in that, described LLR parameter comprises the power bias factor and the noise factor that obtains by channel estimating.
CN201210204558.2A 2012-06-20 2012-06-20 Llr processing method and receiving equipment Active CN102882634B (en)

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Publication number Priority date Publication date Assignee Title
US20050243951A1 (en) * 2004-04-29 2005-11-03 Interdigital Technology Corporation Iterative turbo decision feedback receiver
CN101048993A (en) * 2004-08-27 2007-10-03 高通股份有限公司 Coded-bit scrambling for multi-stream communication in a MIMO channel
CN101057469A (en) * 2004-09-17 2007-10-17 诺基亚公司 Iterative and Turbo-based method and apparatus for equalization of spread-spectrum downlink channels
CN102104387A (en) * 2009-12-17 2011-06-22 中兴通讯股份有限公司 Decoder and decoding method
CN102111162A (en) * 2009-12-28 2011-06-29 重庆重邮信科通信技术有限公司 Turbo component decoding method, component decoder, branch calculator and Turbo decoder

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050243951A1 (en) * 2004-04-29 2005-11-03 Interdigital Technology Corporation Iterative turbo decision feedback receiver
CN101048993A (en) * 2004-08-27 2007-10-03 高通股份有限公司 Coded-bit scrambling for multi-stream communication in a MIMO channel
CN101057469A (en) * 2004-09-17 2007-10-17 诺基亚公司 Iterative and Turbo-based method and apparatus for equalization of spread-spectrum downlink channels
CN102104387A (en) * 2009-12-17 2011-06-22 中兴通讯股份有限公司 Decoder and decoding method
CN102111162A (en) * 2009-12-28 2011-06-29 重庆重邮信科通信技术有限公司 Turbo component decoding method, component decoder, branch calculator and Turbo decoder

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Effective date of registration: 20210428

Address after: Unit 3401, unit a, building 6, Shenye Zhongcheng, No. 8089, Hongli West Road, Donghai community, Xiangmihu street, Futian District, Shenzhen, Guangdong 518040

Patentee after: Honor Device Co.,Ltd.

Address before: 518129 Bantian HUAWEI headquarters office building, Longgang District, Guangdong, Shenzhen

Patentee before: HUAWEI TECHNOLOGIES Co.,Ltd.